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Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.
This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.
Refactor the hook in a more generic way.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Until the last SoC, the register addresses have been hard-coded because
they are always constant. For a planned new SoC, the register bases
will be completely changed. I insist on supporting multiple SoCs/boards
by a single defconfig (uniphier_v8_defconfig) since duplicating similar
defconfig files is a maintenance burden. The base addresses must be
fixed-up at run-time somehow.
Previously, the board init code identified the SoC by reading out the
SG_REVISION register. This is much easier than parsing DT.
You cannot do it any more because the base address of SG will be
changed. The SG_REVISION register exists to read out the SoC ID, but
you never know its address before identifying the SoC. Oh well.
So, the possible solution is to parse the DT, and find out the node
with "*-soc-glue" compatible string. Then, sg_base is set to the value
of the "reg" property. The sc_base is set up likewise.
It is worth noting a pit-fall. Having sc_base and sg_base in the global
scope will make the life easier, but the global variables are poorly
supported before the relocation. In fact, the .bss section overwraps
with DT. Allocating them in the .bss section would break DT. So, I gave
dummy initializers to assign them in the .data section.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The SC_* macros represent the address of SysCtrl registers.
For a planned new SoC, its base address will be changed.
Turn the SC_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.
Turn the SG_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The planned new SoC supports the SD boot mode. Detect and display it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The planned new SoC does not have SBC (System Bus Controller) block.
Make boot_is_swapped() an optional hook.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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If CONFIG_MICRO_SUPPORT_CARD is enabled, U-Boot initialize SBC
(System Bus Controller), which may not be really necessary.
Check the "socionext,uniphier-system-bus" node in DT run-time.
If and only if it is found and its "status" property is okay,
initialize the SBC block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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If CONFIG_MICRO_SUPPORT_CARD is enabled, U-Boot tries to get access
to the devices on the support card, which may not actually exist.
Check the DT and search for the on-board devices run-time. If the
nodes are not found in DT, then disable the code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This is boolean logic.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Now that 64-bit SoCs of this SoC family no longer support SPL,
this Makefile can be slightly simpler.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The .boot_device_fixup() is only called by SPL.
Now that 64-bit SoCs of this SoC family no longer support SPL,
debug-uart-ld20.c is never compiled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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[ Linux commit aa38571246c6ac279ebebd141157297bcb959d76 ]
The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for reserving memory for Trusted Firmware-A etc.
Use the more robust /reserved-memory node with the no-map property
to prevent the kernel from mapping it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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By default, CONFIG_SYS_INIT_SP_BSS_OFFSET was made invisible by not
giving a prompt to it.
The only way to define it is to hard-code an extra entry in SoC/board
Kconfig, like arch/arm/mach-tegra/tegra{186,210}/Kconfig.
Add a prompt to it in order to allow defconfig files to specify the
value of CONFIG_SYS_INIT_SP_BSS_OFFSET.
With this, CONFIG_SYS_INIT_SP_BSS_OFFSET would become always visible.
So, we need a new bool option to turn it off by default.
I move the 'default 524288' to the common place. This value is not too
big, but is big enough to avoid the overwrap of DT in most platforms.
If 512KB is not a suitable choice for your platform, you can change it
from your defconfig or menuconfig etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features and fixes for 2019.10 cycle
This includes the Atmel QSPI driver and support for the at91 boards.
This is the port of the driver from Linux, mostly done by Tudor Ambarus.
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Fix the following:
- use "jedec,spi-nor" binding, we use jedec compatible flashes
- set bus width to 4, we use quad capable flashes
- differentiate bewteen data and clk and cs pins
- drop partions as we don't use them in u-boot.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
[tudor.ambarus@microchip.com: use "jedec,spi-nor", edit commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix khadas-vim README
- add support for unique generated MAC adresses from SoC serial,
limited to Amlogic GXL/GXM boards for now
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- Pull in the series to split fsl_esdhc for i.MX/non-i.MX cleanly
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https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- mtmips: network stability fixes for gardena-smart-gateway
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The watchdog of mediatek chips is enabled by bootrom before u-boot is
running. Previously we choose to enable the wdt driver only to disable the
watchdog hardware.
Now wdt service is enabled by default. The function arch_misc_init which is
only used to disable wdt is no longer needed.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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- DWC and i.MX6 fixes
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
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- fix complation error for CONFIG_USB
- update RPi3 DTBs to v5.1-rc6 state
- add defconfig for RPi3 B+
- Fix BCM2835_MBOX_TAG_TEST_PIXEL_ORDER define
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With commit 06985289d452 ("watchdog: Implement generic watchdog_reset()
version") the init sequence has changed in arch_misc_init(), resulting
in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena).
When this happens, the first (or sometimes later ones as well) TFTP
command hangs and does not complete correctly. This leads to the
assumption that the d-cache is not in a clean state once the ethernet
driver is called (d-cache is used here for the buffers). The old work-
around with the cache flush somehow does not work any more now with
the new code change.
Unfortunately adding CONFIG_SYS_MALLOC_CLEAR_ON_INIT also did not fix
this issue. With v2019.07-rc3 it shows again. The time of accessing
the data seems to be very important here. It needs to be "very late"
in the boot process.
Testing has shown, that copying a 64KiB area in DDR at a very late
bootup time, directly before calling into the prompt, fixes this issue.
Flushing of the complete d-cache does not seem to necessary, as this
copy alone seems to fix this problem.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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This uclass is intended for devices that do not need any features from the
uclass, including binding children.
This will typically be used by devices that are used to bind child devices
but do not use dm_scan_fdt_dev() to do it. That is for example the case of
several USB wrappers that have 2 child devices (1 for device and 1 for
host) but bind only one at a any given time.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Commit b238e4b00ced ("rockchip: Cleanup of make_fit_atf.py.") set
firmware = "atf_1";
loadables = "uboot","atf_1","atf_2";
Actually it should be:
firmware = "atf_1";
loadables = "uboot","atf_2","atf_3";
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add support for generating an unique MAC address using the SoC internal
serial number from the Secure Monitor interface.
The algorithm generates an unicast locally administered 6bytes minus 2bits
address using an crc16 of the serial for the top 16bits with the lower 2 bits
masked to setup the unicast locally administered property and a crc24 for
the lower 24bits.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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The Secure Monitor interface permits retrieving the SoC Serial Number,
add a function to retrieve it.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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After the transition to DM, only the mx6dl/solo wandboard
is supported.
Add FIT image support so that all the wandboard variants
can be supported, like it was prior to the DM conversion.
Successfully booted Linux on mx6q/solo/qp wandboards.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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Add a mmc0 alias so that U-Boot proper can associate mmc0
with the boot SD card.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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Import wandboard devicetree files so that the mx6q and mx6qp
variants can be properly supported.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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Udate the wandboard devicetree files with the ones
from kernel 5.1.9.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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Place dtbs under SoC level rather than board level.
imx6q-novena.dtb and imx6dl-wandboard-revb1.dtb were
placed under the board config option, so move them
to SoC level.
This also aligns with the kernel dts Makefile format.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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Keep dtb entries sorted to help adding new dtbs
in an organized form.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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All the config for TPL has been update, we can enable the TPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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rockchip pinctrl driver has update to use dts, so we need
to add the pinctrl config in SPL for sdmmc.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Migrate all the "u-boot,dm-pre-reloc" tag from rk3288-tinker.dts
into rk3288-tinker-u-boot.dtsi.
When both board level and soc level '-u-boot.dtsi' files exist,
we need to include the soc level 'rk3288-u-boot.dtsi' manually.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Move all the tag "u-boot,dm-pre-reloc" from rk3288.dtsi
into rk3288-u-boot.dtsi.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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TPL is at SRAM while other stage is at SDRAM, so it needs
separate STACK.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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More boards other than vyasa needs TPL, so enable the TPL configs
at chip level instead of board level.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Add missing regulator-init-microvolt property to vdd_log regulator.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Rebase on latest u-boot-rockchip master)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I13b24fb81e8ad269d7dbb0c7b67f5f4795d2e775
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Move the sg_set_pinsel macro to arch/arm/mach-uniphier/arm32/debug_ll.S
since it is not used anywhere else.
Move the C functions sg_set_{pinsel,iectrl} to debug-uart.c since they
are not used anywhere else.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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debug_uart_init() is called from spl_board_init(), which is only
compiled for SPL. For U-boot proper, _debug_uart_init() is unreachable,
so dropped by the dead code elimination.
Now that 64-bit SoCs of this SoC family no longer support SPL,
debug-uart-ld20.c is never compiled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Commit e27d6c7d328c ("ARM: uniphier: simplify SoC ID get function")
accidentally removed the macros needed to compile debug_ll.S
Revive them.
Fixes: e27d6c7d328c ("ARM: uniphier: simplify SoC ID get function")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2019.07
- menlo board
- allow SDB on Sabre
- HAB for mx6sl
- apalis board
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https://gitlab.denx.de/u-boot/custodians/u-boot-stm
STM32 MCU fixes/cleanup:
- Fix SPL console for STM32F769 Discovery
- Fix Memory Protection Unit size for STM32F4 series
- Cleanup DT for STM32F746 Discovery
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The MPU region dedicated for SDRAM for STM32F4 SoCs family
was set to 16MB, but STM32F429 Evaluation board have 32MB of SDRAM.
When kernel starts, only first 16MB of SDRAM are configured with XN
(eXecute Never) bit disabled, whereas kernel is using 32MB.
To avoid such situation in the future, extend this MPU region to 512MB
as for STM32F7/H7.
It fixes the following user land exception on STM32F429 Evaluation
board :
[ 1.713002] VFS: Mounted root (ext4 filesystem) readonly on device 179:2.
[ 1.722605] devtmpfs: mounted
[ 1.733057] Freeing unused kernel memory: 72K
[ 1.737622] This architecture does not have kernel memory protection.
[ 1.744070] Run /sbin/init as init process
[ 1.906850]
[ 1.906850] Unhandled exception: IPSR = 00000004 LR = fffffffd
[ 1.914282] CPU: 0 PID: 1 Comm: init Not tainted 5.1.0-00002-gcf9ca5719954 #6
[ 1.921433] Hardware name: STM32 (Device Tree Support)
[ 1.926601] PC is at 0x1a00b64
[ 1.929642] LR is at (null)
[ 1.932669] pc : [<01a00b64>] lr : [<00000000>] psr: 01000000
[ 1.938993] sp : 01a5cfb0 ip : 00000000 fp : 00000000
[ 1.944269] r10: 01a43b00 r9 : 00000000 r8 : 00000000
[ 1.949564] r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : 00000000
[ 1.956168] r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000
[ 1.962701] xPSR: 01000000
[ 1.965506] CPU: 0 PID: 1 Comm: init Not tainted 5.1.0-00002-gcf9ca5719954 #6
[ 1.972658] Hardware name: STM32 (Device Tree Support)
[ 1.978132] [<0000c009>] (unwind_backtrace) from [<0000b24f>] (show_stack+0xb/0xc)
[ 1.986024] [<0000b24f>] (show_stack) from [<0000b947>] (__invalid_entry+0x4b/0x4c)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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