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2020-04-30acpi: Convert part of acpi_table to use acpi_ctxSimon Glass
The current code uses an address but a pointer would result in fewer casts. Also it repeats the alignment code in a lot of places so this would be better done in a helper function. Update write_acpi_tables() to make use of the new acpi_ctx structure, adding a few helpers to clean things up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-30acpi: Add a method to write tables for a deviceSimon Glass
A device may want to write out ACPI tables to describe itself to Linux. Add a method to permit this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini
- rmobile gen2/gen3 DTS sync and defconfig consolidation
2020-04-29driver: net: fm: add DM ETH supportMadalin Bucur
Probe the FMan MACs based on the device tree while retaining the legacy code/functionality. One notable change introduced here is that, for DM_ETH, the name of the interfaces is corrected to the fmX-macY format, that avoids the referral to the MAC block names which were incorrect for FMan v3 devices (i.e. DTSEC, TGEC) and had weird formatting (i.e. FM1@DTSEC6, FM1@TGEC1). The legacy code is left unchanged in this respect. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDBMadalin Bucur
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB device tree. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1046AMadalin Bucur
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the LS1046A SoC. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1043ARDBMadalin Bucur
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1043ARDB device tree. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1043AMadalin Bucur
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the LS1043A SoC. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29ARM: dts: add QorIQ DPAA 1 FMan v3 device tree nodesMadalin Bucur
Add the QorIQ DPAA Frame Manager v3 device tree nodes description. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29armv8: ls1028aqds: add lpuart dts supportYuantian Tang
Rename fsl-ls1028a-qds.dts to fsl-ls1028a-qds.dtsi so that it can be used as common device tree for lpuart and duart. Add lpuart device tree and duart device tree respectively for qds which are used with duart and lpuart console. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls1028a: add lpuart nodesYuantian Tang
Add lpuart nodes to enable lpuart feature Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls1088ardb: add DPMAC and PHY nodesIoana Ciornei
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the external MDIO nodes and describe the PHYs (8 x VSC8514, AQR105). Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls2088ardb: add DPMAC and PHY nodesIoana Ciornei
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the external MDIO nodes and describe the PHYs (4 x AQR405 and 4 x CS4340). Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: lx2160ardb: add DPMAC and PHY nodesIoana Ciornei
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls1088a: add external MDIO nodesIoana Ciornei
Add the External MDIO1 device node found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls2088a: add external MDIO nodesIoana Ciornei
Add the External MDIO1 device node found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: lx2160a: add external MDIO nodesIoana Ciornei
Add the External MDIO device nodes found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: rockchip: px30: add and enable rng nodeLin Jinhan
Add enable rng node in px30-evb-u-boot.dtsi. Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29arm: dts: rockchip: rk3399: add and enable rng nodeLin Jinhan
Add rng node in rk3399-u-boot.dtsi and enable it in rk3399-evb-u-boot.dtsi. Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29ARM: dts: rmobile: Scrub unused DT nodesMarek Vasut
Remove DT nodes which are not used by U-Boot, like audio and video in/out nodes. This saves about 35 kiB on the resulting U-Boot binary without any impact on functionality. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28Convert CONFIG_PHYLIB et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_PHYLIB CONFIG_BITBANGMII CONFIG_MV88E6352_SWITCH CONFIG_MV88E61XX_SWITCH CONFIG_PHYLIB_10G CONFIG_PHY_AQUANTIA CONFIG_PHY_ATHEROS CONFIG_PHY_BROADCOM CONFIG_PHY_CORTINA CONFIG_PHY_DAVICOM CONFIG_PHY_ET1011C CONFIG_PHY_LXT CONFIG_PHY_MARVELL CONFIG_PHY_MICREL CONFIG_PHY_NATSEMI CONFIG_PHY_REALTEK CONFIG_RTL8211X_PHY_FORCE_MASTER CONFIG_PHY_SMSC CONFIG_PHY_TERANETICS CONFIG_PHY_TI CONFIG_PHY_VITESSE CONFIG_PHY_XILINX Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.6.2Marek Vasut
Synchronize R-Car Gen3 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.6.2Marek Vasut
Synchronize R-Car Gen2 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28Merge tag 'u-boot-amlogic-20200428' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix sd-emmc controller A init on G12A/G12B/SM1 SoCs - add GXBB USB PHY driver - enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards - fix USB PHYs Power-Up on on VIM3/VIM3L boards
2020-04-28Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2020-04-28rockchip: px30-evb: remove redundant include fileKever Yang
The file <board name>-u-boot.dtsi inculde automatically by the build system, no need to add this to dts file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28rockchip: px30: add -u-boot dtsi for socKever Yang
Add soc level -u-boot.dtst so that boards can share the common nodes. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28fsl-layerscape: Move GIC RD tables init to soc.cHou Zhiqiang
Move GIC redistributor tables initialization to CPU setup function. This patch introduces a GIC redistributor tables init function, and moves the function of reserving memory for GIC redistributor tables to soc.c and adds a argument for the memory size to reserve, BTW rename the function so that it is more readable. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28fsl-layerscape: Kconfig: Select RESV_RAM if GIC_V3_ITSHou Zhiqiang
The GIC redistributor tables initialization depends on RESV_RAM config, so select RESV_RAM if GIC_V3_ITS is enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28fsl-layerscape: Add RESV_RAM check in resv_ram addrHou Zhiqiang
The initialization of gd->arch.resv_ram pointer should depend on if the RESV_RAM config is enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28arm: dts: rockchip: rk3399-roc-pc: Enable FE1.1 USB 2.0 HUB on roc-rk3399-pcSuniel Mahesh
roc-rk3399-pc has an FE1.1 USB 2.0 HUB which connects two USB ports (HOST1 and HOST2). For end devices to work we need to enable USB hub so that HOST detects there presence and enumerates them accordingly. This requires explicit pinctrl within gpio enablement. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28arm: dts: meson-khadas-vim3: enable SPI NOR flashNeil Armstrong
Enable the SPI flash controller and reduce the usable eMMC data pins to 4 to permit using the on-board SPI NOR Flash. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28arm: dts: meson-gxm-khadas-vim2-u-boot: enable SPI NOR flashNeil Armstrong
Activate the on-board SPI NOR Flash by enabling the SPI controller and disabling the DS eMMC pin in the VIM2 u-boot.dtsi file. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28arm64: dts: meson: sync dt and bindings from v5.7-rc1Neil Armstrong
Sync the device tree and dt-bindings from Linux v5.7-rc1 8f3d9f354286 ("Linux 5.7-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-27Merge tag 'mips-pull-2020-04-27' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mips - brcmnand: fix missing code path from Linux driver - bmips: fix build error when disabling USB - mips: add option to restore original exception vector base - mips: fix off-by-one error when clearing gd_data - mips: minor fixes for compatibility with generic SPL framework - spl: refactor legacy image loading - spl: add LZMA decompression support for legacy images - Makefile: add target to build LZMA compressed U-Boot images - mtmips: refactor and rewrite low-level init code - mtmips: add and enable SPL support with LZMA - mtmips: add support for MT7628 reference board - mtmips: add support for VoCore/VoCore2 board
2020-04-27mips: Add support for SoM "VoCore2".Mauro Condarelli
Small patch to add support for VoCore/VoCore2 board. VoCore is open hardware and runs OpenWrt/LEDE. It has WIFI, USB, UART, 20+ GPIOs but is only one inch square. It will help you to make a smart house, study embedded system or even make the tiniest router in the world. Details about this SoM can be found at "https://vocore.io/v2.html". Signed-off-by: Mauro Condarelli <mc5686@mclink.it> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-27mips: mt76x8: ddr_cal: Correct dqs_find_min/max implementationsStefan Roese
The current implementations have some issues detecting the correct values: dqs_find_max() will return "last passing fieldval + 1" instead of "last passing fieldval". Also it will return "maxval + 1" in the case that all fieldvals are tested valid (without error). dqs_find_min() will not test the "lowest" value because of using ">" instead of ">=". This patch now rewrites these functions to fix those issues. Also, this patch uses the same approach of a for loop in both functions making it easier to read and maintain. Since the variables are integers now, we can use min()/max(), which handles the wrap around case for fieldval=0: return (0 - 1). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: mt76x8: ddr_cal: Change types from u32 to int in dqs_find_min/maxStefan Roese
This change is made to enable comparison of integer variables, which might be negative in the next patch. No functional change is intended in this patch. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: mt76x8: ddr_cal: Rename dqs_test_valid() to dqs_test_error()Stefan Roese
This function returns "-1" (true) upon error. So the function name does not match its implementation which is confusing. This patch renames the function to dqs_test_error() which makes the code easier to read. Also change the return type to bool and return "true" or "false". Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: mtmips: add support for mt7628-rfbWeijie Gao
This patch adds support for mt7628 reference board. SPL_DM and DT are not enabled for SPL to save about 17KiB for u-boot-spl.bin. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: mtmips: enable SPL for all boardsWeijie Gao
This patch enables SPL for all mtmips boards. And also remove defconfig files which are intend to build ram bootable u-boot files. SPL_DM and OF_CONTROL are enabled for both boards. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: mtmips: add SPL supportWeijie Gao
This patch adds SPL support for mtmips platform. The lowlevel architecture is split into SPL and the rest parts are built into a memory loadable u-boot image. Optional SPL_DM and OF_CONTROL are also supported. The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are not enabled and the memory bootable u-boot (u-boot.img) is generated automatically so there is not need to add a separate config for it. A lzma compressed payload (u-boot-lzma.img) is also generated and it will be combined with u-boot-spl.bin to form the unified ROM bootable binary u-boot-mtmips.bin. A spl loader is added to support uncompress the payload. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: mtmips: rewrite lowlevel codes of mt7628Weijie Gao
This patch rewrites the mtmips architecture with the following changes: 1. Move MT7628 soc parts into a subfolder. 2. Lock parts of D-Cache as temporary stack. 3. Reimplement DDR initialization in C language. 4. Reimplement DDR calibration in a clear logic. 5. Add full support for auto size detection for DDR1 and DDR2. 6. Use accurate CPU clock depending on the input xtal frequency for timer and delay functions. Note: print_cpuinfo() has incompatible parts with MT7620 so it's moved into mt7628 subfolder. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: add a option to support not reserving malloc space on initial stackWeijie Gao
The initial stack on some platforms is too small to hold a large malloc space. This patch adds a option to allow these platforms not reserving the malloc space on initial stack. These platforms should set the malloc base after DRAM is usable. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: add an option to support initialize SRAM for initial stackWeijie Gao
Currently CONFIG_MIPS_INIT_STACK_IN_SRAM assumes the memory space for the initial stack can be used directly. However on some platform the SRAM needs initialization, e.g. lock cache. This patch adds an option to allow a new function mips_sram_init() being called before setup_stack_gd. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27dts: mtmips: add alternative pinmux node for uart2Weijie Gao
This patch adds a new pinmux for UART2, which shares the pins with SPIS. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: add a mtmips-specific field to architecture-specific global dataWeijie Gao
SoCs of mtmips can use different CPU frequencies depending on the HW/SW configurations. For example mt7628 uses 580MHz clock if the input xtal frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot the CPU uses the xtal frequency directly. So hardcoding the timer frequency (half of the CPU frequency) in CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case. This patch adds a mtmips-specific field timer_freq to arch_global_data. This field will be used later in mtmips-specific get_tbclk() to provide accurate timer frequency in different boot stage. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: mtmips: make use of sysreset-resetctrl for mt7628 socWeijie Gao
This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27mips: spl: Flush cache before jumping to U-Boot properStefan Roese
This patch adds a MIPS specific jump_to_image_no_args() implementation, which flushes the U-Boot proper image loaded from the boot device in SPL before jumping to it. It has been noticed on MT76x8, that this cache flush is needed. Other MIPS platforms might need it as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27mips: add an option to enable u_boot_list section for SPL loaders in ↵Weijie Gao
u-boot-spl.lds u_boot_list is not only used by DM, but also by some SPL image load methods such as spl_nor.c. This patch adds an option CONFIG_SPL_LOADER_SUPPORT in conjunction with CONFIG_SPL_DM surrounding the u_boot_list section to make sure SPL image loaders can be correctly built into u-boot SPL without DM enabled. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>