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2019-04-12dt: bcm6838: add gpio controllerPhilippe Reynes
Add gpio controllers in bcm6838 device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12mips: add initial support for qca956x referenced boardRosy Song
QCA9563 is CPU used on AP152 board : Clock speed : 750 MHz , Arch : Mips 74Kc, Eth : SGMII interface, MIMO config : 3 * 3 450M, 2 * USB 2.0, Signed-off-by: Rosy Song <rosysong@rosinson.com> Changes for v2: - coding style cleanup - remove ununsed flash chip in defconfig - enable automatic icache / dcache size in defconfig Changes for v3: - add detailed information for qca956x in commit message Changes for v4: - remove pre-configured network settings in ap152.h Changes for v5: - coding style cleanup
2019-04-12mips: fix erros on registers macros of pll-ddr-config1-nfrac for QCA956XRosy Song
See details in chapter 8.6.2 and 8.6.4 (page 140-141) of qca9563 datasheet, NFRAC[17:0] So the mask of [17:5] is 0x1fff not 0x3fff. Signed-off-by: Rosy Song <rosysong@rosinson.com> Changes for v2-v3: - add more information for this commit Changes for v4-v5: - coding style cleanup
2019-04-12bootm: mips: Remove boot_reloc_ramdiskHoratiu Vultur
Remove the function boot_reloc_ramdisk in the file arch/mips/lib/bootm because it is relocating again the ramdisk. The function do_bootm_states() already relocates the ramdisk even if it is a legacy uImage or a FIT image. The relocation in the function do_bootm_states() was introduce in the commit c2e7e72bb9f0cb47d024997b381cb64786eb5402 ("bootm: relocate ramdisk if CONFIG_SYS_BOOT_RAMDISK_HIGH set") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12mips: mt76xx: gardena-smart-gateway: Correct spelling of GARDENAStefan Roese
This patch changes Gardena to the correct GARDENA spelling. Also the platform name is "GARDENA smart Gateway". This patch changes the incorrect occurrances. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12mips: add ethernet support for qca953x referenced boardsRosy Song
Signed-off-by: Rosy Song <rosysong@rosinson.com>
2019-04-12ARM: dts: Add STMFX gpio expander support for stm32mp157c-ev1Patrick Delaunay
Adds alias to set the pincontrol seq id. For STMFX gpio expander, force sequence number after the last bank (GPIOZ) to avoid conflict between STM32MP and STMFX gpio bank sequence number. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-12ARM: dts: stm32mp1: Add adc nodesPatrice Chotard
Add adc related nodes. These nodes are used to detect the current supplied by USB type-C power in port on DK1 and DK2 boards. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-12ARM: dts: stm32: Synchronize DT with kernel onePatrice Chotard
This patch synchronizes U-boot DT with kernel one This is based on https://patchwork.kernel.org/cover/10797115/ This patch adds initial support of STM32MP157 discovery boards: - Add support of stm32mp157a discovery1 board (part number: STM32MP157A-DK1). This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios) and 512MB of DDR3. Several connections are available on this boards: 4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ... - Add support of stm32mp157c discovery2 board (part number: STM32MP157C-DK2). This board is a "super-set" of stm32mp157a-dk1. A display panel (otm8009a) and Murata wifi/BT combo is added. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-12stm32mp1: dts: activate psci-1.0Patrick Delaunay
Updates the stm32mp157c devicetree to bind the U-Boot PSCI driver need for power off command; TF-A for stm32mp15x supports PSCI 1.0. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: add command poweroffPatrick Delaunay
Activate the command poweroff by default for STM32MP1: - with PCSI from TF-A for trusted boot - with PMIC sysreset request for basic boot (SYSRESET_POWER) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12power: rename stpmu1 to official name stpmic1Patrick Delaunay
Alignment with kernel driver name & binding introduced by https://patchwork.kernel.org/cover/10761943/ to use the final marketing name = STPMIC1. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-12power: stpmu1: rename files to stpmic1Patrick Delaunay
Prepare file modification for kernel alignment and rename driver to stpmic1. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-12stm32mp1: Replace OTP read by SHADOW readPatrick Delaunay
Replace STM32_BSEC_OTP() by STM32_BSEC_SHADOW() to increase read performance. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: bsec: shadow all the upper OTP (no secure) during bootPatrick Delaunay
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: bsec: use device tree new compatiblePatrick Delaunay
Update bsec driver to use the device tree provided by Kernel. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: basic boot: SPL enable access to GPIOZ bankPatrick Delaunay
SPL need to set GPIOZ_SECCFGR = 0 to enable access to GPIOZ bank (open security). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: align serial number on bootromPatrick Delaunay
Always use upper case for serial number. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: add some syscon drivers for syscfg and etpzcPatrick Delaunay
Add SYSCON driver for syscfg and etpzc and reorder in alphabetics order Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: support forced boot modePatrick Delaunay
The boot mode can be forced by key press or by TAMP register, requested in kernel by syscon-reboot-mode tamp: tamp@5c00a000 { compatible = "simple-bus", "syscon", "simple-mfd"; reg = <0x5c00a000 0x400>; reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x150>; /* reg20 */ mask = <0xff>; mode-normal = <0>; mode-fastboot = <0x1>; mode-recovery = <0x2>; mode-stm32cubeprogrammer = <0x3>; mode-ums_mmc0 = <0x10>; mode-ums_mmc1 = <0x11>; mode-ums_mmc2 = <0x12>; }; }; Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: spl: hang with trace when DDR init failedPatrick Delaunay
When DDR initialization failed, print error message and stop the SPL execution. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: cosmetic: add comment on psci_migrate_info_type return valuePatrick Delaunay
Add explaination for the return value of psci_migrate_info_type: 2 = Trusted OS. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: cosmetic cleanup KconfigPatrick Delaunay
Cosmetic cleanup in mach-stm32mp Kconfig - remove duplicated SPL_DRIVERS_MISC_SUPPORT - update help for TARGET_STM32MP1 - set value for NR_DRAM_BANKS - remove one comment as DEBUG_UART is deactivated by default - include board Kconfig at the end of the file Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: spl: add spl_display_printPatrick Delaunay
SPL displays the board model from device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: update print_cpuinfo()Patrick Delaunay
Display CPU part number and package information. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: update boot mode managementPatrick Delaunay
- export the function get_bootmode() and reused it in spl code - manage uart instance by alias (prepare v4.19 binding) - solve issue on nand instance - restore console for uart boot Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: add runtime information in environmentPatrick Delaunay
Set board name with the first dts compatible found in DT code under CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG The result with DEVICE_TREE=stm32mp157c-ev1 is: STM32MP> env print board=stm32mp1 board_name=stm32mp157c-ev1 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: display board informationPatrick Delaunay
Implement checkboard() function to display - the boot chain used: basic or trusted - the board compatible in device tree - the board identifier and revision, saved in OTP59 for ST boards Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: bsec: access with SMC for trusted bootPatrick Delaunay
As BSEC is secure aware, all register access need to be done by TF-A for TRUSTED boot chain, when U-Boot is executed in normal world. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: add trusted boot with TF-APatrick Delaunay
Add support of trusted boot, using TF-A as first stage bootloader, The boot sequence is BootRom >=> TF-A.stm32 (clock & DDR) >=> U-Boot.stm32 The TF-A monitor provides secure monitor with support of SMC - proprietary to manage secure devices (BSEC for example) - PSCI for power The same device tree is used for STMicroelectronics boards with basic boot and with trusted boot. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12ARM: dts: dra71-evm: Correct evm_sd regulator max voltageFaiz Abbas
Correct vpo_sd_1v8_3v3 regulator max voltage to 3.3V Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Keerthy <j-keerthy@ti.com>
2019-04-12ARM: dts: dra7: Change pbias voltage to 3.3VFaiz Abbas
As per recent TRM[1], PBIAS cell on dra7 devices supports 3.3v and not 3.0v as documented earlier. Update PBIAS regulator max voltage and the voltage written in the driver to reflect this. [1] http://www.ti.com/lit/pdf/sprui30 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-04-12ti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common placeTom Rini
The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific notion but rather "where is our previous stage loaded in memory?" option. Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for our HS builds that are not using SPL anyhow. Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Andrew F. Davis <afd@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com?
2019-04-12armv7R: K3: am654: Trigger panic on DDR init failuresAndreas Dannenberg
When initializing DDR from R5 SPL trigger U-Boot's panic facility rather than simply returning from the board init function as there is little point continuing code execution. Further, as panic implies a board reset, so using it might potentially allow to recover from this error in certain cases such as when the init failure was caused by a temporary glitch of some sorts. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-12arm: k3: Add support for updating msmc dt nodeLokesh Vutla
Certain parts of msmc sram can be used by DMSC or can be marked as L3 cache. Since the available size can vary, changing DT every time the size varies might be painful. So, query this information using TISCI cmd and fixup the DT for kernel. Fixing up DT does the following: - Create a sram node if not available - update the reg property with available size - update ranges property - loop through available sub nodes and delete it if: - mentioned size is out if available range - subnode represents l3 cache or dmsc usage. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-12arm: k3: Add a wrapper to get tisci handleLokesh Vutla
Create a wrapper to get the ti sci handle. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-12ARM: davinci: da850evm: Enable SPL_OF_CONTROL without PLATDATAAdam Ford
With the memory mapping giving us some more avialable RAM, this updates the da850-evm-u-boot.dtsi to include the serial port, SPI and Flash nodes along with some dependent nodes in the SPL dtb. This also removes the platform data initialization code for the serial port and SPI Flash. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-04-12am335x, guardian: Add support for the bosch guardian boardSjoerd Simons
Add support for the Bosch Guardian board. CPU : AM335X-GP rev 2.1 Model: Bosch AM335x Guardian I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Felix Brack <fb@ltec.ch>
2019-04-12Add support for the MT41K128M16JT125K memory modulesSjoerd Simons
Add configuration for the MT41K128M16JT125K memory modules as used on the Bosch Guardian device. Based on a patch by: Govindaraji Sivanantham <Govindaraji.Sivanantham@in.bosch.com> Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> [checkpatch.pl cleanup by Martyn Welch] Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-04-12ARM: dts: k2g-ice: add dt node for netcpMurali Karicheri
This patch adds dt node for DP83867 phy used on K2G ICE board and also enable netcp device nodes for the board. EVM hardware spec recommends to add 0.25 nsec delay in the tx direction and 2.25 nsec delay in the rx direction for internal delay in the clock path to be on the safer side. The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode 1. Unfortunately, the phy data manual disallows this. Add ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to enable workaround suggested for this incorrect strap setting. This ensures proper operation of this PHY. The dts bindings are kept in sync with that from 4.14.y linux kernel. This required the pinmux device related bindings to be commented out to allow for compilation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12ARM: dts: k2g-evm: remove unused phy-mode property from phy nodeMurali Karicheri
This patch removes the unused phy-mode property from the phy dt node. On K2G, currently link-interface determines if phy is used or not and is already set to use rgmii. So this is not needed. Besides phy-mode should be added to slave interface configuration of the cpsw driver, not in the phy node. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12ARM: k2g: add a workaround to reset the phyMurali Karicheri
This patch adds a workaround to reset the phy one time during boot using GPIO0 pin 10 to make sure, the Phy latches the configuration from the input pins correctly. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12ARM: k2g-ice: Add pinmux support for rgmii interfaceMurali Karicheri
This add pinmux configuration for rgmii interface so that network driver can be supported on K2G ICE boards. The pinmux configurations for this are generated using the pinmux tool at https://dev.ti.com/pinmux/app.html#/default As this required some BUFFER_CLASS definitions, same is re-used from the linux defnitions in include/dt-bindings/pinctrl/keystone.h Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12x86: dts: switch spi-flash to jedec, spi-nor compatibleNeil Armstrong
The x86 code and DT uses "spi-flash" to detect a flash node, switch to "jedec,spi-nor" in the DTS files and in fdtdec by switching the GENERIC_SPI_FLASH value to to jedec,spi-nor. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-12dts: switch spi-flash to jedec, spi-nor compatibleNeil Armstrong
There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot dts files. This compatible has been added in sf_probe, let use it. This patch switches to jedec,spi-nor when spi-flash is used in the DTS and DTSI files, and removed spi-flash when jedec,spi-nor is already present. The x86 dts are switched in a separate commit since it depends on a change in fdtdec. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-12ARM: mvebu: sync db-88f6820-amc.dts with Linux v5.0Chris Packham
Sync armada-385-db-88f6820-amc.dts with Linux. Retain the u-boot,dm-pre-reloc and nand differences. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: mvebu: rename armada-385-amc.dts to armada-385-db-88f6820-amc.dtsChris Packham
This board was added to u-boot first but the Linux maintainers requested a more descriptive name. Rename the file to match the Linux usage and update the board defconfig. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: kirkwood: remove obsolete call to icache_enableLeigh Brown
Commit 93b283d49f93 ("ARM: CPU: arm926ejs: Consolidate cache routines to common file") changed cache setup for Kirkwood such that icache_enable() is now called from enable_caches() which is called from initr_caches() which is in the list of functions in init_sequence_r[] prior to arch_misc_init(). This means the call to icache_enable() in arch_misc_init() is no longer required, so remove it. Signed-off-by: Leigh Brown <leigh@solinno.co.uk> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: mvebu: Add DB-XC3-24G4XG boardChris Packham
The DB-XC3-24G4XG is a switch development board from Marvell. It can either use and external CPU card such as the db-88f6820-amc or the internal CPU that is integrated into the switch. Add support for running U-Boot on the internal CPU and enable the USB, SPI and NAND peripherals. For now this needs the bin_hdr from the Marvell U-Boot for this board. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: mvebu: NAND clock support for MSYS devicesChris Packham
One difference with the integrated CPUs is that they use a different clock control block to the Armada devices. Update mvebu_get_nand_clock() accordingly. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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