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2019-07-29rockchip: rk3328: add boot_devices mapping to support 'same-as-spl'Kever Yang
The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3328: migrate to use common spl board fileKever Yang
rk3328 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3288: add boot_devices mapping to support 'same-as-spl'Kever Yang
The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3288-veyron: Migrate "u-boot, boot0" to "u-boot, spl-boot-order"Kever Yang
"u-boot,spl-boot-order" is more flexible and other rockchip SoCs has convert to use it, migrate to use the new dts property. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: phycore: remove no use "u-boot, boot0" in dtsKever Yang
We are using "u-boot,spl-boot-order" now and re-use the definition from rk3288-u-boot.dtsi, so remove it directly here. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3288: Migrate to use common spl board fileKever Yang
rk3288 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3288: move dram_init_banksize() into soc fileKever Yang
Mov edram_init_banksize() into rk3288.c so that we can re-use the common SPL board file later. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3288-phycore: move phycore_init() to its own board fileKever Yang
phycore_init() is use for phycore board only, it should be move back to phycore-rk3288.c Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3288: move setup_led() to firefly-rk3288Kever Yang
Only firefly-rk3288 has the dts node "u-boot,boot-led", while CONFIG_SPL_LED is not enable, move code to firefly-rk3288 now in case someone need this code. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3288: show SPL BANNER earlier in board_init_f()Kever Yang
Show the SPL BANNER earlier so that we know already get into SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: fit_spl_optee: rockchip: fix warning unit_address_vs_regKever Yang
Update to fix warning: u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/optee@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk322x: add boot_devices mapping to support 'same-as-spl'Kever Yang
The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk322x: migrate to use common spl board fileKever Yang
rk322x has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk322x: introduce arch_cpu_init() for SoC setting initKever Yang
Use arch_cpu_init() to init SoC secure region and move it to rk322x.c Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3188: migrate to use common spl board fileKever Yang
rk3188 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3188: add boot_devices mapping to support 'same-as-spl'Kever Yang
The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3188: move spl_board_init() into rk3188.cKever Yang
Clean up the rk3188.c so that we can re-use the common spl board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: Migrate to use BOOTROM_SUPPORT driverKever Yang
SPL bootrom support is a boot device just like mmc and etc, use formal boot device instead of jump to bootrom directly. Enable the Kconfig by default if ROCKCHIP_BACK_TO_BROM is enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3188: move usb uart init into arch_cpu_init()Kever Yang
The SoC feature init will be better to use arch_cpu_init() and goes to soc file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: rk3188: init CPU freq in clock driverKever Yang
Init CPU frquency in clock driver instead of in SPL board file, this will help for use common board file later. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29rockchip: add common spl board fileKever Yang
The common spl board file handles board_init_f() in SPL, and with board_early_init_f() and arch_cpu_init() callback, other operateion after board_init_f() should go to board specific spl_board_init(). Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29ARM: dts: colibri-imx6ull: extend lcdif nodeIgor Opaniuk
Provide proper display timings for lcdif node, used by mxsfb DM_VIDEO enabled framebuffer driver. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-29colibri-imx6ull: support building with DM_VIDEO=yIgor Opaniuk
1. This fixes linking issues when building with DM_VIDEO enabled mxsfb driver. 2. Provide proper defines for both VIDEO=y and DM_VIDEO=y. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-29ARM: dts: colibri_imx7: Fix lcdif node definitionIgor Opaniuk
Fix lcdif DT node and make it conform to the structure defined in the Linux devicetree bindings [1]. Currently there is support only for old style lcdif node definitions. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/display/mxsfb.txt Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-29ARM: dts: colibri_vf: Add dcu0 nodeIgor Opaniuk
Add dumb node for NXP Display Control Unit0(DCU), which permits DM_ENABLED converted driver to be probed. Currently no display timings are provided in this node. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-27Merge branch '2019-07-26-ti-imports'Tom Rini
- Bring in the rest of the J271E platform - Various OMAP3/AM3517, DA850 fixes
2019-07-27ARM: dts: Logic PD SOM-LV and Torpedo Boards: Resync DTSAdam Ford
Re-sync all Logic PD OMAP35 and AM/DM37 boards with Kernel 5.2.1 Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-27Merge tag 'u-boot-imx-20190719' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20190719 - CCF for i.MX6 - nandbcb command to write SPL into NAND - Switch to DM (i.MX28) - Boards: Toradex, engicam, DH - Fixes for i.MX8 - Fixes for i.MX7ULP Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-26ARM: am3517-evm: Migrate to SPL_OF_CONTROLAdam Ford
Like the other Logic PD OMAP35/DM37 boards, this board has device tree enabled for U-Boot. This patch converts the board to enable SPL_OF_CONTROL and further shrinks the device tree in SPL to limit it to UART3 (console), MMC1, i2c1, and GPIO4 (for mmc1 CD and WP). There appears to be a bug in minicom so users may need to switch the minicom terminal emulation to ANSI from VT102 due to the junk that gets pushed out of the UART on startup. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-26ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay valuesFaiz Abbas
Update the MMC2_HS200_MANUAL1 iodelay values to match with the latest dra76x data manual[1]. Also this particular pinctrl-array is using spaces instead of tabs for spacing between the values and the comments. Fix this as well. [1] http://www.ti.com/lit/ds/symlink/dra76p.pdf Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26ARM: dts: am57xx: Disable voltage switching for SD cardFaiz Abbas
If UHS speed modes are enabled, a compatible SD card switches down to 1.8V during enumeration. If after this a software reboot/crash takes place and on-chip ROM tries to enumerate the SD card, the difference in IO voltages (host @ 3.3V and card @ 1.8V) may end up damaging the card. The fix for this is to have support for power cycling the card in hardware (with a PORz/soft-reset line causing a power cycle of the card). Because the beaglebone X15 (rev A,B and C), am57xx-evms and am57xx-idks don't have this capability, disable voltage switching for these boards. The major effect of this is that the maximum supported speed mode is now high speed(50 MHz) down from SDR104(200 MHz). Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2Faiz Abbas
Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an issue where mmc2 (eMMC) was coming up in HS52 mode instead of the highest DDR52 mode. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullupFaiz Abbas
During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. Add a new pinctrl group for clock line without pullup to be used in boards where mmc1_clk line is not connected to an external pullup. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26arm: dts: k3-j721e: Add r5 specific dt supportLokesh Vutla
Add initial support for dt that runs on r5. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26arm: dts: k3-j721e: Add initial support for common processor boardLokesh Vutla
Common Processor board is the baseboard that has most of the actual connectors, power supply etc. A SOM (System on Module) is plugged on to the common processor board and this contains the SoC, PMIC, DDR and basic highspeed components necessary for functionality. Add initial dt support for this common processor board. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26arm: dts: ti: Add Support for J721E SoCLokesh Vutla
Add initial SoC definition for J721E SoC. Kernel dts posted here: https://lore.kernel.org/lkml/20190522161921.20750-1-nm@ti.com/ Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26board: ti: j721e: Add board support for j721e evmLokesh Vutla
Add board specific initialization for j721e evm Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv8: K3: j721e: Add custom MMU supportSuman Anna
The A72 U-Boot code loads and boots a number of remote processors including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various Main R5FSS Cores. Change the memory attributes for the DDR regions used by the remote processors so that the cores can see and execute the proper code. A separate table based on the current AM65x table is added for J721E SoCs, since the number of remote processors and their DDR usage will be different between the two SoC families. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Load SYSFW binary and config from boot mediaAndreas Dannenberg
Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the J721E early initialization sequence. While at it also initialize the MCU_UART0 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Shut down R5 core after ATF startup on A72Lokesh Vutla
Populate the release_resources_for_core_shutdown() api with shutting down r5 cores so that it will by called just after jumping to ATF. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Store boot index from ROMAndreas Dannenberg
Obtain the boot index as left behind by the device boot ROM and store it in scratch pad SRAM for later use before it may get overwritten. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv7R: K3: j721e: Unlock all applicable control MMR registersAndreas Dannenberg
To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MCU and MAIN domains. We may want to go back later and limit the unlocking that's being done. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv7R: K3: j721e: Add support for boot device detectionLokesh Vutla
J721E allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26arm: K3: j721e: Add basic support for J721E SoC definitionLokesh Vutla
The J721E SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable lower system costs of automotive applications such as infotainment, cluster, premium Audio, Gateway, industrial and a range of broad market applications. This SoC is designed around reducing the system cost by eliminating the need of an external system MCU and is targeted towards ASIL-B/C certification/requirements in addition to allowing complex software and system use-cases. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP, Two C66x floating point DSPs. * 3D GPU PowerVR Rogue 8XE GE8430 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and up to two DPI interfaces. * Integrated Ethernet switch supporting up to a total of 8 external ports in addition to legacy Ethernet switch of up to 2 ports. * System MMU (SMMU) Version 3.0 and advanced virtualisation capabilities. * Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems, 16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS * Centralized System Controller for Security, Power, and Resource Management (DMSC) See J721E Technical Reference Manual (SPRUIL1, May 2019) for further details: http://www.ti.com/lit/pdf/spruil1 Add base support for J721E SoC Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
2019-07-26arm: dts: k3-am654: Update power-domains property for each nodeLokesh Vutla
Update the power-domain-cells to 2 and add the permissions to each node. Mark the following nodes accessed by r5 as shared: - DDR node - main uart 0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: k3: Release all the exclusive devicesLokesh Vutla
Release all the exclusive devices held by SPL. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: am654: Shut down R5 core after ATF startup on A53Andreas Dannenberg
Rather than simply parking the R5 core in WFE after starting up ATF on A53 instead use SYSFW API to properly shut down the R5 CPU cores as well as associated timer resources that were pre-allocated. This allows software further downstream to properly and gracefully bring the R5 cores back online if desired. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26rockchip: declear boot_devices in bootrom.hKever Yang
boot_devices may defined in soc file, and used in board file, we need to delear it in header file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26rockchip: intruduce common BROM_BOOTSOURCE_ID_ADDRKever Yang
The boot source from BootRom is store at a fix offset of IRAM, update to use the common macro instead of rk3399 specific one. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-25net: davinci_emac: convert to using the driver modelBartosz Golaszewski
Now that we removed all legacy boards selecting TI_EMAC we can completely convert the driver code to using the driver model. This patch also updates all remaining users of davinci_emac. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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