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2018-06-13Merge git://git.denx.de/u-boot-x86Tom Rini
2018-06-13ARM: DTS: resync a3517.dtsi with Linux 4.17Adam Ford
Linux 4.17 was just released with some minor changes to the am3517.dtsi. This patch re-syncs the file. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13ARM64: meson: Sync DT with Linux 4.17Neil Armstrong
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.17.0 This will enable USB on Amlogic Meson GXL Boards like Khadas VIM, P212 or LibreTech-CC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-13sunxi: clock: Fix EHCI and OHCI clocks on A64Vasily Khoruzhick
EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29 Fixes commit fef73766d9ad ("sunxi: clock: Fix OHCI clock gating for H3/H5") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13x86: cougarcanyon2: Add missing chipset interrupt informationBin Meng
Add Panther Point chipset interrupt pin/PIRQ information, and enable the generation of PIRQ routing table and MP table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: irq: Support discrete PIRQ routing registers via device treeBin Meng
Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume consecutive PIRQ routing control registers. But this is not always the case on some platforms. Introduce a new device tree property intel,pirq-regmap to describe how the PIRQ routing register offset is mapped to the link number and adjust the irq router driver to utilize the mapping. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: irq: Parse number of PIRQ links from device treeBin Meng
The "intel,pirq-link" property in Intel IRQ router's dt bindings has two cells, where the second one represents the number of PIRQ links on the platform. However current driver does not parse this information from device tree. This adds the codes to do the parse and save it for future use. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: efi: payload: Enforce toolchain to generate 64-bit EFI payload stub codesBin Meng
Attempting to use a toolchain that is preconfigured to generate code for the 32-bit architecture (i386), for example, the i386-linux-gcc toolchain on kernel.org, to compile the 64-bit EFI payload does not build. This updates the makefile fragments to ensure '-m64' is passed to toolchain when building the 64-bit EFI payload stub codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: Conditionally build the pinctrl_ich6 driverBin Meng
The pinctrl_ich6 driver is currently unconditionally built for all x86 boards. Let's use a Kconfig option to control the build. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: irq: Change LINK_V2N and LINK_N2V to inline functionsBin Meng
LINK_V2N and LINK_N2V are currently defines, so they cannot handle complex logics. Change to inline functions for future extension. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: irq: Remove chipset specific irq router driversBin Meng
At present there are 3 irq router drivers. One is the common one and the other two are chipset specific for queensbay and quark. However these are really the same drivers as the core logic is the same. The two chipset specific drivers configure some registers that are outside the irq router block which should really be part of the chipset initialization. Now we remove these specific drivers and make all x86 boards use the common one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: cougarcanyon2: Enable CPU driver and SMP supportBin Meng
This enables the 206ax cpu driver on Intel Cougar Canyon 2 board, so that SMP can be supported too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: chromebook_link: Remove dm-pre-reloc property in the cpu nodesBin Meng
The 206ax cpu driver does not require pre-relocation flag to work. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: ivybridge: Drop CONFIG_USBDEBUGBin Meng
This is not used anywhere. Clean this up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: ivybridge: Enable 206ax cpu driver for FSP buildBin Meng
At present this 206ax cpu driver is only built when FSP is not used. This updates the Makefile to enable the build for both cases. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: cougarcanyon2: Update dts for SPI lock downBin Meng
It turns out that like Braswell, Intel FSP for IvyBridge requires SPI controller settings to be locked down, as the U-Boot ICH SPI driver fails with the following message on Cougar Canyon 2 board: "ICH SPI: Opcode 9f not found" Update the SPI node property to indicate this fact. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: ivybridge: Imply USB_XHCI_HCDBin Meng
The Panther Point chipset connected to Ivybridge has xHC integrated, imply it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13x86: baytrail: Correct the comment of IACORE_VIDS bit rangesBin Meng
The guaranteed vid bit ranges in IACORE_VIDS MSR is actually [22:16]. This corrects the comment for it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-12Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-06-12arm: mvebu: Add Helios4 Armada 38x initial supportDennis Gilmore
The helios4 is built on the SolidRun Armada 38x SOM. The port os based on the ClearFog board, using information from https://github.com/helios-4/u-boot-marvell as well as dtb input from https://github.com/helios-4/linux-marvell Signed-off-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-11LS1012AFRWY: Add Secure Boot supportVinitha V Pillai
Added the following: 1. defconfig for LS1012AFRWY Secure boot 2. PfE Validation support Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-11board: ls1012a: FRWY-LS1012A board supportBhaskar Upadhaya
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> [yorks: rebase and fix SPDX tag] [yorks: fix board/freescale/ls1012afrdm/Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08board: Kconfig: Re-Arrangement of PPA firmware and header addressesBhaskar Upadhaya
PPA firmware and header address may vary depending upon different boards, configure ppa firmware and header address in board specific Kconfig. Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-07ARM: orion5x: fix use of callee-saved registers in lowloevel_initMans Rullgard
The lowlevel_init function uses r4 and r6 without preserving their values as required by the AAPCS. Use r0 and r2 instead as these are call-clobbered. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Chris Packham <judge.packham@gmail.com>
2018-06-06Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2018-06-05mach-stm32: Enable SPL_RESET_SUPPORT flagPatrice Chotard
Since commit 0e373c0ade8c ("spl: add SPL_RESET_SUPPORT"), reset is supported in SPL, enable this flag for STM32F SoCs family. This allows to remove a specific case in RCC mfd driver. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-06-05ARM: add SBx81LIFKW boardChris Packham
This is a series of line cards for Allied Telesis's SBx8100 chassis switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16 and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05ARM: kirkwood: remove automatic I2C config if DM_I2C is enabledChris Packham
The mach/config.h file would helpfully define CONFIG_SYS_I2C and CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This conflicts with the way DM_I2C works. As a transitional measure don't automatically define these if CONFIG_DM_I2C is defined. It should be possible to remove this once all kirkwood boards are migrated to DM. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05arm: kirkwood: lsxl: Add SPI driver model supportMichael Walle
This patch shows how to enable driver model support for the LS-CHLv2 and LS-XHL boards. There are a couple of open questions: - do I need the u-boot,dm-pre-reloc tags in the device tree? - should mach/config.h define CONFIG_DM_SEQ_ALIAS? - how can we split this patch or are there any other pending patches which does the same and I didn't catch these. This patch is based on the http://git.denx.de/u-boot-marvell.git (master branch) and needs the following patches, which are still pending: https://patchwork.ozlabs.org/patch/909618/ https://patchwork.ozlabs.org/patch/909617/ https://patchwork.ozlabs.org/patch/909973/ Signed-off-by: Michael Walle <michael@walle.cc> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05arm: mvebu: switch clearfog to use device-tree i2c and gpioJon Nettleton
This switches the clearfog boards to use DM based gpio and i2c drivers. The io expanders are configured via their device-tree entries. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: add DT i2c aliases] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05mvebu: a38x: Force receiver detected on PCIe lanesRabeeh Khoury
Some QCA988x based modules presence is not detected by the SERDES lanes, so force this detection which will trigger the LTSSM state machine to negotiate link. An example of such a card is WLE900VX. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Chris Packham <judge.packham@gmail.com> Tested-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-04db410c: Added pre-relocation attribute to pinctrlRamon Fried
u-boot,dm-pre-reloc was missing from pinctrl and it's children node. causing failure to configure pin mux before relocation. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-04Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-06-04board: sun50i: Add Amarula A64-Relic initial supportJagan Teki
Amarula A64-Relic is A64 based IoT device, which support - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 1GB DDR3 RAM - 8GB eMMC - AP6330 Wifi/BLE - MIPI-DSI - CSI: OV5640 sensor - USB OTG - 12V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-06-03SPDX: Fixup tags from latest EFI PRTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-03Define board_quiesce_devices() in a shared locationSimon Glass
This undocumented function relies on arch-specific code to declare a nop weak version. Add the weak function in common code instead to avoid having to duplicate the same function in each arch. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03efi: sandbox: Add required linker sectionsSimon Glass
The EFI loader code requires certain linker sections to exist. Add these for sandbox so that the EFI loader code will link. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03sandbox: Add a setjmp() implementationSimon Glass
Add an implementation of setjmp() and longjmp() which rely on the underlying host C library. Since we cannot know how large the jump buffer needs to be, pick something that should be suitable and check it at runtime. At present we need access to the underlying struct as well. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03arm: armv7: allow unaligned memory accessHeinrich Schuchardt
The UEFI spec mandates that unaligned memory access should be enabled if supported by the CPU architecture. This patch implements the function unaligned_access() to reset the aligned access flag in the system control register (SCTLR). It is called when the bootefi command is invoked. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> [agraf: fix SPDX identifier] Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03efi_loader: build CRT0 and RELOC on x86_64Heinrich Schuchardt
The efi selftest and the hello application require CRT0 and RELOC to be built. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03efi_selftest: allow building relocation code on x86_64Heinrich Schuchardt
Variables EFI_RELOC and EFI_CRT0 have to be defined to build the EFI unit tests. This patch ensures this for the x86 architecure. If we compile with EFI_STUB, the bitness depends on CONFIG_EFI_STUB_64BIT. Otherwise the bitness depends on CONFIG_X86_64. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-02Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2018-06-01Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblazeTom Rini
Xilinx changes for v2018.07 second pull zynqmp: - Show reset reason - Remove emulation platform - Update pmufw version - Simplify mmc bootmode - Remove dc2 useless configuration file - Cleanup mini config - Defconfig syncup - zcu100, zcu104 and zcu111 dts fixes xilinx: - Use live-tree functions in some drivers - Add support for Avnet Minized and Antminer S9 fpga: - Add secure bitstream loading support mmc: - Add hs200 mode support usb xhci: - Header fix
2018-06-01Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2018-06-01fpga: zynqmp: Add secure bitstream loading for ZynqMPSiva Durga Prasad Paladugu
This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-01ARM: dts: rmobile: Sync R8A77990 Ebisu DTS with LinuxMarek Vasut
Import the R8A77990 and Ebisu DTS from linux-next to get the latest version. This makes AVB ethernet work in U-Boot since the ethernet node is now present in DT, as well as GPIOs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01ARM: renesas: Add R8A77990 E3 Ebisu boardMarek Vasut
Add support for the R8A77990 Ebisu board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01ARM: dts: rmobile: Add Renesas Ebisu board supportTakeshi Kihara
Basic support for the Renesas Ebisu board based on R-Car E3: - Memory, - Main crystal, - Serial console, Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [shimoda: rebase and add SPDX-License-Identifier] Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01ARM: dts: rmobile: Add Renesas R8A77990 SoC supportYoshihiro Shimoda
This patch adds basic support for the Renesas R-Car E3 (R8A77990) SoC: - PSCI - CPU (single) - Cache controller - Main clocks and controller - Interrupt controller - Timer - PMU - Reset controller - Product register - System controller - UART for console Inspried by a patch by Takeshi Kihara in the BSP. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01ARM: renesas: Add R8A77990 E3 SoC IDMarek Vasut
Add ID and Kconfig entry for the Renesas R8A77990 E3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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