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2017-05-22Convert CONFIG_CMD_GETTIME to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_GETTIME Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_FUSE to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_FUSE Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_FPGA_LOADBP et al to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_FPGA_LOADBP CONFIG_CMD_FPGA_LOADFS CONFIG_CMD_FPGA_LOADMK CONFIG_CMD_FPGA_LOADP Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_ESBC_VALIDATE to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ESBC_VALIDATE Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_ERRATA to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ERRATA Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_ENTERRCM to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ENTERRCM Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_EEPROM et al to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_EEPROM CONFIG_CMD_EEPROM_LAYOUT CONFIG_EEPROM_LAYOUT_HELP_STRING Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Rework Kconfig logic slightly, define EEPROM location on TI eval platforms] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_ECCTEST to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ECCTEST Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22lib: move hash CONFIG options to KconfigTom Rini
Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support using hardware acceleration.") created entries for CONFIG_SHA1, CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL. However, no defconfig has migrated to it. Complete the move by first adding additional logic to various Kconfig files to select this when required and then use the moveconfig tool. In many cases we can select these because they are required to implement other drivers. We also correct how we include the various hashing algorithms in SPL. This commit was generated as follows (after Kconfig additions): [1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL [2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL Note: We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously because there is dependency between them. Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_SPL_BOARD_INIT to KconfigLey Foon Tan
This converts the following to Kconfig: CONFIG_SPL_BOARD_INIT Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> [trini: Update the Kconfig logic] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22ARM: rmobile: Move address of IICDVFS(I2C) to rcar-gen3-base.hNobuhiro Iwamatsu
The IICDVFS(I2C) set in r8a7796.h is common in rcar-gen3. This moves CONFIG_SYS_I2C_SH_BASE0 in rcar-gen3-base.h. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22nds32: Support AE3XX platform.rick
Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
2017-05-22nds32: Support AG101P timer DM.rick
Support AG101P timer device tree flow. Signed-off-by: rick <rick@andestech.com>
2017-05-22nds32: Support AG101P serial DM.rick
Support AG101P serial device tree flow. Signed-off-by: rick <rick@andestech.com>
2017-05-22ARM: rmobile: Allow R8A7796 Salvator-X configurationMarek Vasut
The Salvator-X can have both H3 and M3 CPU on it, drop the select R8A7795 to allow both configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7796 supportMarek Vasut
Add Kconfig entry for the R8A7796 RCar M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Handle R8A7796 r1.1 in the PRR codeMarek Vasut
The R8A7796 r1.1 reports itself as r2.0 , add quirk into the PRR code to fix this report. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7796 into the CPU tableMarek Vasut
Add entry for the R8A7796 RCar M3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7795 into the CPU tableMarek Vasut
Add entry for the R8A7795 RCar H3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Make the Gen3 SoC configurableMarek Vasut
Allow selecting the Gen3 SoC in preparation for RCar M3 . No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Zap RCAR_GEN3_EXTRAM_BOOTMarek Vasut
This Kconfig option is not used on any board, so drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Import R8A7796 PFC and GPIO tablesMarek Vasut
Import the R8A7796 PFC and GPIO tables from the latest 3.5.3 release from Renesas . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Update R8A7795 PFC and GPIO tablesMarek Vasut
Sync the PFC and GPIO tables with the latest 3.5.3 release from Renesas . This adds ES2.0 support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-18Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2017-05-18Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2017-05-18ARM: dts: am335x-evm: disable mmc3Jean-Jacques Hiblot
SDIO is not supported in u-boot, there is no point in enabling mmc3. For this purpose, add u-boot specific dtsi that this will be included automatically while building the dtb. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-18arm: socfpga: Enable build for Arria 10Ley Foon Tan
Update Kconfig and Makefile to enable Arria 10. Clean up Makefile and sorting *.o alphanumerically. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add SPL support for Arria 10Ley Foon Tan
Add SPL support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: dts: Add dts and dtsi for Arria 10Ley Foon Tan
Device tree files for Arria 10 Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add misc support for Arria 10Ley Foon Tan
Add misc support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add pinmux for Arria 10Ley Foon Tan
Add pinmux support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add sdram header file for Arria 10Ley Foon Tan
Add sdram header file for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add system manager for Arria 10Ley Foon Tan
Add system manager register struct and macros for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add clock driver for Arria 10Ley Foon Tan
Add clock driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add reset driver support for Arria 10Ley Foon Tan
Add reset driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add A10 macrosLey Foon Tan
Add i2c, timer and other A10 macros. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure misc driverLey Foon Tan
Restructure misc driver in the preparation to support A10. Move the Gen5 specific code to gen5 file. Change all uint32_t_to u32. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure system managerLey Foon Tan
Restructure system manager in the preparation to support A10. No functional change. Change uint32_t to u32. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure reset manager driverLey Foon Tan
Restructure reset manager driver in the preparation to support A10. Move the Gen5 specific code to gen5 files. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure clock manager driverLey Foon Tan
Restructure clock manager driver in the preparation to support A10. Move the Gen5 specific code to _gen5 files. - Change all uint32_t to u32 and change to use macro BIT(n) for bit shift. - Check return value from wait_for_bit(). So change return type to int for cm_write_with_phase() and cm_basic_init(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: dts: imx7d-sdb: add usdhc supportPeng Fan
Add usdhc support Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-05-18arm: dts: imx7d-sdb: add i2c supportPeng Fan
Add i2c support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-05-18arm: dts: imx7d-sdb: add regulator node for usb and mmcPeng Fan
Add regulator node for usb and mmc. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-05-18arm: dts: imx7d-sdb: add spi gpio nodePeng Fan
Add spi gpio node for 74LV595. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-05-18arm: dts: imx7d-sdb add basic dtsPeng Fan
Add basic dts for i.MX7D-SDB board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-05-18arm: dts: imx7: sync with LinuxPeng Fan
Sync with Linux commit 308ac756("Merge tag 'gpio-v4.11-3'"). Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefan Agner <stefan.agner@toradex.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-05-18i.MX6UL: geam6ul: Add SETUP_IOMUX_PADSJagan Teki
Add generic SETUP_IOMUX_PADS function, for imx6ul mux pads. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-18icorem6: Make SPL to pick suitable fdtJagan Teki
SPL FIT is able to pick the suitable fdt file for u-boot, so add that function through board_fit_config_name_match. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-18geam6ul: Add modeboot env via board_late_initJagan Teki
Add runtime, modeboot env which is setting mmcboot, or nandboot based on the bootdevice so-that conditional macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should be avoided in config files. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-18icorem6: Add modeboot env via board_late_initJagan Teki
Add runtime, modeboot env which is setting mmcboot, or nandboot based on the bootdevice so-that conditional macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should be avoided in config files. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
generated by cgit (git 2.34.1) at 2024-12-29 16:13:04 +0000