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2019-01-28imx: mkimage_fit_atf: introduce BL33_BASE_ADDRPeng Fan
Introduce BL33_BASE_ADDR, then we could reuse this script for i.MX8QXP. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28dts: imx8qxp-mek: introduce u-boot dtsiPeng Fan
Introduce u-boot dtsi for i.MX8QXP MEK board. we do not introduce a common dtsi for SoC, because different board has different requirement on which needs to be enabled in SPL DM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28spl: imx8: add spl boot devicePeng Fan
Add spl_boot_device for i.MX8, also add BOOT_DEVICE_MMC2_2 for spl_boot_mode. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28arm: imx: build mach-imx for i.MX8Peng Fan
To enable SPL for i.MX8, we could reuse code in arch/arm/mach-imx. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx8: scu: use dedicated MU for SPLPeng Fan
SPL runs in EL3 mode, except MU0_A, others are not powered on, and could not be used. However normal U-Boot use MU1_A, so we could not reuse the one in dts. And we could not replace the one in dts with MU0_A, because MU0_A is reserved in secure world. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx8qxp: add SUPPORT_SPL optionPeng Fan
Enable SUPPORT_SPL option for i.MX8QXP, then we could enable SPL. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28arm: dts: imx7: colibri: add usdhci peripherals to device treeStefan Agner
Add usdhci peripherals to device tree. This allows to use DM_MMC for Colibri iMX7 devices. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2019-01-28arm: dts: imx7: colibri: split dt for raw NAND and eMMC devicesStefan Agner
In preparation of adding CONFIG_DM_MMC support use separate device trees for raw NAND and eMMC devices. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2019-01-28mx7: Do not call lcdif_power_down() in the SPL caseFabio Estevam
Like it was done on imx6 in commit 9236269de57d ("imx: mx6: Fix implementantion reset_misc") Do not call lcdif_power_down() in the SPL case to fix the following build error: LD spl/u-boot-spl MKIMAGE u-boot.img arch/arm/mach-imx/built-in.o: In function `reset_misc': /home/fabio/ossystems/u-boot/arch/arm/mach-imx/mx7/soc.c:372: undefined reference to `lcdif_power_down' scripts/Makefile.spl:375: recipe for target 'spl/u-boot-spl' failed Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx: Add PHYTEC phyBOARD-i.MX6UL-SeginMartyn Welch
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-01-28imx: hab: Convert non-NULL IVT DCD pointer warning to an errorBreno Matheus Lima
The following NXP application notes and manual recommend to ensure the IVT DCD pointer is Null prior to calling HAB API authenticate_image() function: - AN12263: HABv4 RVT Guidelines and Recommendations - AN4581: Secure Boot on i.MX50, i.MX53, i.MX 6 and i.MX7 Series using HABv4 - CST docs: High Assurance Boot Version 4 Application Programming Interface Reference Manual Commit ca89df7dd46f ("imx: hab: Convert DCD non-NULL error to warning") converted DCD non-NULL error to warning due to the lack of documentation at the time of first patch submission. We have warned U-Boot users since v2018.03, and it makes sense now to follow the NXP recommendation to ensure the IVT DCD pointer is Null. DCD commands should only be present in the initial boot image loaded by the SoC ROM. Starting in HAB v4.3.7 the HAB code will generate an error if a DCD pointer is present in an image being authenticated by calling the HAB RVT API. Older versions of HAB will process and run DCD if it is present, and this could lead to an incorrect authentication boot flow. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-01-26linker: Modify linker scripts to be more genericTom Rini
Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-26rockchip: Add TPL_MAX_SIZE for RK3288Tom Rini
Per Kever Yang, 32768 is a reasonable max size for TPL on RK3288. Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-01-26PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPLTom Rini
Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-26Merge branch '2019-01-25-master-imports'Tom Rini
- snapdragon 820c improvements - poplar updates - DFU + SPL cleanups - Improve the mediatek mmc driver - Other minor cleanups / improvements
2019-01-26ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry pointAndrew F. Davis
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to have an non-standard boot address in memory. This may be due to the device being a high security variant, which place the Initial SoftWare (ISW) after certificates and secure software. Allow these devices to set this from Kconfig. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-01-26spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFUAndrew F. Davis
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT to allow for cleaner use in code. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26arm64: dt: poplar: add optee nodeIgor Opaniuk
As Poplar supports running TF-A with OP-TEE as BL32 payload, add op-tee node in DT, which enables usage of OP-TEE driver (which provides an interface for requesting services from OP-TEE). Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-25poplar: clean up board level mmc initialization codeShawn Guo
We have converted mmc to driver model on Poplar. So let's clean up board level mmc initialization code. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-01-25poplar: sync up device tree with kernel 4.20Shawn Guo
It adds missing pinctrl headers, updates clock header and sync up Poplar device tree with kernel 4.20 release. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2019-01-25dts: 820c: Add pinctrl node and uart muxRamon Fried
* Add pinctrl node for TLMM and add mux request for uart node. * Rename uart to the actual board uart port. * Fix indentendation of sdhc2 node. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-25arm: mach-snapdragon: pinctrl: clarify gpio disable bitRamon Fried
The TLMM_GPIO_ENABLE bit is actually use to disable the GPIO. change it to TLMM_GPIO_DISABLE so it's clearer. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-25arm: mach-snapdragon: add pinctrl driver for db820cRamon Fried
Add pinctrl driver for Dragonboard820c, currently with only one mux func to initialize pins for serial console. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-25arm: mach-snapdragon: db820c: Actually init PLL for serialRamon Fried
The PLL for the UART was not set, and relied on previous initializtion made by LK. add the appropriate initialization. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-25arm: stm32mp1: deploy spl in root folderSean Nyekjær
Deploy u-boot-spl.stm32 binary in u-boot root folder like the rest of the boards. This makes it more streamlined when building in Yocto, Buildroot etc.. Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
2019-01-25Merge tag 'arc-fixes-for-2019.04-rc1' of git://git.denx.de/u-boot-arcTom Rini
A couple of trivial fixes and improvements for ARC Most notable are: * Move of ENV_SIZE/ENV_OFFSET to Kconfig * Fix with private structure allocation for arc_uart * Definition of CONFIG_SYS_CACHELINE_SIZE useful for building drivers
2019-01-25ARC: cache: define CONFIG_SYS_CACHELINE_SIZE as ARCH_DMA_MINALIGNAlexey Brodkin
Even though we don't use CONFIG_SYS_CACHELINE_SIZE in ARC-specific code it is used a lot in different drivers for alignment purposes. So we define it and make much more drivers at least compilable for ARC. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-01-25ARC: Fix iteration in arc_xx_version()Alexey Brodkin
"i" gets incremented before we're entering loop body and effectively we iterate from 1 to 8 instead of 0 to 7. This way we: a) Skip the first line of struct hs_versions b) Go over it and access memory beyond the structure Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-01-24Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2019-01-24Merge tag 'mpc85xx-for-v2019.04-rc1' of git://git.denx.de/u-boot-mpc85xxTom Rini
mpc85xx config.mk: Add support for -msingle-pic-base
2019-01-24ARM: zynq: Remove unused GEM addressesMichal Simek
With DM in place there is no need to have GEM addresses in headers. None is using them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Remove unused GEM addressesMichal Simek
With DM in place there is no need to have GEM addresses in headers. None is using them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24zynq: Kconfig: extend the bootstrap malloc() poolAnton Gerasimov
Most of the memory is being consumed by device binding code, more space needed for other data structures. Z-turn board has already hit the limit, others may follow soon. Measuring only the memory consumed in device_bind_common, I've got the following results (in decimal): root_driver: 108 mod_exp_sw: 108 amba: 120 serial@e0000000 aka uart0: 112 serial@e0001000 aka uart1: 88 spi@e000d000 aka qspi: 120 sdhci@e0100000 aka mmc0: 455 sdhci@e0100000.blk: 208 slcr@f8000000: 96 clkc@100: 72 (total) 1487 = 0x5cf of 0x600 Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24topic-miamiplus: Run CPU at 800MHz for speedgrade-2Mike Looijmans
The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz. Change the PLL setting to 800MHz, and adapt the setpoints in the devicetree. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Move SoC sources to mach-zynqmpMichal Simek
Similar changes was done for Zynq in past and this patch just follow this pattern to separate cpu code from SoC code. Move arch/arm/cpu/armv8/zynqmp/* -> arch/arm/mach-zynqmp/* And also fix references to these files. Based on "ARM: zynq: move SoC sources to mach-zynq" (sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Setup proper SPI dependencyMichal Simek
Select DM_SPI/DM_SPI_FLASH for the whole SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24ARM: zynqmp_r5: Setup DM_ETH/MMC if NET/MMC is enabledMichal Simek
Setup proper ETH/MMC dependency for the whole platform. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Setup DM_ETH/MMC if NET/MMC is enabledMichal Simek
Setup proper ETH/MMC dependency for the whole platform. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: versal: Setup DM_ETH/MMC if NET/MMC is enabledMichal Simek
Setup proper ETH/MMC dependency for the whole platform. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Fix mmc node names to be in sync with kernelSiva Durga Prasad Paladugu
This patches renames sd nodes in dts to be in line with kernel. This patch also modifies the references for the same in code. It checks mmc first to have no time penalty for new DT node names based on left-to-right expression evaluation. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Do not protect zynqmp_pmufw_version()Michal Simek
There is hard dependency for CLK_ZYNQMP to have zynqmp_pmufw_version() but also FPGA code is calling this function which is possible to use without actual CLK_ZYNQMP firmware driver to be enabled. This patch enables the case where only fixed-clock CLK setup is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-23mpc85xx: Add support for -msingle-pic-baseJoakim Tjernlund
-msingle-pic-base is a new gcc(from 4.6) option for ppc and it reduces the size of my u-boot with about 4-5 KB. While at it, add -fno-jump-tables too to save a few more bytes. e5500 core: size u-boot.bef text data bss dec hex filename 473043 23772 307104 803919 c444f u-boot.bef size u-boot.aft text data bss dec hex filename 453195 23772 307104 784071 bf6c7 u-boot.aft e500 core: size u-boot.bef text data bss dec hex filename 292998 17868 24968 335834 51fda u-boot.bef size u-boot.aft text data bss dec hex filename 288002 17868 24968 330838 50c56 u-boot.aft Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-23MSCC: Add board support for Serval SoC family.Horatiu Vultur
Add board support and configuration for Jaguar2 SoC family. The detection of the board type is based on the phy ids. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MSCC: Add device tree for Serval pcb106 boardHoratiu Vultur
Add device tree based on evaluation board pcb106. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23MSCC: add device tree for Serval pcb105 boardHoratiu Vultur
Add device tree based on evaluation board pcb105. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23MSCC: Add support for Serval SoC family.Horatiu Vultur
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MSCC: Add board support for Servalt SoC familyHoratiu Vultur
Add board support, configuration and DTS for Servalt SoC family. Currently there is one board in this family. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23MSCC: Add support for Servalt SoC family.Horatiu Vultur
As Ocelot, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23MIPS: mscc: ocelot: Add ethernet nodes for OcelotGregory CLEMENT
Import Ethernet related nodes from Linux Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-01-22nds32: dts: Fix mmc node compatible stringRick Chen
In the two commits: cf3922dddc44a968685b535f2af195f1e51f4a7b mmc: ftsdc010_mci: Sync compatible with DT mmc node c14e90e8445e7b1c3531b4bdeb778c47bd6570eb riscv: dts: Sync DT with Linux Kernel ftsdc010_mci's compatible has been modified as "andestech,atfsdc010" for RISC-V synchronization. But ae3xx.dts and ag101p.dts which are used for nds32 adp-ae3xx and adp-ag101p platforms did not be modified correctly at that time. It will cause mmc detection failure. Fix it here. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
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