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2018-04-09arm: zynq: Handle ENXIO error return value properlyMichal Simek
zynq_clk_get_rate() is also returning ENXIO which is not handled now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Rename dts for Z-turn boardAnton Gerasimov
Makes naming in line with other Zynq boards. Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Update dts for Z-turn boardAnton Gerasimov
Delete devices implemented in PL, stylistic changes. Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-06ARM: dts: Add new "generic" am4372 device tree file.Vignesh R
With U-boot runtime board detect for DTB selection a "default" dtb needs to be created. This will be used temporarily until the "proper" dtb is selected. Also, add -u-boot.dtsi for AM437x SK and IDK to enable I2C for board detection via DM_I2C. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06stm32mp: handle SYSRESETPatrick Delaunay
Add support of sysreset with generic driver "syscon-reboot" provided by RCC, for U-boot and for SPL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp: add syscon for STGENPatrick Delaunay
Add STGEN as SYSCON device: allow access to device address defined in device tree Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: change STGEN clock source to HSEPatrick Delaunay
No more use static frequency HSI = 64MHz for STGEN clock but HSE (with higher accurency) by default. Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency is provided at boot by BootRom and cp15 cntfrq and modified during clock tree initialization if needed. When HSI is no more used by any device, this internal oscillator can be switched off to reduce consumption. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06arm: timer: get frequency for arch timer armv7 in cp15 cntfrqPatrick Delaunay
Manage dynamic value for armv7 arch clock timer, when CONFIG_SYS_HZ_CLOCK is not defined. Get frequency from CP15 cntfrq information, initialized for example by first boot stage, clock driver or by BootRom. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: select boot device and partitionPatrick Delaunay
Bootrom loads SPL from SDCARD or eMMC according BootPin selection. Then SPL loads U-Boot on the same mmc device with the following predefined GPT partitioning: on SDCARD: gpt partitioning 1: SPL 2: SPL#2 3: U-Boot 4: bootable partition on eMMC: The 2 boot partitions are used for SPL (2 copy) boot1: SPL boot2: SPL#2 The user partition use gpt partitioning 1: U-Boot 2: bootable partition This patch select the correct SPL partition (3 for SDCARD on mmc0 and 1 for eMMC on mmc1) according the BootRom information saved in TAMP register and based on configuration flasg: - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new) => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot And the correct boot_targets is selected according the environment variables boot_device and boot_instance, with preboot command, to search the bootable partition with kernel on this device (generic distro support). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: get boot mode from BootRomPatrick Delaunay
SPL copy BootRom boot mode information in TAMP register 21. This TAMP register information is used after relocation to set 2 env variables - boot_device - boot_instance Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: add eMMC support for ED1Patrick Delaunay
Add command GPT support Add EMMC boot support Add the 2 other SDMMC instances for ED1: - SDMMC2 = mmc 1, eMMC on the ED1 board - SDMMC3 = extension connector, deactivated by default Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp: add check of cpu identifierPatrick Delaunay
Add support of DBGMCU_IDC for cpu identifier and revision Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp: cleanup cpu.cPatrick Delaunay
Move all defines at the beginning of the file Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06ARM: am33xx: Inhibit re-initialization of DDR during RTC-onlyRuss Dill
This inhibits the re-inititialization of DDR during an RTC-only resume. If this is not done, an L3 NOC error is produced as the DDR gets accessed before the re-init has time to complete. Tested on AM437x GP EVM. Signed-off-by: Russ Dill <Russ.Dill@ti.com> [j-keerthy@ti.com Ported to Latest Master branch] Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-04-06am43xx: Do not allow EMIF to control DDR_RESET in rtconly configDave Gerlach
Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for am43xx_evm_rtconly_config. Without this DDR is unstable and can become corrupted after multiple iterations of RTC+DDR mode. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [j-keerthy@ti.com Ported to latest master branch] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06ARM: AM43xx: Add support for RTC only + DDR in self-refresh modeTero Kristo
Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers for wakeup from RTC-only mode with DDR in self-refresh. Parse these registers during SPL boot and jump to the kernel resume vector if the device is waking up from RTC-only modewith DDR in Self-refresh. The RTC scratch register layout used is: SCRATCH0 : bits00-31 : kernel resume address SCRATCH1 : bits00-15 : RTC magic value used to detect valid config SCRATCH1 : bits16-31 : board type information populated by bootloader During the normal boot path the SCRATCH1 : bits16-31 are updated with the eeprom read board type data. In the rtc_only boot path the rtc scratchpad register is read and the board type is determined and correspondingly ddr dpll parameters are set. This is done so as to avoid costly i2c read to eeprom. RTC-only +DRR in self-refresh mode support is currently only enabled for am43xx_evm_rtconly_config. This is not to be used with epos evm builds. Signed-off-by: Tero Kristo <t-kristo@ti.com> [j-keerthy@ti.com Rebased to latest u-boot master branch] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06powerpc: mpc8xx: move watchdog into drivers/watchdogChristophe Leroy
In preparation of DM watchdog, move basic actions into drivers/watchdog Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: cleaning up watchdogChristophe Leroy
In preparation of migration to DM watchdog, clean up a bit. The 8xx watchdog really is a HW watchdog, so declare it as is then it goes through Kconfig And the watchdog reset doesn't mind getting interrupted, so no need to disable interrupts Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: refactorise reginfoChristophe Leroy
reginfo is redundant with some of the commands in immap.c, so move reginfo into that file and remove duplicated info. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06board: MCR3000: cleanup configChristophe Leroy
Some config is redundant with Kconfig. Fix it. Also remove unused configs Move SDRAM_MAX_SIZE in the only place it is used include/environment.h already defines CONFIG_ENV_SIZE from CONFIG_ENV_SECT_SIZE and defines CONFIG_ENV_ADDR as (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) remove BOOTARGS as bootargs is set by the different boot commands Fix CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE to be in line with CPM DPRAM organisation Remove CONFIG_SYS_GBL_DATA_SIZE, CONFIG_SYS_GBL_DATA_OFFSET and CONFIG_SYS_INIT_SP_OFFSET which are unused Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: initialisation of initial RAMChristophe Leroy
u-boot requires some RAM at startup, to store global data structure. RAM is also needed when we migrate to DM for some initial malloc This patch implements the proper init of that RAM by calling board_init_f_alloc_reserve() and board_init_f_init_reserve() Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: redistribute data in CPM dpramChristophe Leroy
Some malloc memory is needed at startup for DM model. Lets reorganise the use of the CPM dpram. The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as: IMMR + 0x2000..0x2800: BD/Data/Microcode IMMR + 0x2800..0x2e00: BD/Data IMMR + 0x2e00..0x3800: BD/Data/Microcode IMMR + 0x3800..0x3a00: BD/Data IMMR + 0x3a00..0x3c00: BD/Data/Microcode IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers Lets reallocate all BDs in the 3800..3a00 area and give the full 2800..2e00 for dynamic RAM allocation including global data That way, the microcode areas remain available if needed one day. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powercp: mpc8xx: move commproc.hChristophe Leroy
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and move it into arch/powerpc/include/asm Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xxChristophe Leroy
CONFIG_8xx doesn't mean much outside of arch/powerpc/ This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ... It also renames 8xx_immap.h to immap_8xx.h to be consistent with other file names. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: remove get_immr() argumentChristophe Leroy
get_immr() is always called with 0 as an argument, so it is useless. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: make get_immr() independent of CONFIG_8xxChristophe Leroy
SPRN_IMMR is defined regardless of the CPU. Therefore, there is no point in enclosing get_immr() inside a #ifdef CONFIG_8xx As it a static inline function, it will in any case only be compiled in functons using it. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: get rid of the multiple PVR_ valuesChristophe Leroy
Avoid hardcoding the PVR values in C since they are defined in processor.h At the same time, remove those multiple PVR values for 8xx and keep only one that we call PVR_8xx Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: harmonise initialisation of the immap local pointerChristophe Leroy
In most places, immap local pointer is defined as immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR; In a few places, it is defined as immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000); This patch replaces the few of the latest form by the other one. The two are fully equivalent since SPRN_IMMR is set with CONFIG_SYS_IMMR very early in start.S Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06at91: ma5d4evk: Enable DM_SPIJagan Teki
AT91 ma5d4evk board uses atmel spi driver, enable DM_SPI to use dm functionality. Kept few functions related to non-dm and gpio on board files for reference and will be remove once code moved to relevant drivers. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06at91: ma5d4evk: Add FDT supportJagan Teki
Sync DTS from Linux and add FDT support for AT91 ma5d4evk board. usb0, usb1, usb2 and hlcdc_pwm nodes removed, since there is no support it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06at91: ma5d4evk: Enable DMJagan Teki
Enable Driver model for AT91 ma5d4evk boards. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06at91: vinco: Enable DM_SPIJagan Teki
AT91 Vinco board uses atmel spi driver, enable DM_SPI to use dm functionality. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06at91: vinco: Add FDT supportJagan Teki
Sync DTS from Linux and add FDT support for AT91 vinco board. usb0, usb1, and usb2 nodes removed, since there is no support it. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06at91: vinco: Enable DMJagan Teki
Enable Driver model for AT91 Vinco boards. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06at91: taurus: Enable DM_SPIJagan Teki
Enable DM_SPI for atmel SPI driver on taurus board. Kept few functions related to non-dm and gpio on board files for reference and will be remove once code moved to relevant drivers. Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06at91: gurnard: Enable DM_SPIJagan Teki
Enable DM_SPI for atmel SPI driver on gurnard board. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06Merge tag 'signed-rpi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for rpi - 2018-04-06 Highlights this time around: - Support for new RPi3 B+ model - Fix for some SD cards on newer RPi firmware
2018-04-05mmc: use core clock frequency in bcm2835 sdhostJonathan Gray
In raspberrypi-firmware 7fdcd00e00a42a1c91e8bd6f5eb8352fe9358557 and later start.elf now sets the EMMC clock to 200 MHz. According to Phil Elwell in https://github.com/raspberrypi/firmware/issues/953 the SDHost controller shares the core/VPU clock and doesn't use the EMMC clock. Use the core clock id when determining the frequency to allow U-Boot to work with recent versions of raspberrypi-firmware. Otherwise U-Boot hangs at: U-Boot 2018.03 (Mar 14 2018 - 20:36:00 +1100) DRAM: 948 MiB RPI 3 Model B (0xa02082) MMC: mmc@7e202000: 0, sdhci@7e300000: 1 Loading Environment from FAT... Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04Merge git://git.denx.de/u-boot-sunxiTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-04arm: dts: sunxi: update H5 to new EMAC bindingAndre Przywara
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used by the OrangePi PC2 over to the new bindings used by the kernel. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04arm: dts: sunxi: update H3 to new EMAC bindingAndre Przywara
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used by the various H3 boards over to the new bindings used by the kernel. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04arm: dts: sunxi: update A64 to new EMAC bindingAndre Przywara
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used for the Pine64+ board over to the new bindings used by the kernel. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-03Merge tag 'arc-for-2018.05' of git://git.denx.de/u-boot-arcTom Rini
More ARC changes and fixes for v2018.05 * Update of ARC tools to the most recent arc-2017.09 * Fix for compile-time warning for AXS10x * Add support of platform-specific commands for HSDK * Add support for on-board SPI flash on HSDK Note though that for write support another series [1] is required. I hope that Jagan will be able to review and act on SPI flash improvement series before we get beyond RC1. Also note that to get clean build for HSDK we need to disable stack-usage check [2] as our current GCC erroneously tries to calculate stack-usage on a naked function which leads to warning. [1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796 [2] https://patchwork.ozlabs.org/patch/894139/
2018-04-03sunxi: dts: enable NAND on NES classicMiquel Raynal
Let the Nintendo NES Classic use the Macronix NAND chip on it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03sunxi: allow NAND support to be compiled for sun8i platformsMiquel Raynal
Add some clocks/PLL definitions as well as the dependency on MACH_SUN8I in Kconfig. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-02ARC: HSDK: Enable SPI flash supportEugeniy Paltsev
HSDK board has sst26wf016 SPI flash IC which we want to support. Add SPI controller, CS-gpio and SPI flash nodes to hsdk device tree. Enable corresponding options in hsdk defconfig. For SPI write functionality to work we need [1] which adds support of sst26xxx ICs. [1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796 Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02ARC: HSDK: Add platform-specific commandsEugeniy Paltsev
This patch add support of hsdk platform-specific commands: hsdk_clock set - set clock from axi_freq, cpu_freq and tun_freq environment variables/command line arguments hsdk_clock get - save clock frequencies to axi_freq, cpu_freq and tun_freq environment variables hsdk_clock print - show CPU, AXI, DDR and TUNNEL current clock frequencies. hsdk_clock print_all - show all currently used clock frequencies. hsdk_init - setup board HW in one of pre-defined configuration (hsdk_hs34 / hsdk_hs36 / hsdk_hs36_ccm / hsdk_hs38 / hsdk_hs38_ccm / hsdk_hs38x2 / hsdk_hs38x3 / hsdk_hs38x4) hsdk_go - run baremetal application on hsdk configured by hsdk_init command. This patch changes default behaviour of 'bootm' command: now we are able to set number of CPUs to be kicked by setting 'core_mask' environment variable before 'bootm' command run. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02ARC: AXS10x: DTS: Remove unused interrupt propertiesEugeniy Paltsev
Some device tree nodes (like ethernet, ohci, ehci) in axs10x_mb.dtsi were copied from linux device tree, so they have interrupts properties. As we don't use interrupts in uboot we don't have interrupt controller node in AXS10x device tree. In result we get warnings when we compile such device tree. So remove unused interrupts properties to get rid of this warnings. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-01Merge git://git.denx.de/u-boot-dmTom Rini
2018-04-01core: ofnode: Fix translation for #size-cells == 0Mario Six
Commit 286ede6 ("drivers: core: Add translation in live tree case") made dev_get_addr always use proper bus translations for addresses read from the device tree. But this leads to problems with certain busses, e.g. I2C busses, which run into an error during translation, and hence stop working. It turns out that of_translate_address() and fdt_translate_address() stop the address translation with an error when they're asked to translate addresses for busses where #size-cells == 0 (comment from drivers/core/of_addr.c): * Note: We consider that crossing any level with #size-cells == 0 to mean * that translation is impossible (that is we are not dealing with a value * that can be mapped to a cpu physical address). This is not really specified * that way, but this is traditionally the way IBM at least do things To fix this case, we check in both the live-tree and non-live tree-case, whether the bus of the device whose address is about to be translated has size-cell size zero. If this is the case, we just read the address as a plain integer and return it, and only apply bus translations if the size-cell size if greater than zero. Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Reported-by: Martin Fuzzey <mfuzzey@parkeon.com> Fixes: 286ede6 ("drivers: core: Add translation in live tree case") Reviewed-by: Simon Glass <sjg@chromium.org>
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