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2020-05-15spl: Always define preloader_console_initSamuel Holland
A large number of boards call preloader_console_init unconditionally. Currently, they fail to build with CONFIG_SPL_SERIAL=n, because the function is undefined in that case. To fix the build, always define preloader_console_init, but make it no-op when CONFIG_SPL_SERIAL=n. For the few boards that did check for CONFIG_SPL_SERIAL before calling preloader_console_init, remove the checks, since the function can now be called unconditionally. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-05-15rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32Trevor Woerner
Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRATrevor Woerner
Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner
Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15arm: orion5x: finish moving SoC to mach-orion5xTrevor Woerner
The SPL linker script had been left in arch/$(ARCH)/cpu/$(CPU)/$(SOC); therefore move it to the already-established arch/$(ARCH)/mach-$(SOC) location. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5XTrevor Woerner
Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15arch/arm/Makefile: sort machine namesTrevor Woerner
The comment immediately above the block of machine directory names implored users to keep the macro names sorted, but, alas, this is no longer the case. Put the list of machine directory names back in alphanumerical order by CONFIG_* macro name, as the comment asks. Sort all the symbols as though they all followed the convention of having the string "ARCH_" in the middle of their definitions. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15arm: lpc32xx: move SoC to mach-lpc32xxTrevor Woerner
Following the example of most other SoCs in arch/$(ARCH)/cpu/$(CPU)/$(SOC) move the lpc32xx code from arch/arm/cpu/arm926ejs/lpc32xx to arch/arm/mach-lpc32xx. Following the checklist from commit 01f14456306c ("ARM: prepare for moving SoC sources into mach-*"): [1] move files from arch/arm/cpu/arm926ejs/lpc32xx to arch/arm/mach-lpx32xx [2] add machine entry to arch/arm/Makefile [3] remove "obj-y += ..." from arch/arm/cpu/arm926ejs/Makefile [4] fix the Kconfig file path in arch/arm/Kconfig [5] (no MAINTAINERS update) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-14Merge tag 'u-boot-stm32-20200514' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - stm32mp1: migrate MTD and DFU configuration in Kconfig - stm32mp1: add command stm32prog - stm32mp1: several board and arch updates - stm32mp1: activate data cache in SPL and before relocation - Many improvment for AV96 board and DHCOR SoM (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM) - clk: stm32mp1: fix CK_MPU calculation - DT alignment of stm32mp1 device tree with Linux 5.7-rc2
2020-05-14Merge tag 'rpi-next-2020.07' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi - fix phy configuration for RPi4's bcmgenet - sync RPi4's env size with other RPi configs - add kconfig option to reserver more pages in the EFI mem map - add support for SDMA which is used by RPi4 - fix corner case boot bug for RPi3 32-bit
2020-05-14ARM: dts: stm32mp1: DT alignment with Linux 5.7-rc2Patrick Delaunay
DT alignment with Linux 5.7-rc2, including the kernel commits 431c89e6f323 ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards 79e965053872 ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards 877db62ea516 ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards 7519e95ba5f8 ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards f68e2dbc591a ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1 d6210da4f8bf ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x b65b6fc56925 ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c 1c1cf5996cfb ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1 bef15fc0fad9 ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1 b7fc0a87b9ac ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx a5e557655285 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards 8bc631b650a6 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1 fccd6a577bb3 ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board cc775a83db65 ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151 c5fae093511b ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1 9879e2165758 ARM: dts: stm32: add USB OTG pinctrl to stm32mp15 82ac8a81f985 ARM: dts: stm32: add USB OTG full support on stm32mp151 8714b26e2863 ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node a7959919709e ARM: dts: stm32: Add UART8 pins A pinmux entry on stm32mp1 4d7c53a684da ARM: dts: stm32: Add USART3 pins A pinmux entry on stm32mp1 80ab128332ee ARM: dts: stm32: Add SAI2A pins B pinmux entry on stm32mp1 ab7f98c0c546 ARM: dts: stm32: Add Ethernet0 RMII pins A pinmux entry on stm32mp1 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14arm: stm32mp: activate data cache on DDR in SPLPatrick Delaunay
Activate cache on DDR to improve the accesses to DDR used by SPL: - CONFIG_SPL_BSS_START_ADDR - CONFIG_SYS_SPL_MALLOC_START Cache is configured only when DDR is fully initialized, to avoid speculative access and issue in get_ram_size(). Data cache is deactivated at the end of SPL, to flush the data cache and the TLB. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14arm: stm32mp: activate data cache in SPL and before relocationPatrick Delaunay
Activate the data cache in SPL and in U-Boot before relocation. In arch_cpu_init(), the function early_enable_caches() sets the early TLB, early_tlb[] located .init section, and set cacheable: - for SPL, all the SYSRAM - for U-Boot, all the DDR After relocation, the function enable_caches() (called by board_r) reconfigures the MMU with new TLB location (reserved in board_f.c::reserve_mmu) and re-enable the data cache. This patch allows to reduce the execution time, particularly - for the device tree parsing in U-Boot pre-reloc stage (dm_extended_scan_fd =>dm_scan_fdt) - in I2C timing computation in SPL (stm32_i2c_choose_solution()) For example, the result on STM32MP157C-DK2 board is: 1,6s gain for trusted boot chain with TF-A 2,2s gain for basic boot chain with SPL For information, as TLB is added in .data section, the binary size increased and the SPL load time by ROM code increased (30ms on DK2). But early malloc can't be used for TLB because arch_cpu_init() is executed before the early poll initialization done in spl_common_init() called by spl_early_init() So it too late for this use case. And if I initialize the MMU and the cache after this function it is too late, as dm_init_and_scan and fdt parsing is also called in spl_common_init(). And .BSS can be used in board_init_f(): only stack and global can use before BSS init done in board_init_r(). So .data is the better solution without hardcoded location but if you have size issue for SPL you can deactivate cache for SPL only (with CONFIG_SPL_SYS_DCACHE_OFF). Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: stm32: Hog GPIO PF7 high on DHCOM to unlock SPI NOR nWPMarek Vasut
The SPI NOR nWP line is connected to GPIO PF7 on the SoM, pull the GPIO line high by default to clear SPI NOR WP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: dts: stm32: Synchronize DDR setttings on DH SoMsMarek Vasut
Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put them into use by the board file instead of the default ones. These new DRAM settings are a better fit for the SoMs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: dts: stm32: Fix AV96 and DHCOR splitMarek Vasut
The commit 132e5b68986d ("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board") was not applied correctly and in full, and omitted an important split of the SoM into 3V3 and 1V8 options. The Avenger96 board is based on the 1V8 IO option of the DHCOR SoM, however this is an optional modification of the 3V3 IO DHCOR SoM with extra on-SoM regulator to cater for the 96boards 1V8 IO requirements. Reinstate the split between the 1V8 and 3V3 IO variants. Fixes: 132e5b68986d ("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: dts: stm32mp15: use DDR3 files generated by STM32CubeMXPatrick Delaunay
Use the DDR3 dtsi files generated by STM32CubeMX 5.6.0 Speed Bin Grade = using DDR3-1066G / 8-8-8 and all others parameters at default value. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: update management of boot-ledPatrick Delaunay
Force boot-led ON and no more rely on default-state. This patch avoid device-tree modification for U-Boot. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14arm: stm32mp: spl: update error management in board_init_fPatrick Delaunay
Call hang when an error is detected for probe of any driver needed for console or DDR init: clk, reset and pincontrol NB: previous behavior with a return in board_init_f() was not correct; DDR is not initialized and SPL execution can't continue Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14arm: stm32mp: remove dependency for STM32KEYPatrick Delaunay
This command is not more depending on fuse command, but have direct access to BSEC misc driver, so the dependency with can be removed CMD_FUSE Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add support of RAM targetPatrick Delaunay
Add support of RAM target in flashlayout to load kernel image ("system") and device tree ("filesystem") in DDR with DFU and start these images. The flashlayout.tsv is: - 0x01 fsbl Binary none 0x00000000 tf-a.stm32 - 0x03 ssbl Binary none 0x00000000 u-boot.stm32 P 0x10 kernel System ram0 0xC2000000 uImage.bin P 0x11 dtb FileSystem ram0 0xC4000000 dtb.bin Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: support for scriptPatrick Delaunay
Support an U-Boot script included in uimage instead of flashlayout file (text file in tsv format). This feature is used to execute this script directly when U-Boot is loaded in DDR (for update without STM32CubeProgrammer for example). A simple example with dfu-util only is: $> echo "dfu 0" > script.cmd $> mkimage -C none -A arm -T script -d script.cmd script.uimg $> mkimage -T stm32image -a 0xC0000000 -e 0xC0000000 -d script.uimg \ script.stm32 $> dfu-util -d 0483:df11 -a 1 -D tf-a.stm32 $> dfu-util -d 0483:df11 -a 0 -D script.stm32 $> dfu-util -d 0483:df11 -a 0 -D u-boot.stm32 $> dfu-util -d 0483:df11 -a 0 -e Then you can used dfu-utils to update your device To increase speed, you can also switch to fastboot protocol with: echo "fastboot 0" > script.cmd Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: enable videoconsolePatrick Delaunay
Enable the videoconsole during the stm32prog command execution to have information without UART. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add serial link supportPatrick Delaunay
Add a support of UART, using the same protocol than MCU STM32. See "AN5275: USB DFU/USART protocols used in STM32MP1 Series bootloaders" for details. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add pmic NVM update supportPatrick Delaunay
Add a virtual partition to update the pmic non volatile memory. (on ST board, STPMIC1). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add otp update supportPatrick Delaunay
Add a virtual partition to update the STM32MP15x OTP based on SMC service provided by TF-A. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add support for delete option in flashlayoutPatrick Delaunay
Add support for delete option 'D' in flashlayout for full device or for partitions Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add support of ssbl copyPatrick Delaunay
For reliability of boot from NAND/SPI-NAND (with read-disturb issue) the SSBL can be present several time, when it is indicated in the flashlayout with "Binary(X)". The received binary is copied X times by U-Boot on the target. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: adapt the MTD partitionsPatrick Delaunay
Dynamically adapt the MTD partitions in NOR/NAND/SPI-NAND when stm32prog command detects in the parsed flash layout files: - a fsbl partition in NOR. - a tee partition in NOR/NAND/SPI-NAND Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add MTD devices supportPatrick Delaunay
Add support of MTD device (DFU_MTD backend) for NOR, NAND or SPI-NAND target. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add upport of partial updatePatrick Delaunay
Add support of partial update, update only some partitions, and check the coherence of the layout with the existing GPT partitions (offset and size). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add support of boot partition for eMMC devicePatrick Delaunay
Add support of eMMC device boot partition with part_id = -1 for offset="boot1" or = -2 for offset="boot2" The stm32prog command configures the MMC DFU backend with "mmcpart" and configure the eMMC (command "mmc bootbus" and "mmc partconf") when the update is done. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add MMC devicePatrick Delaunay
Add support of MMC device (based on DFU_MMC backend) for SD card and eMMC update. Create a GPT partitioning on the device. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: stm32prog: add flash layout parsingPatrick Delaunay
Build the list of device and of partition with a tab separated value file with a stm32 header: the FlashLayout.tsv (https://wiki.st.com/stm32mpu/wiki/STM32CubeProgrammer_flashlayout) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: add the command stm32progPatrick Delaunay
Add a specific command stm32prog for STM32MP soc family witch allows to program the boot devices with the tool STM32CubeProgrammer (http://www.st.com/STM32CubeProg). This command uses the same UART STM32 protocol than MCU STM32 with or USB with DFU protocol v1.1 (ithe MCU ST extension are no supported). The executed actions are based on a tab separated value file with a stm32 header, the FlashLayout file (https://wiki.st.com/stm32mpu/wiki/STM32CubeProgrammer_flashlayout). This file is parsed by the U-Boot command to: - initialize the devices - create the partition table on each device - initialize the DFU backend to access to not volatile memory (NOR/NAND/SD/eMMC) or to virtual device (OTP/PMIC) Up to STM32PROG_MAX_DEV (5) devices can be updated with a FlashLayout. The communication between U-Boot and STM32CubeProgrammer is done with the specific alternate configuration (see "AN5275: USB DFU/USART protocols used in STM32MP1 Series bootloaders" for details). The command stm32prog is executed when a boot from USB is detected (selected with bootpins) and we can program the boot devices with a simple command (on Windows or Linux): PC $> STM32_Programmer_CLI -c port=usb1 -w flaslayout.tsv 1/ the ROM code loads TF-A in embedded RAM (DFU or uart) 2/ TF-A loads flashlayout file and U-Boot in DDR (DFU or uart) 3/ U-Boot executes the stm32prog command (DFU or uart) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp: add function get_cpu_devPatrick Delaunay
Add a function get_cpu_dev to get the DEV_ID present in DBGMCU_IDC register. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: support boot from spi-nandPatrick Delaunay
Manage BOOT_FLASH_SPINAND, with boot_device="spi-nand" and treat this value in bootcmd_stm32mp. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: use FDT address provided by TF-A at boot timePatrick Delaunay
Save and use the FDT address provided by TF-A in r2 at boot time (it is NT_FW_CONFIG = Non Trusted Firmware configuration file) Address is saved in save_boot_params(), called by start.S and the used DTB is gd->fdt_blob = board_fdt_blob_setup(). If dtb is not provided or invalid, U-Boot use as fallback the builtin DTB. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp1: dynamically detect op-tee presencePatrick Delaunay
Activate OP-TEE driver for trusted and optee defconfig. This driver allows detection of TEE presence for boot from flash; CONFIG_STM32MP1_OPTEE is also removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: reserve memory for OP-TEE in device treePatrick Delaunay
Add reserve memory for OP-TEE in U-Boot and in kernel device tree: - no more reduce the DDR size in "memory" node: CONFIG_SYS_MEM_TOP_HIDE is no more used - U-Boot device-tree defines the needed "reserved-memory" for OP-TEE and U-Boot should not use this reserved memory: board_get_usable_ram_top use lmb lib to found the first free region, the not reserved memory, enough to relocate U-Boot: the needed size of U-Boot is estimated with gd->mon_len + CONFIG_SYS_MALLOC_LEN. - the optee node ("optee@...": firmware with compatible "linaro,optee-tz") and the associated "reserved-memory" are deactivated in kernel device tree when OP-TEE is not detected by U-Boot to prevent kernel issue (memory is reserved but not used, optee driver probe failed). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14ARM: stm32: Implement DDR3 coding on DHCOR SoMMarek Vasut
The DHCOR board does exist in multiple variants with different DDR3 DRAM sizes. To cater for all of them, implement DDR3 code handling. There are two GPIOs which code the DRAM size populated on the SoM, read them out and use the value to pick the correct DDR3 config. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14ARM: dts: stm32: Rework DDR DT inclusionMarek Vasut
Adjust the DDR configuration dtsi such that they only generate the DRAM configuration node, the DDR controller node is moved into the stm32mp157-u-boot.dtsi itself. This permits including multiple DDR configuration dtsi files in board DT. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14ARM: stm32: Implement board coding on AV96Marek Vasut
The AV96 board does exist in multiple variants. To cater for all of them, implement board code handling. There are two GPIOs which code the type of the board, read them out and use the value to pick the correct device tree from an fitImage. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Change-Id: Iddb330b9a66500495885457cbe17edc0eacaaf43
2020-05-14ARM: stm32: Add board_early_init_f() to SPLMarek Vasut
Add weak implementation of board_early_init_f() hook into the STM32MP1 SPL. This can be used to read out e.g. configuration straps before initializing the DRAM. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-13ARC: HSDK: add reset for EHCIEugeniy Paltsev
Add reset phandle to EHCI device tree node to make on-chip reset controller usable with EHCI. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13ARC: DTS: cleanup USB node namesEugeniy Paltsev
Remove redundant '0x' from node names. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13rpi: Kconfig option for initial page reservationKyle Evans
While the nearly-universal default for the Raspberry Pi family is to use spin tables and the spin table implementation provided by the Raspberry Pi Foundation, FreeBSD and others may use a PSCI implementation instead. Accommodate these setups by allowing them to configure for more than one page to be reserved in the initial reservation. The default reservation remains as one page. Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12Merge tag 'u-boot-amlogic-20200511' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Enable USB Host for Odroid-C2 board - Add Open-Drain/Open-Source emulation in GPIO uclass
2020-05-12arm: dts: bcm283x: Allow UARTs to work before relocationSimon Glass
At present the pinctrl nodes are not enabled in pre-relocation U-Boot so the UARTs do not correctly select the pinconfig to enable the UART pins. Fix this so that the U-Boot banner is printed. This fixes serial output on rpi_3b_32b with the following config.txt options: enable_uart=1 gpu_freq=250 Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 9821636b64 (bcm2835_pinctrl: Probe pre-reloc) Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-11Merge tag 'ti-v2020.07-rc2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix boot issues on Nokia RX-51 - Configure AM6 CPSW for 10Mbps in rgmii mode. - Minor changes for J721e
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