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2018-11-26riscv: save hart ID and device tree passed by prior boot stageLukas Auer
Store the hart ID and device tree passed by the prior boot stage (in a0 and a1) in registers s0 and s1. Replace one use of s1 in start.S to avoid overwriting it. The device tree is also stored in memory to make it available to U-Boot with the configuration CONFIG_OF_PRIOR_STAGE. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: do not blindly modify the mstatus CSRLukas Auer
The mstatus CSR includes WPRI (writes preserve values, reads ignore values) fields and must therefore not be set to zero without preserving these fields. It is not apparent why mstatus is set to zero here since it is not required for U-Boot to run. Remove it. This instruction and others encode zero as an immediate. RISC-V has the zero register for this purpose. Replace the immediates with the zero register. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: remove unused labels in start.SLukas Auer
The labels nmi_vector, trap_vector and handle_reset in start.S are not used for RISC-V. Remove them. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-26Drop CONFIG_INIT_CRITICALBin Meng
This is now deprecated and no board is using it. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-11-26riscv: align mtvec on a 4-byte boundaryLukas Auer
The machine trap-vector base address (mtvec) must be aligned on a 4-byte boundary. Add the necessary align directive to trap_entry. This patch also removes the global directive for trap_entry, which is not required. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-26riscv: fix inconsistent use of spaces and tabs in start.SLukas Auer
start.S uses both tabs and spaces after instructions. Fix this by only using tabs after instructions. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: implement the invalidate_icache_* functionsLukas Auer
Implement the functions invalidate_icache_range() and invalidate_icache_all(). RISC-V does not have instructions for explicit cache-control. The functions in this patch are implemented with the memory ordering instruction for synchronizing the instruction and data streams. This may be implemented as a cache flush or invalidate on simple processors, others may only invalidate the relevant cache lines. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: hang on unhandled exceptionsLukas Auer
Hang on unhandled exceptions to prevent execution in a faulty state. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: treat undefined exception codes as reservedLukas Auer
Undefined exception codes currently lead to an out-of-bounds array access. Prevent this by treating undefined exception codes as "reserved". Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: complete the list of exception codesLukas Auer
Only the first four exception codes are defined. Add the missing exception codes from the definition in RISC-V Privileged Architecture Version 1.10. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: do not reimplement generic io functionsLukas Auer
RISC-V U-Boot reimplements the generic io functions from asm-generic/io.h. Remove the redundant implementation and include the generic io.h instead. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: make use of the barrier functions from LinuxLukas Auer
Replace the barrier functions in arch/riscv/include/asm/io.h with those defined in barrier.h, which is imported from Linux. This version is modified to remove the include statement of asm-generic/barrier.h, which is not available in U-Boot or required. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: fix use of incorrectly sized variablesLukas Auer
The RISC-V arch incorrectly uses 32-bit instead of 64-bit variables in several places. Fix this. In addition, BITS_PER_LONG is set to 64 on RV64I systems. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-26riscv: enable -fdata-sectionsLukas Auer
Enable the -fdata-sections compiler option for RISC-V. Buildman reports the binary size decrease from this as 8365.3 bytes. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: set -march and -mabi based on the Kconfig configurationLukas Auer
Use the new Kconfig entries to construct the ISA string for the -march compiler flag. The -mabi compiler flag is selected based on the base integer instruction set. With this change, the C (compressed instructions) ISA extension is now enabled for all boards with CONFIG_RISCV_ISA_C set. Buildman reports a decrease in binary size of 71590 bytes. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-26riscv: add Kconfig entries for the C and A ISA extensionsLukas Auer
Add Kconfig entries for the C (compressed instructions) and A (atomic instructions) ISA extensions. Only the C ISA extension is selectable. This matches the configuration in Linux. The Kconfig entries are not used yet. A follow-up patch will select the appropriate compiler flags based on the Kconfig configuration. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-26riscv: select CONFIG_PHYS_64BIT on RV64I systemsLukas Auer
CONFIG_PHYS_64BIT should be enabled on RV64I systems. Select it. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-26riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64ILukas Auer
RISC-V defines the base integer instruction sets as RV32I and RV64I. Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_RV64I to match this convention. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-20sf: Add a method to obtain the block-protect settingSimon Glass
It is useful to obtain the block-protect setting of the SPI flash, so we know whether it is fully open or (perhaps partially) write-protected. Add a method for this. Update the sandbox driver to process this operation and add a test. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20misc: Update read() and write() methods to return bytes xferedSimon Glass
At present these functions return 0 on success. For some devices we want to know how many bytes were transferred. It seems useful to adjust the API to be more like the POSIX read() and write() functions. Update these two methods, a test and all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-20sandbox: Update some drivers to work in SPL/TPLSimon Glass
At present sandbox drivers are mostly not used before relocation. Some of these are needed by Chromium OS verified boot, since it uses sandbox TPL, so update them accordingly. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20sandbox: Add a function to read a host fileSimon Glass
Add a way to read a file from the host filesystem. This can be useful for reading test data, for example. Also fix up the writing function which was not the right version, and drop the debugging lines. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20sandbox: remove stray DEBUGHeinrich Schuchardt
DEBUG should not be defined in production code. Change printf() to debug() where this writes a debug message. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-20ARM: mvebu: dts: add Clearfog GT-8KRabeeh Khoury
The SolidRun Clearfog GT-8K is based on Armada 8040. https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k The config file is identical to the Macchiatobin one (mvebu_mcbin-88f8040_defconfig) with only the default device-tree changed. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20arm64: mvebu: a8k: autodetect RAM sizeBaruch Siach
Some Armada 8K boards like Macchiatobin and Clearfog GT-8K use RAM from external DIMM. Hard coding the RAM size in the device-tree is not convenient. Fortunately, the ATF that initializes the RAM knows the size of RAM, and U-Boot can query the ATF using a SMC call. The ATF maps the lower 3G of RAM starting at address 0. Higher RAM is mapped at 4G. This leaves a 1G hole between 3G and 4G for IO peripherals. Use a second bi_dram[] entry to describe the higher RAM area. As a result, CONFIG_NR_DRAM_BANKS must be set to 2 to use more than 3GB RAM. This code in this commit is mostly taken from downstream Marvell U-Boot code by Grzegorz Jaszczyk. Cc: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20linux/sizes.h: sync from kernelBaruch Siach
The kernel added SZ_4G macro in commit f2b9ba871b (arm64/kernel: kaslr: reduce module randomization range to 4 GB). Include linux/const.h for the _AC macro. Drop a local SZ_4G definition in tegra code. Cc: Tom Warren <twarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20MIPS: drop asm/const.hBaruch Siach
Commit 86f21c96f467368 (mips: Use common _AC macro now.) removed the _AC definition from const.h. All other macros defined in const.h are not used anywhere, and there is now no user of this header. Remove this header. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20Use _AC and UL macros from linux/const.hBaruch Siach
Drop the _AC and UL macros from common.h. Linux headers is the original source of this macro, so keep its definition in the same header. Update existing users of these macros to include const.h directly. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Rick Chen <rick@andestech.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-18MIPS: fix linking of standalone programsDaniel Schwierzeck
Use the global MIPS specific u-boot.lds for linking standalone programs instead of the outdated ones in examples/standalone/. Also pass --gc-sections in LDFLAGS_STANDALONE to optimize the size of standalone programs. Finally remove the deprecated config.mk files in arch/mips/cpu/mips[32,64]/. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18Kbuild: add LDFLAGS_STANDALONEDaniel Schwierzeck
Introduce a new Makefile variable for passing LDFLAGS to standalone programs. Currently the variable CONFIG_STANDALONE_LOAD_ADDR is misued on some archs to pass a specific linker script. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-18mips: mt76xx: linkit-smart-7688: Misc updates to dts/config/defconfigStefan Roese
These misc updates include the following changes: - Change baudrate from 57600 to 115200 - Enable MIPS_BOOT_CMDLINE_LEGACY - Enable FIT support - Enable ethernet support - Enable SPI support - Enable GPIO support - Change max image size from 0x40000 to 0x80000 A note about the baudrate change: The original Mediatek U-Boot version used 57600 baud. Lets move to a more common and faster speed of 115200 baud. And remove the "console=" property from the DT as its not needed. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: gardena-smart-gateway: Misc updates to dts/config/defconfigStefan Roese
These misc updates include the following changes: - Change baudrate from 57600 to 115200 - Enable MIPS_BOOT_CMDLINE_LEGACY - Enable FIT support - Enable ethernet support - Enable SPI NOR and NAND support - Change MTD_UBI_BEB_LIMIT to 22 - Enable MTD Support - Enable GPIO support - Enable watchdog support - Enable bootcounter support - Enable version variable - Change max image size from 0x80000 to 0xa0000 - Change SYS_MALLOC_LEN to 16MiB (because of UBI/UBIFS) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: gardena-smart-gateway: Add board_late_init() to set LED def stateStefan Roese
This is needed to set the LEDs automatically to a default state, as configured in the dts. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: gardena-smart-gateway: Add LEDs to dtsStefan Roese
Add the available LEDs to the DTS file so that they can be used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Enable watchdog supportStefan Roese
This patch enables and starts the watchdog on the MT7620 platform. Currently the WD timeout is configured to 60 seconds. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [fixed build error due to missing function prototype arch_misc_init] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Kconfig: Add ethernet and GPIO supportStefan Roese
Imply DM_ETH and DM_GPIO for ARCH_MT7620, as this platform now supports ethernet and GPIO as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Add watchdog DT node to mt7628a.dtsiStefan Roese
Add the watchdog DT node to the DTS file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Add GPIO DT nodes to mt7628a.dtsiStefan Roese
Add the GPIO DT nodes to the DTS file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Add ethernet DT node to mt7628a.dtsiStefan Roese
Add the ethernet DT node to the DTS file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR initStefan Roese
This fixes an issue which has been noticed on the Gardena board, with the watchdog enabled, where the watdchdog reset (after a system hang) did result in reporting of 2.9 GiB and a hang after this. With this patch applied the memory controller is correctly reset and initialized again even after a watchdog reset. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-16armv7r: dts: am654: Add initial supportLokesh Vutla
Add R5 specific dts for am654-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-11-16arm: dts: k3: Sync dts from LinuxLokesh Vutla
Sync the k3-am654 specific dts files from Linux next with tag 20181019. This changes are in queue for Linux v4.20-rc1 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support for triggering ddr init from SPLLokesh Vutla
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support to start ATF from R5 SPLLokesh Vutla
Considering the boot time requirements, Cortex-A core should be able to start immediately after SPL on R5. Add support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support for generating build targetsLokesh Vutla
Update Makefiles to generate: - tiboot3.bin: Image format that can be processed by ROM. Below is the tiboot3.bin image format that is required by ROM: _______________________ | X509 | | Certificate | | ____________________ | | | | | | | u-boot-spl.bin | | | | | | | |___________________| | |_______________________| Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16armv7R: K3: am654: Enable MPU regionsLokesh Vutla
Enable MPU regions for AM654 evm: - Region0: 0x00000000 - 0xFFFFFFFF: Device memory, not executable - Region1: 0x41c00000 - 0x42400000: Normal, executable, WB, Write alloc - Region2: 0x80000000 - 0xFFFFFFFF: Normal, executable, WB, Write alloc - region3-15: Disabled With this dcache can be enabled either in SPL or U-Boot. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16ram: Introduce K3 AM654 DDR Sub System driverLokesh Vutla
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
2018-11-16arm: Make arch specific memcpy thumb-safe.Klaus Goger
The current arch implementation of memcpy cannot be called from thumb code, because it does not use bx instructions on return. This patch addresses that. Note, that this patch does not touch the hot loop of memcpy, so performance is not affected. Tested on MXS (arm926ejs) with and without thumb-mode enabled. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2018-11-16test/py: test pinmux commandPatrice Chotard
Add pinmux test which test the following commands: - pinmux list - pinmux dev - pinmux status Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Mark some tests as sandbox-centric] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-16ARM: DTS: Resync am3517-evm.dts with Linux 4.19Adam Ford
Some minor changes have been made to the AM3517-evm and the underlying am3517.dtsi files. This patch re-sync's the DTS and DTSI files with Linux. Signed-off-by: Adam Ford <aford173@gmail.com>