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2020-04-14Merge branch 'master' of git://git.denx.de/u-boot-marvellTom Rini
- Misc enhancements to Clearfog, including board variant detection (Joel) - Misc enhancements to Turris Mox, including generalization of the ARMADA37xx DDR size detection (Marek)
2020-04-14arm64: mvebu: a37xx: add device-tree fixer for PCIe regionsMarek Behún
In case when ARM Trusted Firmware changes the default address of PCIe regions (which can be done for devices with 4 GB RAM to maximize the amount of RAM the device can use) we add code that looks at how ATF changed the PCIe windows in the CPU Address Decoder and changes given device-tree blob accordingly. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm64: mvebu: a37xx: improve code determining memory info structuresMarek Behún
Currently on Armada-37xx the mem_map structure is statically defined to map first 2 GB of memory as RAM region, and system registers and PCIe region device region. This is insufficient for when there is more RAM or when for example the PCIe windows is mapped to another address by the CPU Address Decoder. In the case when the board has 4 GB RAM, on some boards the ARM Trusted Firmware can move the PCIe window to another address, in order to maximize possible usable RAM. Also the dram_init and dram_init_banksize looks for information in device-tree, and therefore different device trees are needed for boards with different RAM sizes. Therefore we add code that looks at how the ARM Trusted Firmware has configured the CPU Address Decoder windows, and then we update the mem_map structure and compute gd->ram_size and gd->bd->bi_dram bank base addresses and sizes accordingly. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm64: mvebu: armada-8k: move dram init codeMarek Behún
Move Armada-8k specific DRAM init code into armada-8k specific directory. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm: mvebu: dts: turris_mox: fix USB3 regulatorMarek Behún
Commit e8e9715df2d4 requires the USB3 regulator node to have the enable-active-high property for the regulator to work properly. The GPIO_ACTIVE_HIGH constant is not enough anymore. Signed-off-by: Marek Behún <marek.behun@nic.cz> Fixes: e8e9715df2d4 ("regulator: fixed: Modify enable-active-high...") Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm: mvebu: dts: turris_mox: update sdhci propertiesMarek Behún
With recent changes to the mmc subsystem (chip detect code etc) update the sdhci node of the Turris Mox device tree. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm: mvebu: clearfog: initial ClearFog Base variantJoel Johnson
Add a unique entry for ClearFog Base variant, reflected in the board name and adjusted SerDes topology. Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm: mvebu: solidrun: remove hardcoded DTS MAC addressJoel Johnson
Using a consistent hardcoded MAC address from the DTS file causes issues when using multiple devices on the same network segment. Instead rely on environment configuration or random generation. Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm: mvebu: fix SerDes table alignmentJoel Johnson
Tested on Solidrun ClearFog Base. Table alignment was: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 3 | SATA1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | USB3 HOST0 | | 5 | 4 | SGMII2 | -------------------------------- After the change, it's correctly aligned as: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 5 | PCIe1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | PCIe2 | | 5 | 0 | SGMII2 | -------------------------------- Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm: mvebu: update RTC values for PCIe memory wrappersChris Packham
Update the RTC (Read Timing Control) values for PCIe memory wrappers following an ERRATA (ERRATA# TDB). This means the PCIe accesses will used slower memory Read Timing, to allow more efficient energy consumption, in order to lower the minimum VDD of the memory. Will lead to more robust memory when voltage drop occurs (VDDSEG) The code is based on changes from Marvell's U-Boot, specifically: https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/20cd2704072512de176e048970f2883db901674b https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/eb608a7c8dd0d42b87601a61b9c0cc5615ab94b2 https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c4af19ae2bf08cf6e450e741ce4f04d402a5cb6b Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14arm: mvebu: dts: Sort Armada series dts alphabeticallyJosip Kelecic
Sort the Armada series dts in the Makefile alphabetically prior to adding new board support. Signed-off-by: Josip Kelečić <josip.kelecic@sartura.hr> Reviewed-by: Luka Kovacic <luka.kovacic@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-13Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2020-04-13Merge branch 'next'Tom Rini
Pull in changes that have been pending in our 'next' branch. This includes: - A large number of CI improvements including moving to gcc-9.2 for all platforms. - amlogic, xilinx, stm32, TI SoC updates - USB and i2c subsystem updtaes - Re-sync Kbuild/etc logic with v4.19 of the Linux kernel. - RSA key handling improvements
2020-04-13arm: socfpga: arria10: Enable cache driver in SPLLey Foon Tan
Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE to enable cache driver in SPL. This fixed error below in SPL: cache controller driver NOT found! Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13arm: dts: arria10: Update dtsi/dts from LinuxLey Foon Tan
Update these 3 files from Linux:. - socfpga_arria10.dtsi (Commit ID c1459a9d7e92) - socfpga_arria10_socdk.dtsi (Commit ID d9b9f805ee2b) - socfpga_arria10_socdk_sdmmc.dts (Commit ID 17808d445b6f) Change in socfpga_arria10.dtsi: - Add clkmgr label, so that can reference to it in u-boot.dtsi. Change in socfpga_arria10-u-boot.dtsi: - Add compatible and altr,sysmgr-syscon for uboot. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13arm: dts: arria10: Move uboot specific properties to u-boot.dtsiLey Foon Tan
Move Uboot specific properties to *u-boot.dtsi files. Preparation to sync Arria 10 device tree from Linux. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13ARM: socfpga: Enable DM RTC bootcount on ABB SECU1Marek Vasut
Add and enable RTC-backed boot counter on ABB SECU1 platform. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-10kconfig / kbuild: Re-sync with Linux 4.19Tom Rini
Align Kconfig and Kbuild logic to Linux 4.19 release with minimal impact on files outside of this scope. Our previous Kconfig sync was done by commit 5972ff077e0f ("kconfig / kbuild: re-sync with Linux 4.18"). In this particular re-sync in order to keep clang support working a number of related changes needed to be pulled in that had been missed previously. Not all of these changes we easily traceable and so have been omitted from the list below. The imported Linux commits are: [From prior to v4.18] 9f3f1fd29976 kbuild: Add __cc-option macro d7f14c66c273 kbuild: Enable Large File Support for hostprogs 6d79a7b424a5 kbuild: suppress warnings from 'getconf LFS_*' 24403874316a Shared library support 86a9df597cdd kbuild: fix linker feature test macros when cross compiling with Clang 0294e6f4a000 kbuild: simplify ld-option implementation [From v4.18 to v4.19] 96f14fe738b6 kbuild: Rename HOSTCFLAGS to KBUILD_HOSTCFLAGS 10844aebf448 kbuild: Rename HOSTCXXFLAGS to KBUILD_HOSTCXXFLAGS b90a368000ab kbuild: Rename HOSTLDFLAGS to KBUILD_HOSTLDFLAGS 8377bd2b9ee1 kbuild: Rename HOST_LOADLIBES to KBUILD_HOSTLDLIBS f92d19e0ef9b kbuild: Use HOST*FLAGS options from the command line 4ab3b80159d4 kconfig: check for pkg-config on make {menu,n,g,x}config 693359f7ac90 kconfig: rename SYMBOL_AUTO to SYMBOL_NO_WRITE f60b992e30ff kbuild: replace $(LDFLAGS) $(ldflags-y) with $(ld_flags) 2fb9279f2c3e kbuild: change ld_flags to contain LDFLAGS_$(@F) c931d34ea085 arm64: build with baremetal linker target instead of Linux when available 5accd7f3360e kconfig: handle format string before calling conf_message_callback() a2ff4040151a kconfig: rename file_write_dep and move it to confdata.c 0608182ad542 kconfig: split out useful helpers in confdata.c adc18acf42a1 kconfig: remove unneeded directory generation from local*config 79123b1389cc kconfig: create directories needed for syncconfig by itself 16952b77d8b5 kconfig: make syncconfig update .config regardless of sym_change_count d6c6ab93e17f kbuild: remove deprecated host-progs variable 56869d45e364 kconfig: fix the rule of mainmenu_stmt symbol c151272d1687 kconfig: remove unused sym_get_env_prop() function 1880861226c1 kconfig: remove P_ENV property type e3fd9b5384f3 scripts/dtc: consolidate include path options in Makefile 4bf6a9af0e91 kconfig: add build-only configurator targets f1575595d156 kconfig: error out when seeing recursive dependency 5e8c5299d315 kconfig: report recursive dependency involving 'imply' f498926c47aa kconfig: improve the recursive dependency report 98a4afbfafd2 kconfig: fix "Can't open ..." in parallel build 9a9ddcf47831 kconfig: suppress "configuration written to .config" for syncconfig 87a32e624037 kbuild: pass LDFLAGS to recordmcount.pl d503ac531a52 kbuild: rename LDFLAGS to KBUILD_LDFLAGS 217c3e019675 disable stringop truncation warnings for now bc8d2e20a3eb kconfig: remove a spurious self-assignment fd65465b7016 kconfig: do not require pkg-config on make {menu,n}config 5a4630aadb9a ftrace: Build with CPPFLAGS to get -Qunused-arguments Note that this adds new cleanup work to do in that we should adapt the shared library support we have to what is now upstream. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-09Merge tag 'mips-fixes-for-2020.04' of git://git.denx.de/u-boot-mipsTom Rini
- doc: fix code examples in qemu-mips.rst - mips: vcoreiii: fix memtest and cache coherency issues - cmd/go: fix cache coherency issues on MIPS
2020-04-09imx: Fix imx8m FIT script issueYe Li
The FIT config node has reversed ATF and u-boot: ATF is set to 'firmware' but u-boot is set to 'loadables'. This script can work previously because spl fit driver wrongly appends fdt to all loadable images. With the issue fixed in commit 9d15d1d1c24f ("Revert "common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"") the u-boot in 'loadables' does not have fdt appended and fails to work. So correct the script by moving u-boot to 'firmware' and ATF to 'loadables'. Signed-off-by: Ye Li <ye.li@nxp.com> Reported-by: Matt Porter <mporter@konsulko.com> Tested-by: Matt Porter <mporter@konsulko.com>
2020-04-09mips: cmd: go: Flush cache before jumping to app/imageStefan Roese
It has been noticed on MT7628/88 platforms, that booting the RAM image does not work reliably. Sometimes it works and sometimes not. Debugging showed that this "might" be a cache related issue as very strange errors occurred (e.g. output corrupted etc). This patch adds a cache flush for the complete SDRAM area to the go cmd before jumping to the entry point for the MIPS architecture. The complete area is flushed as we don't know at this point, how big the area of the "application" really is. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Mauro Condarelli <mc5686@mclink.it> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Mauro Condarelli <mc5686@mclink.it> Cc: Weijie Gao <weijie.gao@mediatek.com>
2020-04-09mips: vcoreiii: Fix cache coherency issuesLars Povlsen
This patch fixes an stability issue seen on some vcoreiii targets, which was root caused to a cache inconsistency situation. The inconsistency was caused by having kuseg pointing to NOR area but used as a stack/gd/heap area during initialization, while only relatively late remapping the RAM area into kuseg position. The fix is to initialize the DDR right after the TLB setup, and then remapping it into position before gd/stack/heap usage. Reported-by: Ramin Seyed-Moussavi <ramin.moussavi@yacoub.de> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2020-04-09MIPS: allow override of get_tbclk()Alex Nemirovsky
Allow SoC or board layers with reconfigurable cpu clocks capabilties to do implementation specific lookups and service get_tbclk() requests. Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-04-09MIPS: allow override of flush_dcache_range()Alex Nemirovsky
Useful in custom HW designs which have a need to flush dcache range in a completely non standard way. Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-04-08Merge tag 'u-boot-amlogic-20200406' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next - clk: meson-g12a: missing break - sync all Amlogic DT from Linux v5.6-rc2 - MMC clock fixups - add support for Libre Computer AML-S905D-PC and AML-S912-PC
2020-04-07Merge tag 'xilinx-for-v2020.07' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.07 common: - Align ENV_FAT_INTERFACE - Fix MAC address source print log - Improve based autodetection code xilinx: - Enable netconsole Microblaze: - Setup default ENV_OFFSET/ENV_SECT_SIZE Zynq: - Multiple DT updates/fixes - Use DEVICE_TREE environment variable for DTB selection - Switch to single zynq configuration - Enable NOR flash via DM - Minor SPL print removal - Enable i2c mux driver ZynqMP: - Print multiboot register - Enable cache commands in mini mtest - Multiple DT updates/fixes - Fix firmware probing when driver is not enabled - Specify 3rd backup RAM boot mode in SPL - Add SPL support for zcu102 v1.1 and zcu111 revA - Redesign debug uart enabling and psu_init delay - Enable full u-boot run from EL3 - Enable u-boot.itb generation without ATF with U-Boot in EL3 Versal: - Enable distro default - Enable others SPI flashes - Enable systems without DDR Drivers: - Gem: - Flush memory after freeing - Handle mdio bus separately - Watchdog: - Get rid of unused global data pointer - Enable window watchdog timer - Serial: - Change reinitialization logic in zynq serial driver Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-07ARM: dts: imx8qxp-colibri: dm-pre-proper for pd_dma nodesIgor Opaniuk
pd_dma_* nodes should be accessible during pre-relocation stage of U-Boot proper for properly handling power domains. This fixes the issue with permanent failing of invocation of power_domain_get_by_index() in the common code of DM power domain uclass (drivers/power/domain/power-domain-uclass.c). Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07ARM: dts: imx8qm-apalis: dm-pre-proper for pd_dma nodesIgor Opaniuk
pd_dma_* nodes should be accessible during pre-relocation stage of U-Boot proper for properly handling power domains. This fixes the issue with permanent failing of invocation of power_domain_get_by_index() in the common code of DM power domain uclass (drivers/power/domain/power-domain-uclass.c). Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07ARM: dts: imx8qxp-colibri: replace dm-spl with dm-pre-properIgor Opaniuk
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are handled equally, forcing the nodes with these properties to be accessible and device being probed before pre-relocation of U-Boot proper (drivers/core/util.c): bool ofnode_pre_reloc(ofnode node) { /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass * had property dm-pre-reloc or u-boot,dm-spl/tpl. * They are removed in final dtb (fdtgrep 2nd pass) */ return true; if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) return true; if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) return true; /* * In regular builds individual spl and tpl handling both * count as handled pre-relocation for later second init. */ if (ofnode_read_bool(node, "u-boot,dm-spl") || ofnode_read_bool(node, "u-boot,dm-tpl")) return true; return false; } Howewer, to avoid confusion in future, replace dm-spl `%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper to explicitly state that they are handled during pre-relocation stage of U-Boot proper. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07ARM: dts: imx8qm-apalis: replace dm-spl with dm-pre-properIgor Opaniuk
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are handled equally, forcing the nodes with these properties to be accessible and device being probed before pre-relocation of U-Boot proper (drivers/core/util.c): bool ofnode_pre_reloc(ofnode node) { /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass * had property dm-pre-reloc or u-boot,dm-spl/tpl. * They are removed in final dtb (fdtgrep 2nd pass) */ return true; if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) return true; if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) return true; /* * In regular builds individual spl and tpl handling both * count as handled pre-relocation for later second init. */ if (ofnode_read_bool(node, "u-boot,dm-spl") || ofnode_read_bool(node, "u-boot,dm-tpl")) return true; return false; } Howewer, to avoid confusion in future, replace dm-spl `%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper to explicitly state that they are handled during pre-relocation stage of U-Boot proper. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-06arm64: versal: Disable DDR cache mapping if DDR is not enabledMichal Simek
Similar change was done in past by commit 3b644a3c2f69 ("arm64: zynqmp: Provide a config to not map DDR region in MMU table"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add support for u-boot.itb generation without ATFMichal Simek
If ATF doesn't exist generate u-boot.itb without it and let U-Boot run in EL3. Still keep warning to let user know that ATF/BL31 is missing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Move timeout for clock propagation below psu_initMichal Simek
Delay required for clock propagation is tighly coupled with initialization done in psu_init(). That's why call it also for u-boot proper with CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add support for debug uart also for U-Boot properMichal Simek
board_early_init_f() is the right location where debug uart can be configurated (after MIO initialization). The patch is taking this call from SPL to also make it available for U-Boot proper. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp Add support for zcu102 rev1.1Michal Simek
rev1.1 has different DDR sodimm module that's why it requires different DDR configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add third backup bootmodeMichal Simek
I found this issue when was running py/test.py on zcu102 which is for me by default setup to SD boot mode without any way to change boot mode. Alternative software bootmode selection to JTAG is not working because JTAG mode is 0 which also reset value for it. That's why saying SPL to take u-boot.itb from RAM instead of SD in SD boot mode is not possible via alternative bootmode selection. That's why setup third boot mode to JTAG(BOOT_DEVICE_RAM) as final fallback. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Do not print message about boot deviceMichal Simek
This information is shown already that's why there is no reason to print it again via custom prints. U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 09:59:05 +0100) mmc boot Trying to boot from MMC1 or U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 10:49:46 +0100) qspi boot Trying to boot from SPI Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Enable DM for CFI NOR flashMichal Simek
With multi defconfig NOR flash information about NOR should be taken from DT that's why there is no reason to specify address and sizes via fixed config. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configurationMichal Simek
There is no real need to include full DT when only some nodes are enough to use. It will save some space. Retested with FSBL for initial SoC setup. SPL didn't work. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06Makefile: Add environment variable DEVICE_TREE to headerMichal Simek
Users have option to overwrite default device tree (CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE. Feature has been added long time ago by commit 74de8c9a1672 ("dts/Makefile: Build the user specified dts") for a little bit different reason. But this variable can be also used for different purpose like choosing proper configuration from FIT image in SPL. And this is the functionality I would like to use on Xilinx Zynq devices that current u-boot.img can be composed in the same way based on OF_LIST and different configuration is taken based on platform specific SPL. SPL requires low level ps7_init_gpl configuration that's why different boards require different SPL with fixed board_fit_config_name_match(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-06ARM: zynq: Change zc770 xm011 Nand x16 configurationsMichal Simek
Instead of symlink include origin file and just change model description. Difference is not in DT but in ps7_init configurations which is taken based on device tree name that's why the same DT can't be used. Also update model and update comments to match configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Move pinctrl node under firmware nodeMichal Simek
Pinctrl is handled via firmare interface that's why move it there without reg property and new compatible string. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Fix GIC compatible propertyMichal Simek
dtbs_check is showing warning around GIC compatible property as interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic'] is not valid under any of the given schemas Similar change has been done also by Linux kernel commit 5400cdc1410b ("ARM: dts: sunxi: Fix GIC compatible") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Fix addresses in partition definitionsMichal Simek
Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Fix addresses in partition definitionsMichal Simek
Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Sync DP subsystemMichal Simek
Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Do not duplicate flash partition label propertyAmit Kumar Mahapatra
In kernel 5.4, support has been added for reading MTD devices via the nvmem API. For this the mtd devices are registered as read-only NVMEM providers under sysfs with the same name as the flash partition label property. So if flash partition label property of multiple flash devices are identical then the second mtd device fails to get registered as a NVMEM provider. This patch fixes the issue by having different label property for different flashes. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: dts: zynqmp: Add clk cells for sdhciAshok Reddy Soma
Add clock-cells and clock-output-names for sdhci0 and sdhci1. These are needed for linux sdhci driver from 5.4 version onwards. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Remove second copy of reset-controllerMichal Simek
Reset controller is handled via firmware that's why it should be the part of firmware node. Origin solution hasn't been removed when above change was applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in zynqmp.dtsi"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP BoardsManish Narani
Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux. Signed-off-by: Manish Narani <manish.narani@xilinx.com>
generated by cgit (git 2.34.1) at 2024-12-27 21:51:08 +0000