summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2020-01-14tegra: fdt: Add tegra186-u-boot.dtsiStephen Warren
All Tegra chips except Tegra186 have a tegraNNN-u-boot.dtsi. Duplicate Tegra210's copy of this file for Tegra186. This ensures that a /binman node exists in U-Boot's control DT. Subsequent to 3c10dc95bdd0 ("binman: Add a library to access binman entries") this appears to be required. I haven't really investigated why all this is necessary or how it works, but simply observed the boot failure listed below, bisected it, noticed the inconsistency in DT files, and found that fixing it resolved the boot issue. U-Boot 2020.01-rc4-00256-g3c10dc95bdd0 (Jan 07 2020 - 10:25:00 -0700) SoC: tegra186 Model: NVIDIA P2771-0000-500 Board: NVIDIA P2771-0000 DRAM: 7.8 GiB initcall sequence 00000000fffb7858 failed at call 00000000800955a8 (err=-22) ### ERROR ### Please RESET the board ### Fixes: 3c10dc95bdd0 ("binman: Add a library to access binman entries") Fixes: f2faffecb016 ("binman: tegra: Convert to use binman") Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-10arm: cpu: armv8: add support for arm psci reset2.Rajesh Ravi
Current U-Boot has only support for psci reset. Adding support for arm psci reset2 allows passing of reset level and other platform sepcific parameters like strap settings to lowlevel psci implementation. Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-01-10arch: arm: Program GIC LPI configuration tableBharat Kumar Reddy Gooty
Programs the following: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-01-10m68k: Drop CONFIG_MCFPIT supportTom Rini
All platforms currently use the "MCFTMR" DMA timer rather than the PIT timer, so drop the MCFPIT code. Cc: Huan Wang <alison.wang@nxp.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Cc: Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Angelo Dureghello <angelo@sysam.it>
2020-01-10m68k: add dm fec supportAngelo Durgehello
Add architecture-related code for dm fec support. Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10m68k: add fec fdt overrides to all boardsAngelo Durgehello
Add ethernet controller overrides for all involved boards. Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10m68k: add fec base node to devicetreesAngelo Durgehello
Add basic ethernet controller devicetree nodes for all ColdFire families. Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-09Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xxTom Rini
- A small PR with MC8309 fixes from Rasmus.
2020-01-09Merge tag 'dm-pull-8jan20' of git://git.denx.de/u-boot-dmTom Rini
dm: Increased separation of ofdata_to_platdata() and probe methods
2020-01-08Merge tag 'efi-2020-04-rc1' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-04-rc1 This pull request provides: * support for FIT images for UEFI binaries * drivers for hardware random number generators * an implementation of the EFI_RNG_PROTOCOL * a sub-command for efidebug to display configuration tables
2020-01-08Merge tag 'uniphier-v2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier UniPhier SoC updates for v2020.04 - add pinmux nodes for I2C ch5, ch6 - enable SPI driver and command
2020-01-08Merge tag 'u-boot-imx-20200108' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx --------------------------------------------------------------------- Add i.MX8MP SoC and EVK board Update README for i.MX8MN EVK and fix mmc env Add pca9450 driver -------------------------------------------------------------------- Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
2020-01-08Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2020-01-08Merge tag 'u-boot-amlogic-20200108' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Khadas VIM3L based on Amlogic S905D3 support - Various fixups for amlogic boards - Unnecessary header includes drop into video/meson
2020-01-09ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6Masahiro Yamada
The next generation SoC can connect on-board slave devices via I2C ch5 and ch6. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-08imx: add i.MX8MP EVK boardPeng Fan
Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: add imximage-8mp-lpddr4.cfgPeng Fan
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same as i.MX8MN ddr4 cfg, but with different ddr firmware Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: only support non-dm code in clock_imx8mm.cPeng Fan
The drivers/clk/imx/*.c are used for CLK dm case, the clock_imx8mm.c is used for non CLK dm case, let's split it. Sometimes it is hard to enable CLK dm in SPL stage, considering code size, malloc size requirement, the splittion will make it easy to use non CLK dm in SPL stage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MPPeng Fan
i.MX8MP ROM support ROMAPI as i.MX8MN, so make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: add i.MX8MP PE propertyPeng Fan
i.MX8MP does not have LVTTL, it has a PE property Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8mp: add pin header filePeng Fan
Add pin header file for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08arm: dts: freescale: Add i.MX8MP dtsi supportPeng Fan
The i.MX8M Plus Media Applications Processor is part of the growing mScale family targeting the consumer and industrial market. It brings an effective Machine Learning and AI accelerator that enables a new class of applications. It is built in Samsung 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad core ARM Cortex-A53 cluster and Cortex-M7 low-power coprocessor, audio digital signal processor, machine learning and graphics accelerators. Add the basic dtsi support for i.MX8MP. Patch from Anson Huang for Kernel https://patchwork.kernel.org/patch/11310915/ Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: add 1GHz fracpll entryPeng Fan
4000MTS DDR needs 1GHz fracpll, so add the entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8mp: add basic clockPeng Fan
i.MX8MP has similar architecture as i.MX8MN, but it has different clk root and index, so add that to make i.MX8MP could use the non-dm clock driver. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08arm: dts: add i.MX8MP pinfunc headerPeng Fan
Add i.MX8MP pinfunc header for dts usage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: spl: support i.MX8MP spl_boot_devicePeng Fan
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: add Kconfig entry for i.MX8MPPeng Fan
Add Kconfig entry for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: cpu: enlarge bit mask to 0x1FF for cpu typePeng Fan
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest bit, so enlarge bit mask to 0x1FF to make it could detect cpu type correctly Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx8mp: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: get cpu id/type of i.MX8MPPeng Fan
Support get i.MX8MP cpu id and cpu type Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8mq: handle ESDHC in mxc_get_clockPeng Fan
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK + dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK as root clk and cause sd card could not be detected in U-Boot proper, as below: "Loading Environment from MMC... unable to select a mode" Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Fabio Estevam <festevam@gmail.com>
2020-01-08mpc83xx: set MPC83XX_GPIO_CTRLRS to 2 for MPC8309Rasmus Villemoes
The MPC8309 has two gpio controllers (which is already correctly reflected in its struct immap definition). Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08mpc83xx: immap_83xx: add spi8xxx_t in immap for mpc8309Rasmus Villemoes
Allow drivers/spi/mpc8xxx_spi.c to be built for an mpc8309 target. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08powerpc: mpc83xx: convert CONFIG_FSL_ELBC to KconfigRasmus Villemoes
This complements commit 068789773d0 which did the conversion for mpc85xx. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08mpc83xx: make ARCH_MPC8309 select SYS_FSL_ERRATUM_ESDHC111Rasmus Villemoes
The mpc8309 is also affected by the "Manual Asynchronous CMD12 abort operation causes protocol violations" erratum, though it is enumerated as eSDHC16 in the errata sheet for mpc8309. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-07dm: test: Add a test driver for devresSimon Glass
Add a driver which does devres allocations so that we can write tests for devres. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07x86: apl: Avoid accessing the PCI bus before it is probedSimon Glass
The PCI bus is not actually probed by the time the ofdata_to_platdata() method is called since that happens in the uclass's post_probe() method. Update the PMC and P2SB drivers to access the bus in its probe() method. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07sandbox: rng: Add a random number generator(rng) driverSughosh Ganu
Add a sandbox driver for random number generation. Mostly aimed at providing a unit test for rng uclass. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07stm32mp1: reset coprocessor status at cold bootFabien Dessenne
Reset ResourceTableAddress and CoprocessorState at cold boot, preserve these values at standby wakeup. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-07stm32mp1: declare backup registers for coprocessorFabien Dessenne
Use the backup register #17 as coprocessor resource table address and backup register #18 as coprocessor state. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-07board: amlogic: select PWRSEQ for all amlogic platformAnand Moon
commit a10388dc6982 ("mmc: meson-gx: add support for mmc-pwrseq-emmc") introduce CONFIG_PWRSEQ for power sequence for eMMC module on amlogic platform, so enable this to all amlogic boards. Signed-off-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07Merge tag 'u-boot-imx-20200107' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx New for 2020.04 --------------- - New boards Embedded Artists COM board Xea Board - Switch to DM: Aristainetos boards Toradex colibri (DM_ETH) iCubox GE bx50v3 mx7dsabre (DM_ETH) cx9020 - New features: Bootaux with elf files Default SYS_THUMB_BUILD for i.MX6/7 - Fixes: DHCOM i.MX6 PDK Engicam i.MX8M tools (imx8m_image) Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
2020-01-07Merge tag 'u-boot-atmel-2020.04-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel features for 2020.04 cycle This feature set is a patch series from Tudor Ambarus which includes parsing of the spi flash SFDP parser for SST flashes, and using those tables to retrieve unique saved per device MAC address. This is then used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-07arm: socfpga: stratix10: Enable SMMU accessThor Thayer
Enable TCU access through the Stratix10 CCU so that the SMMU can access the SDRAM. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-01-07arm: socfpga: agilex: Enable Agilex SoC buildLey Foon Tan
Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: dts: agilex: Add base dtsi and devkit dtsLey Foon Tan
Add device tree files for Agilex SoC platform. socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains Uboot specific DT properties. socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux (kernel/git/dinguyen/linux.git, commit 6f0bf971bacacc) Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add SPL for Agilex SoCLey Foon Tan
Add SPL support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: agilex: Add clock handoff offset for AgilexLey Foon Tan
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add clock wrapper functionsLey Foon Tan
Add clock wrapper functions call to clock DM functions to get clock frequency and used in cm_print_clock_quick_summary(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07clk: agilex: Add clock driver for AgilexLey Foon Tan
Add clock manager driver for Agilex. Provides clock initialization and get_rate functions. agilex-clock.h is from Linux commit ID cd2e1ad12247. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>