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2016-03-14ti: AM437x: Use generic EEPROM detection logicNishanth Menon
Now that we have a generic TI eeprom logic which can be reused across platforms, reuse the same. This revision also includes fixes identified by Dave Gerlach <d-gerlach@ti.com> Cc: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Steven Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-14ti: AM335x: Use generic EEPROM detection logicNishanth Menon
Use the generic EEPROM detection logic instead of duplicating the AM eeprom logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Steven Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-14ARM: omap-common: Add standard access for board description EEPROMLokesh Vutla
Several TI EVMs have EEPROM that can contain board description information such as revision, DDR definition, serial number, etc. In just about all cases, these EEPROM are on the I2C bus and provides us the opportunity to centralize the generic operations involved. The on-board EEPROM on the BeagleBone Black, BeagleBone, AM335x EVM, AM43x GP EVM, AM57xx-evm, BeagleBoard-X15 share the same format. However, DRA-7* EVMs, OMAP4SDP use a modified format. We hence introduce logic which is generic between these platforms without enforcing any specific format. This allows the boards to use the relevant format for operations that they might choose. This module will compile for all TI SoC based boards when CONFIG_TI_I2C_BOARD_DETECT is enabled to have optimal build times for platforms that require this support. It is important to note that this logic is fundamental to the board configuration process such as DDR configuration which is needed in SPL, hence cannot be part of the standard u-boot driver model (which is available later in the process). Hence, to aid efficiency, the eeprom contents are copied over to SRAM scratchpad memory area at the first invocation to retrieve data. To prevent churn with cases such as DRA7, where eeprom format maybe incompatible, we introduce a generic common format in eeprom which is made available over accessor functions for usage. Special handling for BBG1 EEPROM had to be introduced thanks to the weird eeprom rev contents used. The follow on patches introduce the use of this library for AM335x, AM437x, and AM57xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-14ARM: OMAP4/5: Centralize gpi2c_initKipisz, Steven
Centralize gpi2c_init into omap_common from the sys_proto header so that the information can be reused across SoCs. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-14ARM: OMAP4/5: Centralize early clock initializationKipisz, Steven
Early clock initialization is currently done in two stages for OMAP4/5 SoCs. The first stage is the initialization of console clocks and then we initialize basic clocks for functionality necessary for SoC initialization and basic board functionality. By splitting up prcm_init and centralizing this clock initialization, we setup the code for follow on patches that can do board specific initialization such as board detection which will depend on these basic clocks. As part of this change, since the early clock initialization is centralized, we no longer need to expose the console clock initialization. NOTE: we change the sequence slightly by initializing console clocks timer after the io settings are complete, but this is not expected to have any functioanlity impact since we setup the basic IO drive strength initialization as part of do_io_settings. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-14Kconfig: Move CONFIG_FIT and related options to KconfigSimon Glass
There are already two FIT options in Kconfig but the CONFIG options are still in the header files. We need to do a proper move to fix this. Move these options to Kconfig and tidy up board configuration: CONFIG_FIT CONFIG_OF_BOARD_SETUP CONFIG_OF_SYSTEM_SETUP CONFIG_FIT_SIGNATURE CONFIG_FIT_BEST_MATCH CONFIG_FIT_VERBOSE CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_RSA Unfortunately the first one is a little complicated. We need to make sure this option is not enabled in SPL by this change. Also this option is enabled automatically in the host builds by defining CONFIG_FIT in the image.h file. To solve this, add a new IMAGE_USE_FIT #define which can be used in files that are built on the host but must also build for U-Boot and SPL. Note: Masahiro's moveconfig.py script is amazing. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add microblaze change, various configs/ re-applies] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-03-14freescale: Remove CONFIG_DM from header filesSimon Glass
Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA. Remove the hacks which enable CONFIG_DM in header files and update the defconfig. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-10Merge git://git.denx.de/u-boot-rockchipTom Rini
2016-03-10rockchip: rk3288: correct sdram settingChris Zhong
The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2, and it expects uboot to store the value using a same protocol. But now the ddr setting value is different with DMC, so if you enable the DMC, system would crash in kernel. Correct the sdram setting here, according to the requirements of kernel. [0] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/ chromeos-3.14/drivers/clk/rockchip/clk-rk3288-dmc.c Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-03-10rockchip: make configure_emmc() empty for Firefly-RK3288FUKAUMI Naoki
on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for Firefly-RK3288. (it's fine for Rock2) $ gcc --version gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204 Copyright (C) 2015 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. $ ./tools/mkimage -n rk3288 -T rksd -d spl/u-boot-spl-dtb.bin u-boot-spl-dtb.img Warning: SPL image is too large (size 0x80d0) and will not boot to reduce size of SPL image, this patch makes configure_emmc() empty for Firefly-RK3288 as same as Rock2. Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-By: Vagrant Cascadian <vagrant@debian.org>
2016-03-10rockchip: rk3036: change ddr frequency to 400MLin Huang
emac may use dpll as clock parent, and it request the clock frequency multiples of 50, so change ddr frequency to 400M. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-03-09MIPS: fix mips_cache fallback without __builtin_mips_cacheMatthias Schiffer
The "R" constraint supplies the address of an variable in a register. Use "r" instead and adjust asm to supply the content of addr in a register instead. Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations") Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-03-08sandbox: Fix building with LLVMTom Rini
- The macro __BIGGEST_ALIGNMENT__ is gcc-specific. If it is not defined we'll just assume 16. This is correct for at least the common cases and LLVM does not provide an equivalent macro. - When linking U-Boot we're passing -T to the linker, and while gcc will just pass this along with LLVM we need to be specific. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-03-08omap3: Use raw SPL by default for mmc1Alexander Graf
Now that we fall back to the FS code path when we don't find u-boot at the raw sector offset, there is no good reason to not default to raw boot. With this patch, I can successfully boot u-boot from a raw sector offset on beagle-xm. Signed-off-by: Alexander Graf <agraf@suse.de>
2016-03-09ARM: uniphier: allow debug_ll_init() to do nothing for unknown SoCsMasahiro Yamada
This function should just return for unknown SoCs rather than writing unexpected values to registers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-09ARM: uniphier: fix build error when CONFIG_CMD_DDRMPHY_DUMP=yMasahiro Yamada
The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data"). Fixes: 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-02colibri-vf: Disable pull-up configuration in GPIO pin muxBhuvanchandra DV
During very early boot-ROM execution the pinmux configuration isi in Hi-Z state. If pull-up is enabled on GPIO pad's there will be a short period of toggle from high to low on the IO when GPIO is set low during boot. To avoid this glitch, disable pull-up configuration in GPIO pinmux. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
2016-02-29sniper: Various minor cleanups, missing Kconfig configs and reorganisationPaul Kocialkowski
This introduces some minor cleanups, regarding aspects such as board name, code and headers organization as well as deprecated and missing config options. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-29ARM: start.S: fix typoYuichiro Goto
Fix typo in comment about position of 'A' bit in several start.S. Signed-off-by: Yuichiro Goto <goto.yuichiro@espark.co.jp>
2016-03-01ARM: uniphier: fix warnings reported by aarch64 compilerMasahiro Yamada
The UniPhier SoC family has not supported ARMv8 yet, but these would cause warnings if they were compiled with a 64bit compiler. Before adding the ARMv8 support really, fix them now. Because UniPhier SoCs do not support Large Physical Address Extension, casting "phys_addr_t" into "unsigned long" would carry the address as is. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-01ARM: uniphier: prepare directory structure for ARMv8 SoC supportMasahiro Yamada
Before adding ARMv8 support, this commit refactors the directory structure. Move ARMv7 specific files to arch/arm/mach-uniphier/arm32 to avoid a mess by mixture of ARMv7 and ARMv8 code. Also move the "select CPU_V7" to the lower-level menu because we will have to select ARM64 instead of CPU_V7 for ARMv8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rename PH1-LD10/PH1-sLD11 to PH1-LD20/PH1-LD11Masahiro Yamada
Due to the company's awful projecting, PH1-LD10 and PH1-sLD11 have been renamed to PH1-LD20 and PH1-LD11, respectively. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework UniPhier SoC select in KconfigMasahiro Yamada
The chains of "depends on <SoC_name>" in the current Kconfig is clumsy. The idea here is to allow users to choose a SoC group first (SoC group consists of some SoCs that can coexist in one binary). Then, allow to enable/disable each SoC support in the selected SoC group. This makes the Kconfig menu clearer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rename variable for DRAM controller base addressMasahiro Yamada
Rename the variable that contains the base address for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: deprecate umc_dram_init_{start, poll}Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused macros for UMC base addressesMasahiro Yamada
These macros are no longer used. These base addresses are SoC-dependent, so they should not be placed in the header. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework DRAM size handling in UMC init codeMasahiro Yamada
Currently, DRAM size is converted twice: size in byte -> size in Gbit -> enum Optimize the code by converting the "size in byte" into enum directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-Pro4 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-LD4 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-sLD8 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for PH1-LD4Masahiro Yamada
Move frequency-dependent register settings to arrays for clean-up. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: support more DRAM use cases for PH1-sLD8Masahiro Yamada
Support DDR3-1600 / 512MB DDR size. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for PH1-sLD8Masahiro Yamada
Move frequency-dependent register settings to arrays for clean-up. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor DDR-PHY init codeMasahiro Yamada
The if-else statements for the frequency-dependent register settings seem clumsy. Moving them to arrays would make it cleaner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused argument of ph1_ld4_ddrphy_init()Masahiro Yamada
The DDR PHY settings no longer depend on the DRAM size. Drop the argument from the init function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: merge DDR PHY init code for 3 SoCsMasahiro Yamada
Now these three are almost the same. The only difference is the DTPR1 register dependency on the DRAM size, but it can be ignored. (It has already been ignored in PH1-sLD8 and PH1-Pro4.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add a field to specify DDR3+Masahiro Yamada
Add a field to distinguish DDR3+ from (standard) DDR3. It also allows to delete CONFIG_DDR_STANDARD (this is not a software configuration, but a board attribute). Default DDR3 spec for each SoC: PH1-LD4, PH1-sLD8: DDR3+ Others: DDR3 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: disable debug circuit clocks for PH1-Pro4Masahiro Yamada
These settings control the clocks around the memory controller. The debug ability is unneeded once it works properly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settingsMasahiro Yamada
These settings were used only for the PH1-sLD3 and older SoCs. The PH1-LD4 and newer one just ignore them because their DDR-PHY take care of such timing parameters instead. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for ProXstream2Masahiro Yamada
Currently, a dummy value is defined for the UMC_SPCCTLA register when the DRAM size is zero. This seems weird because the controller does not need setting in the first place if the size is zero. Also, redefine enum dram_size to represent the DRAM size per 16-bit unit. This makes things simpler because the channel 0 and 1 are connected with 32-bit width DRAM, while the channel 2 is connected with 16-bit width one. I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_* for consistency) while I am here because SIZE_* might be easily mixed-up with the macros in include/linux/sizes.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: use pr_err() where possibleMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize ProXstream2 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework struct uniphier_board_dataMasahiro Yamada
This commit reworks "struct uniphier_board_data" with an array of DRAM channel data in it. It will allow further cleanups by means of "for" statements that iterate over the DDR channels. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused umc_polling()Masahiro Yamada
This function is unused. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: default to environment in eMMCMasahiro Yamada
Of the several boot devices supported, it looks like the eMMC is the most commonly used. Enable CONFIG_ENV_IS_IN_MMC by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add a command to find the first MMC (non-SD) deviceMasahiro Yamada
UniPhier SoC family supports both (e)MMC boot and SD card boot; however, both of them are handled in the same uclass. When booting from the eMMC, we want to know the device number of the (e)MMC, not SD. This command is useful to find the first MMC (non-SD) device. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add eMMC boot supportMasahiro Yamada
Export device nodes needed for eMMC boot (eMMC node, pinctrl, and clock) to the SPL DTB. CONFIG_SUPPORT_EMMC_BOOT is also necessary to use "mmc partconf" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: dts: uniphier: add SD/MMC host controller nodesMasahiro Yamada
This host controller is available for all UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: enable UniPhier SD/MMC host driverMasahiro Yamada
Enable the driver in all UniPhier defconfig files and add some needed defines to the common files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: dts: uniphier: add GPIO controller nodesMasahiro Yamada
Make the GPIO driver really active. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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