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2016-05-23cmd: qfw: bring ACPI generation code into qfw coreMiao Yan
Loading ACPI table from QEMU's fw_cfg interface is not x86 specific (ARM64 may also make use of it). So move the code to common place. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]Miao Yan
Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23x86: qemu: add comment about qfw register endiannessMiao Yan
This patch adds some comments about qfw register endianness for clarity. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23x86: qemu: move x86 specific operations out of qfw coreMiao Yan
The original implementation of qfw includes several x86 specific operations, like directly calling outb/inb and using some inline assembly code which prevents it being ported to other architectures. This patch adds callback functions and moves those to arch/x86/ Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23x86: qemu: split qfw command interface and qfw coreMiao Yan
This patch splits qfw command interface and qfw core function into two files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core. Now when qfw command interface is enabled, it will automatically select qfw core. This patch also makes the ACPI table generation select CONFIG_QFW. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23cmd: qfw: remove qemu_fwcfg_free_files()Miao Yan
This patch is part of the qfw refactor work. The qemu_fwcfg_free_files() function is only used in error handling in ACPI table generation, let's not make this a core function and move it to the right place. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23x86: qemu: fix ACPI Kconfig optionsMiao Yan
CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether to load ACPI table from QEMU's fw_cfg interface. But with commit "697ec431469ce0a4c2fc2c02d8685d907491af84 x86: qemu: Drop our own ACPI implementation", there is only one way to support ACPI table for QEMU targets which is the fw_cfg interface. Having two Kconfig options for this purpose is not necessary any more, so this patch consolidates the two. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23x86: qemu: Move qfw command over to cmd and add Kconfig entryTom Rini
- Move the command portion of arch/x86/cpu/qemu/fw_cfg.c into cmd/qemu_fw_cfg.c - Move arch/x86/include/asm/fw_cfg.h to include/qemu_fw_cfg.h - Rename ACPI table portion to arch/x86/cpu/qemu/acpi_table.c Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23x86: baytrail: Generate ACPI FADT/MADT tablesBin Meng
FADT/MADT tables are platform specific. Generate them for BayTrail. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: baytrail: Add platform ASL filesBin Meng
This adds basic BayTrail platform ASL files. They are intended to be included in dsdt.asl of any board that is based on this platform. Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for now. They will be added in the future. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Return table length in acpi_create_madt_lapics()Bin Meng
Like other MADT table write routines, make acpi_create_madt_lapics() return how many bytes it has written instead of the table end addr. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Add some generic ASL librariesBin Meng
This adds several generic ASL libraries that can be included by other ASL files, which are: - debug.asl: for debug output using POST I/O port and legacy serial port - globutil.asl: for string compare routines - statdef.asl: for _STA status values Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Clean up table header revisionsBin Meng
The comment of initializing table header revision says: /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */ which might mislead it may increase per ACPI spec revision. However this is not the case. It's actually a fixed number as defined in ACPI spec, and in the laest ACPI spec 6.1, some table header revisions are still 1. Clean these up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Align FACS table to a 64 byte boundaryBin Meng
Per ACPI spec, the FACS table address must be aligned to a 64 byte boundary (Windows checks this, but Linux does not). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Use u32 in table write routinesBin Meng
Use u32 instead of unsigned long in the table write routines, as other routines do. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Adjust order in acpi_table.cBin Meng
Rearrange the routine order a little bit, to follow the order in which ACPI table is defined in acpi_table.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Change fill_header()Bin Meng
Rename fill_header() to acpi_fill_header() for consistency. Change its signature to remove the 'length' parameter and make it a public API. Also remove the unnecessary include files, and improve the AmlCode[] comment a little bit. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Remove acpi_create_ssdt_generator()Bin Meng
This acpi_create_ssdt_generator() currently does nothing. Remove this for now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Reorder code in acpi_table.hBin Meng
Reorder the ACPI tables appearance by following the order: RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the table flag defines accordingly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Various changes to acpi_table.hBin Meng
- Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID. - Do not typedef acpi_header_t, instead use struct acpi_table_hader. - Use a shorter name aslc_id and aslc-revision. - Change MCFG base address to use 32-bit value pairs (_l and _h). - Apply ACPI_APIC_ prefix to MADT APIC type macros and make their names to be more readable. - Apply __packed to struct acpi_madt_irqoverride and struct acpi_madt_lapic_nmi tables, as they are not naturally aligned by the compiler which leads to wrong sizeof(struct). - Rename model to res1 as it is reserved after ACPI spec 1.0. - Apply ACPI_ prefix to the PM profile macros and change them to enum. - Add ospm_flags to FACS structure which is defined since ACPI 4.0. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Remove unused codesBin Meng
- Remove #include <> header files. - Remove APM_CNT register defines, which should not be here as they are SMI related. - Remove MP_IRQ_ defines as they are duplicates of the same ones in asm/mpspec.h. - Remove ACTL register defines, which should not be here as they are chipset specific. - Remove functional fixed hardware defines, which are not used. - Remove dev_scope related defines, which are not used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: dts: Update to include ACTL register detailsBin Meng
This updates all x86 boards that currently have IRQ router in the dts files to include ACTL register details. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: irq: Enable SCI on IRQ9Bin Meng
By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2016-05-23x86: irq: Reserve IRQ9 for ACPI in PIC modeBin Meng
Reserve IRQ9 which is to be used as SCI interrupt number for ACPI in PIC mode. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: acpi: Fix compiler warnings in write_acpi_tables()Bin Meng
Fix the following two build warnings in function 'write_acpi_tables': warning: format '%lx' expects argument of type 'long unsigned int', but argument 2 has type 'u32' [-Wformat=] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: Fix build warning in tables.c when CONFIG_SEABIOSBin Meng
The following build warning is seen in tables.c: warning: implicit declaration of function 'memalign' Add the missing header file to fix it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: Drop asm/acpi.hBin Meng
Remove asm/acpi.h which is never used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-21malta: Support MIPS32r6 configurationsPaul Burton
Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6 CPUs. Allow building U-Boot for such systems by selecting CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-21MIPS: Support for targetting MIPSr6Paul Burton
Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-21MIPS: Simplify CONFIG_SYS_CPU valuesPaul Burton
Rather than having the values for CONFIG_SYS_CPU depend upon each architecture revision, have them depend upon the more general CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the architecture revisions. This is done in preparation for adding MIPSr6 support, which would otherwise need to introduce new cases here. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-21MIPS: Use unchecked immediate addition/subtractionPaul Burton
In MIPS assembly there have historically been 2 variants of immediate addition - the standard "addi" which traps if an overflow occurs, and the unchecked "addiu" which does not trap on overflow. In release 6 of the MIPS architecture the trapping variants of immediate addition & subtraction have been removed. In preparation for supporting MIPSr6, stop using the trapping instructions from assembly & switch to their unchecked variants. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-21mips: ath79: Add support for TPLink WDR4300Marek Vasut
Add support for the TPLink WDR4300 router, which is based on the AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported on this system as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Add AR934x supportMarek Vasut
Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Add support for ungating ethernet on ar933x and ar934xMarek Vasut
Add code to ungate the ethernet controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: dts: Add ethernet MAC nodes for ar933xMarek Vasut
Add node for both ethernet controllers in the ar933x. The PHY is attached only to the first ethernet controller. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Add support for ungating USB on ar933x and ar934xMarek Vasut
Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: dts: Add generic-ehci nodeMarek Vasut
Add generic EHCI node for the ChipIdea EHCI controller in the ath79. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Fix compiler warning on const assignmentMarek Vasut
The assignment const T var; var = value; is illegal, since var is constant. Drop the const to fix the compiler warning. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Fix ar71xx_regs.h indentMarek Vasut
The indent in this file triggers my OCD, so fix it. Replace multiple spaces with tabs and align the values in one column. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: Add MIPS 74Kc tuneMarek Vasut
Add MIPS 74Kc tune Kconfig option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com> [added missing tune-y entry in arch/mips/Makefile] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21mips: Fix compiler warning in cpu.cMarek Vasut
There really is zero reason for including netdev.h in generic mips CPU code. Removing the netdev.h from cpu.c also fixes the following compiler warning: In file included from arch/mips/cpu/cpu.c:10:0: include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default] int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); ^ include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21ath79: add readonly attribute for ath79_soc_descWills Wang
use 'const' keywork to qualify readonly attribute for lookup-table member Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21ath79: ar933x: use BIT macro for bit shift operationWills Wang
used a uniform BIT macro for register bit-field shift Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: add AP143 reference boardWills Wang
This patch add board-level code and base DT for AP143. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21mips: ath79: add AP121 reference boardWills Wang
This patch add board-level code and base DT for AP121. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21mips: ath79: add support for QCA953x SOCsWills Wang
This patch enable work for qca953x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: add support for AR933x SOCsWills Wang
This patch enable work for ar933x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21mips: add base support for QCA/Atheros ath79 SOCsWills Wang
This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-18driver/ddr/fsl: Add workaround for erratum A-010165Shengzhou Liu
During DDR-2133 operation, the transmit data eye margins determined during the memory controller initialization may be sub-optimal, set DEBUG_29[12] and DEBUG_29[13:16] = 4'b0100 before MEM_EN is set. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-18crypto/fsl: add support for multiple SEC engines initializationAlex Porosanu
For SoCs that contain multiple SEC engines, each of them needs to be initialized (by means of initializing among others the random number generator). Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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