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2018-01-28clk: rockchip: clk_rk3368: Implement "assign-clock-parent"David Wu
Implement the setting parent for gmac clock, and add internal pll div set for mac clk. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28ARM: dts: rk3288: Remove unused LCDC clock assignedDavid Wu
The LCDC assigned rate is 0, it will make boot error, error log:"pll_para_config: the frequency can not be 0 Hz". Remove them, and the lcdc driver will do the correct clock rate setting. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evbDavid Wu
Add rk3328-evb gmac support. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: dts: rk3328: Add gmac2io supportDavid Wu
Add basic dts configuration for rk3328 gmac2io. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: Add rk3328 gmac pinctrl supportDavid Wu
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2 and bit10 at com iomux register. After that, set rgmii m1 tx pins to 12ma drive-strength, and clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk3328.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driverDavid Wu
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h, and move them into pinctrl-driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: grf_rv1108.h: Fix the grf offsetsDavid Wu
The last 4 grf registers offset of rv1108 are wrong, fix them for correct usage. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission qualityDavid Wu
Give the mac controller the correct tx-delay and rx-delay value for the rgmii mode transmission. If they are not matched, there would be Ethernet packets lost, the net feature may not work. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-27Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini
2018-01-27ARM: dts: rmobile: Add SoC and board U-Boot DT extrasMarek Vasut
Add U-Boot DT extras for each SoC and board. This marks the required nodes with u-boot,dm-pre-reloc to start clock and PRR early on while avoiding modification of the DTs imported from Linux. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27ARM: dts: rmobile: Add rudimentary R8A7790 Stout DTMarek Vasut
The Stout board is not supported in Linux, so add a rudimentary DTS for H2 Stout as a placeholder for when a proper DTS is available. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- NOTE: The Stout is already being shipped over, so proper DTS for both U-Boot and Linux will happen once it's delivered :-)
2018-01-27ARM: dts: rmobile: Import R8A7794 DTS from Linux 4.15-rc8Marek Vasut
Import the Renesas R8A7794 DTS and headers from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27ARM: dts: rmobile: Import R8A7793 DTS from Linux 4.15-rc8Marek Vasut
Import the Renesas R8A7793 DTS and headers from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27ARM: dts: rmobile: Import R8A7792 DTS from Linux 4.15-rc8Marek Vasut
Import the Renesas R8A7792 DTS and headers from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27ARM: dts: rmobile: Import R8A7791 DTS from Linux 4.15-rc8Marek Vasut
Import the Renesas R8A7791 DTS and headers from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27ARM: dts: rmobile: Import R8A7790 DTS from Linux 4.15-rc8Marek Vasut
Import the Renesas R8A7790 DTS and headers from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-26Merge git://git.denx.de/u-boot-sunxiTom Rini
2018-01-26ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32Tom Rini
Now that we have and use wait_for_bit_le32() available, the callers of cm_write_with_phase() should not be casting values to u32 and instead we expect a const void *, so provide that directly. Fixes: 48263504c8d5 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit") Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-26sunxi: imply CONFIG_OF_LIBFDT_OVERLAYAndre Heider
fdt overlay support is useful for all sunxi boards, enable per default and remove it from sunxi defconfigs. Signed-off-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26Merge git://git.denx.de/u-boot-mipsTom Rini
2018-01-26Merge git://git.denx.de/u-boot-spiTom Rini
2018-01-26MIPS: add BMIPS Comtrend AR-5315u boardÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add support for Broadcom MIPS BCM6318 SoC familyÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add BMIPS Comtrend WAP-5813n boardÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add support for Broadcom MIPS BCM6368 SoC familyÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26SOCFPGA: clock manager: implement dw_spi_get_clk functionEugeniy Paltsev
Implement dw_spi_get_clk function to override its weak implementation in designware_spi.c driver. We need this change to get rid of cm_get_spi_controller_clk_hz function and clock_manager.h include in designware_spi.c driver. Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-25mips: bmips: increment SYS_MALLOC_F_LENÁlvaro Fernández Rojas
This prevents the following ENOMEM: Error binding driver 'bmips_cpu': -12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-24Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini
2018-01-24ARM: rmobile: Convert CONFIG_R8A77xx to KconfigMarek Vasut
Convert these configuration options to Kconfig, update board defconfigs and drop them from whitelist. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24ARM: dts: rmobile: Factor out U-Boot extrasMarek Vasut
Pull out u-boot extras into dtsi files to make synchronization of DTS from Linux kernel as easy as a simple copy. All the U-Boot extras are now in *-u-boot.dts* files instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24ARM: dts: rmobile: Update DTS to match Linux 4.14Marek Vasut
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3 and H3 ULCB and Salvator-X boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24dts: cadence_spi: Sync DT bindings with LinuxJason Rush
Adopt the Linux DT bindings and clean-up duplicate and unused values. Fix indentation of the QSPI node in the keystone k2g device tree. Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com> Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
2018-01-24spi: kirkwood_spi: implement workaround for FE-9144572Chris Packham
Erratum NO. FE-9144572: The device SPI interface supports frequencies of up to 50 MHz. However, due to this erratum, when the device core clock is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and CPOL=CPHA=1 there might occur data corruption on reads from the SPI device. Implement the workaround by setting the TMISO_SAMPLE value to 0x2 in the timing1 register. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24mips: bmips: enable the SPI flash on the Comtrend AR-5387unÁlvaro Fernández Rojas
It's a Macronix (mx25l12805d) 16 MB SPI flash. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24mips: bmips: add bcm63xx-hsspi driver support for BCM63268Álvaro Fernández Rojas
This driver manages the high speed SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24mips: bmips: add bcm63xx-hsspi driver support for BCM6328Álvaro Fernández Rojas
This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24mips: bmips: enable the SPI flash on the Netgear CG3100DÁlvaro Fernández Rojas
It's a Spansion (s25fl064a) 8 MB SPI flash. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24mips: bmips: enable the SPI flash on the Sagem F@ST1704Álvaro Fernández Rojas
It's a Winbond (w25x32) 4 MB SPI flash. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24mips: bmips: add bcm63xx-spi driver support for BCM63268Álvaro Fernández Rojas
This driver manages the low speed SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24mips: bmips: add bcm63xx-spi driver support for BCM3380Álvaro Fernández Rojas
This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24mips: bmips: add bcm63xx-spi driver support for BCM6358Álvaro Fernández Rojas
This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24mips: bmips: add bcm63xx-spi driver support for BCM6348Álvaro Fernández Rojas
This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24mips: bmips: add bcm63xx-spi driver support for BCM6338Álvaro Fernández Rojas
This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas
wait_for_bit callers use the 32 bit LE version Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-23Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-01-23common/board_f.c: align m68k arch to use CONFIG_DISPLAY_CPUINFOAngelo Dureghello
Change all coldfire arch files to use CONFIG_DISPLAY_CPUINFO. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Reviewed-by: Tom Rini <trini@konsulko.com> --- Changes for v2: - update common/Kconfig to add M68K to the default y list
2018-01-23ARM: dts: Freescale: re-license device tree files under GPLv2+/X11Pankaj Bansal
The current GPL only licensing on the device trees makes it very impractical for other software components licensed under another license. To make it easier to reuse them, re-license the the device trees for Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license. Same trend is followed in linux. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23common: board_f: vid: Add VID specific API to adjust core voltageRajesh Bhagat
Adds a VID specific API in init_sequence_f and spl code flow namely init_func_vid which is required to adjust core voltage. VID specific code is required in spl, hence moving flag CONFIG_VID out of spl flags. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit (git 2.34.1) at 2024-12-26 23:58:41 +0000