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2017-06-02sun50i: h5: Add initial Orangepi Prime supportJagan Teki
Orangepi Prime is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Prime has - Quad-core Cortex-A53 - 2GB DDR3 - Debug TTL UART - 1000M/100M Ethernet RJ45 - Three USB 2.0 - HDMI - Audio and MIC - Wifi + BT - IR receiver - HDMI - Wifi + BT Boot from MMC: ------------- U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14) DRAM: 2048 MiB Trying to boot from MMC1 NOTICE: BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000) NOTICE: Configuring SPC Controller NOTICE: BL3-1: v1.0(debug):aa75c8d NOTICE: BL3-1: Built : 18:28:27, May 24 2017 INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9 U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14 +0000) Allwinner Technology CPU: Allwinner H5 (SUN50I) Model: OrangePi Prime DRAM: 2 GiB MMC: SUNXI SD/MMC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: phy interface7 eth0: ethernet@1c30000 starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-01arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macroJagan Teki
Instead of defining numerical value on GPIO flag better to use existing binding macro. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-01arm64: dts: sun50i: Add sun50i-h5.dtsiJagan Teki
The Allwinner H5 SoC is pin-compatible to the H3 SoC, but uses Cortex-A53 cores instead. So move the shared cpu based and peripherals nodes into sun50i-h5.dtsi so, that it can shared among the sun50i-h5 board dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-01sun50i: a64: Add initial Banana Pi M64 supportJagan Teki
BPI-M64 is a 64-bit quad-core mini single board computer using the Allwinner A64 SOC. BPI-M64 features - 1.2 Ghz Quad-Core ARM Cortex A53 - 2GB DDR3 SDRAM with 733MHz - MicroSD/eMMC(8GB) - 10/100/1000Mbps ethernet (Realtek RTL8211E/D) - Wifi + BT - IR receiver - Audio In/Out - Video In/Out - 5V 2A DC power-supply For dts file, Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'"). Boot from MMC: ------------- U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31) DRAM: 2048 MiB Trying to boot from MMC1 NOTICE: BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000) NOTICE: Configuring SPC Controller NOTICE: BL3-1: v1.0(debug):aa75c8d NOTICE: BL3-1: Built : 18:28:27, May 24 2017 NOTICE: Configuring AXP PMIC NOTICE: PMIC: setup successful INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9 U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +0000) Allwinner Technology CPU: Allwinner A64 (SUN50I) Model: BananaPi-M64 DRAM: 2 GiB MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. starting USB... No controllers found Hit any key to stop autoboot: 0 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-01sunxi: A64/Pine64: update device tree from LinuxAndre Przywara
The Linux device tree for the Allwinner A64 SoC has changed a lot since the U-Boot version was merged. Let's replace the current DT with a exact copy of the Linux one as of: commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b Merge: 0ff4c01 3c0e3abd Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Tue May 9 10:07:33 2017 -0700 This is the DT used in Linux 4.12-rc1. Since U-Boot has an Ethernet driver (while Linux does not yet), we provide the required DT nodes for it in an ...-u-boot.dtsi file, to both mark them as U-Boot specific and to allow easier upgrading once Linux gets the driver and its own binding later. Compared to the existing Ethernet DT nodes we just slightly tweak the clock and reset nodes in there to match the new bindings used by Linux for those. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-30sunxi: Update NanoPi Neo to use dtsiMylene JOSSERAND
Update the NanoPi Neo device tree file to use the NanoPi dtsi. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-30sunxi: Add support for NanoPi M1Mylene JOSSERAND
NanoPi M1 is a board based on Allwinner H3 CPU. This commit adds the support for this platform with: - an include device tree which enables UART, LEDs, GPIO key switch, 1 USB host ports and the SD-card as a dtsi file. - a device tree specific to this board that enables the 2 additional USB ports - a defconfig file for minimal support - a section in MAINTAINERS (add myself) Synchronized with the kernel device tree, from commits: sun8i-nanopi.dtsi: 85d2913614d9ab899d23b7ab7d22d23cf45bd1de sun8i-h3-nanopi-m1.dts: 10efbf5f16336b7540ad6a16aa1cb0b26bab033b Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-22Merge git://git.denx.de/u-boot-sunxiTom Rini
trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't get Kconfig errors on platforms without SPL, ie sandbox (without SPL). Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini
2017-05-22sandbox: Enable CMD_GETTIMESimon Glass
Enable this option by default on sandbox to increase build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_LZMADEC to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_LZMADEC Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_LZMA to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_LZMA Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_IRQ to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_IRQ Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_IOTRACE to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_IOTRACE Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_IO to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_IO Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_IMMAP to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_IMMAP Also move this command out of the cmd/ directory since it is PowerPC-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Kconfig: Add a CONFIG_IDE optionSimon Glass
At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate CONFIG_IDE option so that IDE support can be enabled without requiring the 'ide' command. Update existing users and move the ide driver into drivers/block since it should not be in common/. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_HDMIDETECT to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_HDMIDETECT Note that we cannot do 'default y if VIDEO' because this option is only enabled for a small subset of mx6 boards. Also this command is is not a great implementation (it doesn't use driver model). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_HASH to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_HASH Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Rework slightly, enable on some boards again] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_GETTIME to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_GETTIME Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_FUSE to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_FUSE Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_FPGA_LOADBP et al to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_FPGA_LOADBP CONFIG_CMD_FPGA_LOADFS CONFIG_CMD_FPGA_LOADMK CONFIG_CMD_FPGA_LOADP Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_ESBC_VALIDATE to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ESBC_VALIDATE Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_ERRATA to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ERRATA Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_ENTERRCM to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ENTERRCM Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_EEPROM et al to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_EEPROM CONFIG_CMD_EEPROM_LAYOUT CONFIG_EEPROM_LAYOUT_HELP_STRING Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Rework Kconfig logic slightly, define EEPROM location on TI eval platforms] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_CMD_ECCTEST to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ECCTEST Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22lib: move hash CONFIG options to KconfigTom Rini
Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support using hardware acceleration.") created entries for CONFIG_SHA1, CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL. However, no defconfig has migrated to it. Complete the move by first adding additional logic to various Kconfig files to select this when required and then use the moveconfig tool. In many cases we can select these because they are required to implement other drivers. We also correct how we include the various hashing algorithms in SPL. This commit was generated as follows (after Kconfig additions): [1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL [2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL Note: We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously because there is dependency between them. Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Convert CONFIG_SPL_BOARD_INIT to KconfigLey Foon Tan
This converts the following to Kconfig: CONFIG_SPL_BOARD_INIT Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> [trini: Update the Kconfig logic] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22nds32: Support AE3XX platform.rick
Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
2017-05-22nds32: Support AG101P timer DM.rick
Support AG101P timer device tree flow. Signed-off-by: rick <rick@andestech.com>
2017-05-22nds32: Support AG101P serial DM.rick
Support AG101P serial device tree flow. Signed-off-by: rick <rick@andestech.com>
2017-05-18Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2017-05-18Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2017-05-18ARM: dts: am335x-evm: disable mmc3Jean-Jacques Hiblot
SDIO is not supported in u-boot, there is no point in enabling mmc3. For this purpose, add u-boot specific dtsi that this will be included automatically while building the dtb. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-18arm: socfpga: Enable build for Arria 10Ley Foon Tan
Update Kconfig and Makefile to enable Arria 10. Clean up Makefile and sorting *.o alphanumerically. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add SPL support for Arria 10Ley Foon Tan
Add SPL support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: dts: Add dts and dtsi for Arria 10Ley Foon Tan
Device tree files for Arria 10 Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add misc support for Arria 10Ley Foon Tan
Add misc support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add pinmux for Arria 10Ley Foon Tan
Add pinmux support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add sdram header file for Arria 10Ley Foon Tan
Add sdram header file for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add system manager for Arria 10Ley Foon Tan
Add system manager register struct and macros for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add clock driver for Arria 10Ley Foon Tan
Add clock driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add reset driver support for Arria 10Ley Foon Tan
Add reset driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add A10 macrosLey Foon Tan
Add i2c, timer and other A10 macros. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure misc driverLey Foon Tan
Restructure misc driver in the preparation to support A10. Move the Gen5 specific code to gen5 file. Change all uint32_t_to u32. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure system managerLey Foon Tan
Restructure system manager in the preparation to support A10. No functional change. Change uint32_t to u32. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure reset manager driverLey Foon Tan
Restructure reset manager driver in the preparation to support A10. Move the Gen5 specific code to gen5 files. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure clock manager driverLey Foon Tan
Restructure clock manager driver in the preparation to support A10. Move the Gen5 specific code to _gen5 files. - Change all uint32_t to u32 and change to use macro BIT(n) for bit shift. - Check return value from wait_for_bit(). So change return type to int for cm_write_with_phase() and cm_basic_init(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: dts: imx7d-sdb: add usdhc supportPeng Fan
Add usdhc support Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-01 01:52:30 +0000