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2017-08-01x86: coreboot: kconfig: Imply drivers that are usefulBin Meng
U-Boot as coreboot payload can run on any x86 hardware ideally. Let's imply some common drivers that are useful. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: broadwell: kconfig: Imply platform specific driversBin Meng
Imply Broadwell-specific drivers in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: ivybridge: kconfig: Imply platform specific driversBin Meng
Imply drivers that are working with Ivybridge platform in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: baytrail: kconfig: Imply platform specific driversBin Meng
BayTrail integrates lots of peripherals that have U-Boot drivers. Imply those in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Imply DM uclass driversBin Meng
Now that all x86 boards have been converted to use DM, we can imply these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the top level. Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH are selected. Change to use 'imply' to allow them to be removed. Note with this change, chromebook_link64 build fails: common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate' lib/built-in.o: In function `hsearch_r': lib/hashtable.c:380: undefined reference to 'env_callback_init' lib/hashtable.c:382: undefined reference to 'env_flags_init' make[1]: *** [spl/u-boot-spl] Error 1 CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build again. This is just a workaround as it is not needed at all. See commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for the same issue seen on QEMU 64-bit target. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select OF_CONTROLBin Meng
This is a must have for all x86 boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Imply ENABLE_MRC_CACHE in the platform KconfigBin Meng
Platform knows whether MRC cache is implemented, but using it can be a choice of a specific board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select ARCH_EARLY_INIT_R in the platform KconfigBin Meng
This is architecture-dependent early initialization hence should be put in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select ARCH_MISC_INIT in the platform KconfigBin Meng
arch_misc_init() is intended to do architecture-dependent stuff. This is required by each platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Let board select BOARD_EARLY_INIT_FBin Meng
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes and should be not 'default y' for all x86 boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Imply HAVE_INTEL_ME in the platform KconfigBin Meng
Intel Management Engine is required by the platform, however it's not a must have when building a U-Boot image. For example, during development normally programming ME firmware is a one-time effort. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select PCI and DM_PCIBin Meng
PCI is the de facto interconnect bus in an x86 system. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select USE_PRIVATE_LIBGCCBin Meng
x86 is using the built-in libgcc implementation and this cannot be turned off. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select TIMER and X86_TSC_TIMERBin Meng
Without a timer, U-Boot just doesn't boot. This is not something we can turn off. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: Make table address selectableAndy Shevchenko
Some firmwares might have another window for generated tables. So, introduce two configuration options to select start address and maximum length for the generated tables. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01x86: Enforce toolchain to generate 64-bit codes for 64-bit U-BootBin Meng
64-bit U-Boot image is a combination of 32-bit U-Boot (SPL) plus 64-bit U-Boot (proper). For the U-Boot proper, it has be compiled to 64-bit object codes. Attempting to use a toolchain to compile 64-bit U-Boot for qemu-x86_64, like kernel.org 4.9 i386-linux-gcc, fails with the following errors: arch/x86/cpu/intel_common/microcode.c:79:2: error: PIC register clobbered by 'ebx' in 'asm' The issue is because toolchain is preconfigured to generate code for the 32-bit architecture (i386), and currently '-m64' is missing in the makefile fragment. Using kernel.org 4.9 x86_64-linux-gcc works out of the box, since it is preconfigured to generate 64-bit codes. When compiling U-Boot SPL, '-m32' is passed to the toolchain, no mater 32-bit (i386-linux-) or 64-bit (x86_64-linux) the toolchain is preconfigured to generate. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: Use default stack boundary alignmentBin Meng
At present U-Boot x86 build is using -mpreferred-stack-boundary=2 which is 4 bytes stack boundary alignment. With 64-bit U-Boot, the minimal required stack boundary alignment is 16 bytes. If -mpreferred-stack-boundary is not specified, the default is 4 (16 bytes). Switch to use the default one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01dm: sunxi: Linksprite_pcDuino3: Correct polarity of MMC card detectSimon Glass
This is shown as active high in the schematics[1], so fix it. [1] https://patchwork.ozlabs.org/patch/777890/ Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01ahci: Support non-PCI controllersSimon Glass
At present the AHCI SCSI driver only supports PCI with driver model. Rename the existing function to indicate this and add support for adding a non-PCI controller . Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-31configs: Migrate CMD_NAND*Tom Rini
Migrate all remaining instances of CMD_NAND, CMD_NAND_TRIMFFS CMD_NAND_LOCK_UNLOCK and CMD_NAND_TORTURE from the headers into the defconfig files. Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-31arm: mach-omap2: Align image address before cache operationsAndrew F. Davis
The image address passed to secure_boot_verify_image() may not be cacheline aligned, round the address down to the nearest cacheline. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-07-30x86: acpi: Don't touch hardware on HW reduced platformsAndy Shevchenko
If ACPI HW reduced bit in FADT is set we should ignore any ACPI hardware communications. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: acpi: Export acpi_fill_mcfg() with __weak attributeAndy Shevchenko
Some platforms might require different approach when filling memory mappings configuration table. Allow them to override the common method. At the same time export acpi_create_mcfg_mmconfig(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: acpi: Deduplicate acpi_fill_madt() implementationAndy Shevchenko
In Baytrail and Quark support code acpi_fill_madt() is identical. Deduplicate its implementation by moving to lib/acpi_tables.c. At the same time mark acpi_fill_madt() with __weak attribute to keep a possibility to override it in platform code Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: acpi: Name fields in FADT in accordance with specificationAndy Shevchenko
ACPI specification defines FADT fields marked as reserved in U-Boot. Name these fields in accordance with ACPI specification. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: acpi: Fill OEM revisionAndy Shevchenko
Fill OEM revision field in the tables by U-Boot build date. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: conga-qeval20-qa3-e3845.dts: Enable xHCI support in dtsStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: dfi-bt700: Add xHCI USB supportStefan Roese
Change from EHCI to xHCI on the DFI BayTrail SoM. The xHCI USB hub is connected to an GPIO on the DFI BayTrail SoM. For correct operation, it needs to get reset upon power-up. Otherwise it may happen that the hub is not detected after a software reboot. This patch also configures this GPIO in the dts for correct operation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: Add Intel Edison board filesAndy Shevchenko
Add Intel Edison board which is using U-Boot. The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Felipe Balbi <felipe.balbi@linux.intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com> In case we're building for Intel Edison, we must have 4096 bytes of zeroes in the beginning on u-boot.bin. This is done in board/intel/edison/config.mk. First run sets hardware_id environment variable which is read from System Controller Unit (SCU). Serial number (serial# environment variable) is generated based on eMMC CID. MAC address on USB network interface is unique to the board but kept the same all over the time. Set mac address from U-Boot using following scheme: OUI = 02:00:86 next 3 bytes of MAC address set from eMMC serial number This allows to have a unique mac address across reboot and flashing. Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> [bmeng: Add MAINTAINERS file for Intel Edison board] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: Add Intel Tangier supportFelipe Balbi
Add Intel Tangier SoC support. Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform. The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-30x86: Add dma-mapping.h to architectural codeAndy Shevchenko
Some cross-platform drivers rely on this header present. Make it so for x86. It's just a copy'n'paste of arch/arm/include/asm/dma-mapping.h. Suggested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-30arch/x86: Select USB before selecting host driverAndy Shevchenko
Kbuild complains if USB is not selected before any of host driver. warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB) warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB) Select it for X86. Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-29Merge git://git.denx.de/u-boot-socfpgaTom Rini
2017-07-29Merge git://git.denx.de/u-boot-usbTom Rini
2017-07-28x86: minnowmax: Enable USB xHCI supportBin Meng
BayTrail SoC supports both EHCI and xHCI controllers. However only one host controller (either EHCI or xHCI) can be used. To enable HSIC and SS ports, xHCI must be used. This turns on xHCI support on Intel MinnowMax board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2017-07-28configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boardsBin Meng
Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS, remove it in all boards' config files. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2017-07-28dm: power: Convert as3722 to driver modelSimon Glass
Convert this PMIC driver to driver model and fix up other users. The regulator and GPIO functions are now handled by separate drivers. Update nyan-big to work correct. Three boards will need to be updated by the maintainers: apalis-tk1, cei-tk1-som. Also the TODO in the code re as3722_sd_set_voltage() needs to be completed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28tegra: dts: Move stdout-path to /chosenSimon Glass
This property should be in the /chosen node, not /aliases. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: Convert clock_decode_periph_id() to support livetreeSimon Glass
Adjust this to take a device as a parameter instead of a node. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: Convert USB setup to livetreeSimon Glass
Adjust this code to support a live device tree. This should be implemented as a PHY driver but that is left as an exercise for the maintainer. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28tegra: tegra124: Add a PMC syscon driverSimon Glass
The PMC can be modelled as a syscon peripheral. Add a driver for this so that it can be accessed by drivers when needed. Enable it for tegra124 boards. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28tegra: spl: Enable debug UARTSimon Glass
Enable the debug UART in SPL to allow early serial output even if the standard UART does not work (e.g. due to driver model problem). Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28sandbox: remove os_putc() and os_puts()Masahiro Yamada
They are unused since commit d8c6fb8cedbc ("sandbox: Drop special case console code for sandbox"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-07-27rockchip: add u-boot specific dts for rk3036 sdkAndy Yan
Add this dts to enable debug uart releated devices before relocation. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: use puts instead of printf when back to bootromAndy Yan
printf will increase the code size more than 1kb, but platform like rk3036 has no enough space for it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: enable SPL_LIBGENERIC for rk3036 based boardsAndy Yan
function board_init_f_init_reserve will call memset, which is implemented in lib, and enabled by CONFIG_SPL_LIBGENERIC_SUPPORT in spl stage. To reduce the code size, also enable SPL_TINY_MEMSET. As rk3036 will return to bootrom immediately after dram initialization, there is no need to run DM, so disable SPL_DM_SERIAL. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27sandbox: use CONFIG_VAL(SYS_MALLOC_F_LEN) to distinguish malloc pool size ↵Andy Yan
before relocation SPL and normal u-boot stage use different malloc pool size configuration before relocation, so use CONFIG_VAL(SYS_MALLOC_F_LEN) to fit different boot stage. Signed-off-by: Andy Yan <andyshrk@gmail.com> Changes in v3: - use CONFIG_VAL(), which suggested by Simon Changes in v2: None arch/sandbox/cpu/start.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27microblaze: spl: configure SYS_MALLOC_F_LEN independently for SPL and full ↵Andy Yan
U-Boot Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27powerpc: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-BootAndy Yan
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27mips: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-BootAndy Yan
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
generated by cgit (git 2.34.1) at 2024-12-27 05:31:54 +0000