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2016-02-29ARM: uniphier: remove unused macros for UMC base addressesMasahiro Yamada
These macros are no longer used. These base addresses are SoC-dependent, so they should not be placed in the header. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework DRAM size handling in UMC init codeMasahiro Yamada
Currently, DRAM size is converted twice: size in byte -> size in Gbit -> enum Optimize the code by converting the "size in byte" into enum directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-Pro4 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-LD4 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-sLD8 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for PH1-LD4Masahiro Yamada
Move frequency-dependent register settings to arrays for clean-up. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: support more DRAM use cases for PH1-sLD8Masahiro Yamada
Support DDR3-1600 / 512MB DDR size. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for PH1-sLD8Masahiro Yamada
Move frequency-dependent register settings to arrays for clean-up. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor DDR-PHY init codeMasahiro Yamada
The if-else statements for the frequency-dependent register settings seem clumsy. Moving them to arrays would make it cleaner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused argument of ph1_ld4_ddrphy_init()Masahiro Yamada
The DDR PHY settings no longer depend on the DRAM size. Drop the argument from the init function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: merge DDR PHY init code for 3 SoCsMasahiro Yamada
Now these three are almost the same. The only difference is the DTPR1 register dependency on the DRAM size, but it can be ignored. (It has already been ignored in PH1-sLD8 and PH1-Pro4.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add a field to specify DDR3+Masahiro Yamada
Add a field to distinguish DDR3+ from (standard) DDR3. It also allows to delete CONFIG_DDR_STANDARD (this is not a software configuration, but a board attribute). Default DDR3 spec for each SoC: PH1-LD4, PH1-sLD8: DDR3+ Others: DDR3 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: disable debug circuit clocks for PH1-Pro4Masahiro Yamada
These settings control the clocks around the memory controller. The debug ability is unneeded once it works properly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settingsMasahiro Yamada
These settings were used only for the PH1-sLD3 and older SoCs. The PH1-LD4 and newer one just ignore them because their DDR-PHY take care of such timing parameters instead. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for ProXstream2Masahiro Yamada
Currently, a dummy value is defined for the UMC_SPCCTLA register when the DRAM size is zero. This seems weird because the controller does not need setting in the first place if the size is zero. Also, redefine enum dram_size to represent the DRAM size per 16-bit unit. This makes things simpler because the channel 0 and 1 are connected with 32-bit width DRAM, while the channel 2 is connected with 16-bit width one. I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_* for consistency) while I am here because SIZE_* might be easily mixed-up with the macros in include/linux/sizes.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: use pr_err() where possibleMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize ProXstream2 UMC init code with "for" loopMasahiro Yamada
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework struct uniphier_board_dataMasahiro Yamada
This commit reworks "struct uniphier_board_data" with an array of DRAM channel data in it. It will allow further cleanups by means of "for" statements that iterate over the DDR channels. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused umc_polling()Masahiro Yamada
This function is unused. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: default to environment in eMMCMasahiro Yamada
Of the several boot devices supported, it looks like the eMMC is the most commonly used. Enable CONFIG_ENV_IS_IN_MMC by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add a command to find the first MMC (non-SD) deviceMasahiro Yamada
UniPhier SoC family supports both (e)MMC boot and SD card boot; however, both of them are handled in the same uclass. When booting from the eMMC, we want to know the device number of the (e)MMC, not SD. This command is useful to find the first MMC (non-SD) device. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add eMMC boot supportMasahiro Yamada
Export device nodes needed for eMMC boot (eMMC node, pinctrl, and clock) to the SPL DTB. CONFIG_SUPPORT_EMMC_BOOT is also necessary to use "mmc partconf" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: dts: uniphier: add SD/MMC host controller nodesMasahiro Yamada
This host controller is available for all UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: enable UniPhier SD/MMC host driverMasahiro Yamada
Enable the driver in all UniPhier defconfig files and add some needed defines to the common files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: dts: uniphier: add GPIO controller nodesMasahiro Yamada
Make the GPIO driver really active. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: enable GPIO command and driver for UniPhier SoCsMasahiro Yamada
This allows to use the "gpio" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-02-29gpio: do not include <asm/arch/gpio.h> for UniPhierMasahiro Yamada
I implemented a GPIO driver based on Driver Model for the UniPhier SoC family, but I could not find any good reason why such SoC specific GPIO headers are needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-02-29ARM: dts: uniphier: rework System Bus nodesMasahiro Yamada
Follow the changes of DTS in Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-24Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2016-02-24Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-02-24microblaze: Add missing chosen nodeMichal Simek
fdtgrep requires /chosen node to be specified or at least more nodes which stays in DTS to generate output. Error message: ./tools/fdtgrep -b u-boot,dm-pre-reloc -RT dts/dt.dtb -n /chosen -O dtb | ./tools/fdtgrep -r -O dtb - -o spl/u-boot-spl.dtb -P pinctrl-0 -P pinctrl-names -P clocks -P clock-names -P interrupt-parent Error: FDT_ERR_BADMAGIC This patch add empty chosen node to keep fdtgrep happy and pass compilation for in tree DTS file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-24rpi: set board serial number in environmentLubomir Rintel
Gets propagated into the device tree and then into /proc/cpuinfo where users often expect it. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
2016-02-24stm32: add support for stm32f7 & stm32f746 discovery boardVikas Manocha
This patch adds support for stm32f7 family & stm32f746 board. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2016-02-24gpio: stm32_gpio: move base addresses to the soc fileVikas Manocha
Base addresses for GPIOs could be different for different socs, this patch moves the base addresses from driver to the soc specific location. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2016-02-24gpio: stm32_gpio: move clock config from driver to boardVikas Manocha
This patch removes the gpio clock enable from gpio driver & move it in the board code, making it possible to use the gpio driver with other socs. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2016-02-24arm: socfpga: Fix ethernet reset handlingMarek Vasut
The following patch caused cpu_eth_init() to not be called anymore for DM-capable boards: commit c32a6fd07b1839e4a45729587ebc8e1c55601a4d Date: Sun Jan 17 14:51:56 2016 -0700 net: Don't call board/cpu_eth_init() with driver model This breaks ethernet on SoCFPGA, since we use that function to un-reset the ethernet blocks. Invoke the ethernet reset function from arch_misc_init() instead to fix the breakage. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Denis Bakhvalov <denis.bakhvalov@nokia.com>
2016-02-24arm: socfpga: Remove bashisms from qts filterMarek Vasut
Weed out bashisms from the script. The echo -e does not work in dash, which is the default /bin/sh in debian . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dalon Westergreen <dwesterg@gmail.com>
2016-02-24arm: socfpga: cv_socdk: Add support for QSPI bootMarek Vasut
Add missing DT nodes to allow booting from QSPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Denis Bakhvalov <denis.bakhvalov@nokia.com>
2016-02-24arm: socfpga: av_socdk: Add support for QSPI bootMarek Vasut
Add missing DT nodes to allow booting from QSPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Denis Bakhvalov <denis.bakhvalov@nokia.com>
2016-02-24armv7: ls102xa: Move smmu and stream id initialization into the common soc codeAlison Wang
The initialization for smmu and stream id is moved into the common soc code. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24armv8/fsl-layerscape: fdt: add fixup for Fman ucodeQianyu Gong
Add fdt fixup to insert Fman firmware into the device tree. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24fm: fdt: Move fman ucode fixup to driver codeQianyu Gong
Not only powerpc/mpc85xx but also Freescale Layerscape platforms will use fdt_fixup_fman_firmware() to insert Fman ucode blob into the device tree. So move the function to Fman driver code. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24qe: move drivers/qe/qe.h to include/fsl_qe.hQianyu Gong
As the QE firmware struct is shared with Fman, move the header file out of drivers/qe/. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24armv8/ls1043a: Implement workaround for erratum A009660Mingkai Hu
Memory controller performance is not optimal with default internal target queue register value, write required value for optimal DDR performance. Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24armv8/ls1043a: enable workaround for errarum A009942Shengzhou Liu
DDR erratum A-009942 applies to LS1043A. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24powerpc/SECURE_BOOT: Add PAMU driverAneesh Bansal
PAMU driver basic support for usage in Secure Boot. In secure boot PAMU is not in bypass mode. Hence to use any peripheral (SEC Job ring in our case), PAMU has to be configured. The patch reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3. The Header file pamu.h and few functions in driver have been derived from Freescale Libos. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24arm: ls1021aqds: Enable driver model lpuart serial driverYork Sun
Convert ls1021aqds_nor_lpuart and ls1021aqds_ddr4_nor_lpuart to driver model suport. Enable lpuart port driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Alison Wang <alison.wang@nxp.com> CC: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>
2016-02-23Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2016-02-23sunxi: H3: Add support for the host usb-physJelle van der Waa
Add support for phy 1-3. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-02-23arm: ls1021aqds: Convert to driver model and enable serial supportYork Sun
Split duart configuration as device tree file. Move /chosen node out of board commone device tree. Convert ls1021aqds nor and SD configurations to driver model support (qspi already uses DM). Enable ns16550 DM serial driver for nor configurations. Signed-off-by: York Sun <york.sun@nxp.com> CC: Alison Wang <alison.wang@nxp.com> CC: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-27 06:30:15 +0000