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2017-12-07Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-12-07armv8: fix gd after relocationYork Sun
Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18 without checking the return value of spl_relocate_stack_gd(). Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: York Sun <york.sun@nxp.com> CC: Kever Yang <kever.yang@rock-chips.com> CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-07Revert "sandbox: remove os_putc() and os_puts()"Simon Glass
While sandbox works OK without the special-case code, it does result in console output being stored in the pre-console buffer while sandbox starts up. If there is a crash or a problem then there is no indication of what is going on. For ease of debugging it seems better to revert this change. This reverts commit 47b98ad0f6779485d0f0c14f337c3eece273eb54. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-06armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: Workaround for USB erratua on LS1012ARan Wang
This is suplement for patch which handle below errata: A-009007, A-009008, A-008997, A-009798 Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: fsl-layerscape: Add support of disabling core prefetchPrabhakar Kushwaha
Instruction prefetch feature is by default enabled during core release. This patch add support of disabling instruction prefetch by setting core mask in PPA. Here each core mask bit represents a core and prefetch is disabled at the time of core release. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-04Merge git://git.denx.de/u-boot-uniphierTom Rini
2017-12-04arm: Make gcc 6.0 or later a hard requirement now.Tom Rini
Move the warning to an error as we have been promising would happen in this release. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04armv8: mmu: fix page table mappingPeng Fan
To page mapping the lowest 2 bits needs to be 0x3. If not fix this, the final lowest 3 bits for page mapping is 0x1 which is marked as reserved. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-04arm64 :show_regs: show the address before relocationPeng Fan
After relocation, when error happends, it is hard to track ELR and LR with asm file objdumped from elf file. So subtract the gd->reloc_off the reflect the compliation address. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-12-04ARM: arch-meson: build memory banks using reported memory from registersNeil Armstrong
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04arm: Add Khadas VIM support based on Meson GXL familyNeil Armstrong
This adds platform code for the Khadas VIM board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04arm: Add LibreTech CC support based on Meson GXL familyNeil Armstrong
This adds platform code for the Libre Computer CC "Le Potato" board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04ARM: arch-meson: add ethernet common init functionNeil Armstrong
Introduce a generic common Ethernet Hardware init function common to all Amlogic GX SoCs with support for the Internal PHY enable for GXL SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04armv8: shrink exception table codeAndre Przywara
In the moment our exception entry code needs 34 instructions, so we can't use put it directly into the table entry, which offers "only" 32 instructions there. Right now we just put an unconditional branch there, then use a macro to place the 34 instructions *per entry* after that. That effectivly doubles the size of our exception table, which is quite a waste, given that we use it mostly for debugging purposes. Since the register saving part is actually identical, let's just convert that macro into a function, and "bl" into it directly from the exception slot, of course after having saved at least the original LR. This saves us about 950 bytes of code, which is quite a relief for some tight SPLs, in particular the 64-bit Allwinner ones. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2017-12-04add support for Raspberry Pi Zero WDmitry Korunov
Signed-off-by: Dmitry Korunov <dessel.k@gmail.com>
2017-12-04mtd: nand: Rename nand.h into rawnand.hMasahiro Yamada
This header was renamed to rawnand.h in Linux. The following is the corresponding commit in Linux. commit d4092d76a4a4e57b65910899948a83cc8646c5a5 Author: Boris Brezillon <boris.brezillon@free-electrons.com> Date: Fri Aug 4 17:29:10 2017 +0200 mtd: nand: Rename nand.h into rawnand.h We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-04ARM: uniphier: clean up board_initMasahiro Yamada
Remove unnecessary DECLARE_GLOBAL_DATA_PTR and header includes. <common.h> has been replaced with <linux/errno.h> and <linux/printk.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-02omap2: set the ethaddr as well as the usbethaddr env var to ensure static MACPeter Robinson
The kernel gets the ethernet MAC from the ethaddr variable, the omap boards for devices with USB based eth adapters just set the usbethaddr which doesn't appear to get passed to the kernel. The same Raspberry Pi code sets both ethaddr and usbethaddr so lets do that so linux (tested 4.13 and 4.14) get a static rather than a random MAC address, while not regressing users of usbethaddr. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2017-12-02rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASKPhilipp Tomsich
The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15. Fix this to remove an "integer-overflow on shifted constant" warning. Fixes: 9246d9e ("rockchip: rk3128: add clock driver") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-02rockchip: clk: rk3128: fix NANDC_PLL_SEL_MASKPhilipp Tomsich
The PLL selector field for NANDC is only 2 bits wide. This fixes an 'int-overflow on shift' warning. Fixes: 9246d9e ("rockchip: rk3128: add clock driver") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: dts: rk3399-puma: add /config/sysreset-gpio propertyPhilipp Tomsich
On the RK3399-Q7, we want to trigger a full platform reset (so the various software stacks supported don't have to deal with the same complexities over and over again) in case that anything other than a power-on reset occurred. To do so, this defines the /config/sysreset-gpio property and has it point to a GPIO that will perform a power-on reset of the entire platform. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-11-30rockchip: dts: rk3399-puma: add a 'tsd, usb-port-power' stringlist for USB1Philipp Tomsich
USB1 is connected to the on-module USB 3.0 hub and power to the hub (actually it's a reset signal, modeled as a fixed regulator, that will be released) should be enabled only during the first probing of the device to avoid the hub from entering its low-power mode (where it tries to attach on a fixed interval, but we always miss the timeslot when U-Boot has the controller listening). This adds a 'tsd,usb-port-power' stringlist to enable the infrastructure in the board-specific usb_hub_reset_devices to find and control the fixed regulator associated with control of the USB hub. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
2017-11-30rockchip: rk3036: sdram: correct setting for pll integer modeKever Yang
According to rk3036 TRM, should be set to '1' for the pll integer mode, while the '0' means the frac mode. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3036: update clock driver for ddrKever Yang
After the MASK MACRO update, we need to update the driver at the same time. This is a fix to: 37943aa rockchip: rk3036: clean mask definition for cru reg Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3036: fix pll config for correct frequencyKever Yang
There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy, so we need to double to pll output and then ddr can work in correct frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add evb-rk3128 supportKever Yang
evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add pinctrl driverKever Yang
Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add clock driverKever Yang
Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add soc basic supportKever Yang
RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add device tree fileKever Yang
Add dts binding header for rk3128, files origin from kernel. Series-Changes: 2 - fix i2c address - add saradc and usb phy node - emmc using fifo mode for there is no dma support in rk3128 emmc - add some clock id in cru.h Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini
2017-11-30Merge git://git.denx.de/u-boot-marvellTom Rini
2017-11-30Merge git://git.denx.de/u-boot-x86Tom Rini
2017-11-30ARM: rmobile: Rework the ULCB CPLD driverMarek Vasut
Rework the ULCB CPLD driver and make it into a sysreset driver, since that is what the ULCB CPLD driver is mostly for. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30arm: mvebu: enable boot from NANDSean Nyekjaer
Check if we are booting from NAND and let the bootrom continue to load the rest of the bootloader Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
2017-11-30arm: mvebu: fix boot from UART when in fallback modeSean Nyekjaer
It's the first 8 bits of the bootrom error register that contain the boot error/fallback error code. Let's check that and continue to boot from UART. Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
2017-11-30arm: mvebu: add nand pinsSean Nyekjaer
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
2017-11-30x86: lib: Implement standalone __udivdi3 etc instead of libgcc onesStefan Roese
This patch removes the inclusion of the libgcc math functions and replaces them by functions coded in C, taken from the coreboot project. This makes U-Boot building more independent from the toolchain installed / available on the build system. The code taken from coreboot is authored from Vadim Bendebury <vbendeb@chromium.org> on 2014-11-28 and committed with commit ID e63990ef [libpayload: provide basic 64bit division implementation] (coreboot git repository located here [1]). I modified the code so that its checkpatch clean without any functional changes. [1] git://github.com/coreboot/coreboot.git Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-30Revert "x86: bootm: Fix FIT image booting on x86"Anatolij Gustschin
This reverts commit 13c531e52a09b4e6ffa8b5a1457199b0a574cb27. The error message with FIT style image mentioned in the above commit only happens when booting using FIT image containing bzImage kernel and without setup node (setup.bin). The current documentation for x86 FIT support in doc/uImage.FIT/x86-fit-boot.txt mentions that kernel's setup.bin file is required for building x86 FIT images. The above commit breaks FIT images generated as described in the documentation. Revert it to allow booting with images built in the documented way. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-30x86: don't compare pointers to 0Heinrich Schuchardt
x86_vendor_name is defined as static const char *const x86_vendor_name[] So its elements should not be compared to 0. Remove superfluous paranthesis. Problem identified with Coccinelle. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-30x86: qemu: Move Cache-As-RAM memory from area mapped to ROMAnton Gerasimov
ROM has been made read-only in qemu recently (namely commit 208fa0e4: "pc: make 'pc.rom' readonly when machine has PCI enabled"). So this patch restores compatibility between U-Boot and qemu. Signed-off-by: Anton Gerasimov <anton@advancedtelematic.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: mention qemu commit title in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-29board: laird: add WB50N CPU moduleBen Whitten
This board is based on the Atmel sama5d3 eval boards. Supporting the following features: - Boot from NAND Flash - Ethernet - FIT - SPL Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-29board: laird: add WB45N CPU moduleBen Whitten
This board is based on the Atmel 9x5 eval board. Supporting the following features: - Boot from NAND Flash - Ethernet - FIT - SPL Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-29ARM: dts: Rename logicpd-toredp-37xx-devkit in U-BootAdam Ford
In U-Boot, this device tree is compatible with both the Torpedo and SOM-LV kits. Let's rename it in the device tree since the U-Boot code and show a more generic OMAP3 name. The code auto detects between the two and loads the proper DTB file for Linux. This would eliminate the SOM-LV showing the name Torpedo during boot and hopefully eliminate some confusion. Signed-off-by: Adam Ford <aford173@gmail.com>
2017-11-29board: atmel: add sama5d2_ptc_ek boardLudovic Desroches
Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board which was a prototype. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-11-29ARM: at91: add sama5d2 smc headerLudovic Desroches
Add a header for SAMA5D2 SMC since it's not compatible with SAMA5D3 one. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> [wenyou: fix the wrong base address of the SMC register] Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-11-29mach-stm32: Factorize MPU's region config for STM32 SoCsPatrice Chotard
MPU's region setup can be factorized between STM32F4/F7/H7 SoCs family and used a common MPU's region config. Only one exception for STM32H7 which doesn't have device area located at 0xA000 0000. For STM32F4, configure_clocks() need to be moved from arch_cpu_init() to board_early_init_f(). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-11-29stm32: migrate clock structs in include/stm32_rcc.hPatrice Chotard
In order to factorize code between STM32F4 and STM32F7 migrate all structs related to RCC clocks in include/stm32_rcc.h Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-11-29clk: clk_stm32fx: add clock configuration for mmc usagePatrice Chotard
MMC block needs 48Mhz source clock, for that we choose to select the SAI PLL. Update also stm32_clock_get_rate() to retrieve the MMC clock source needed in MMC driver. STM32F4 uses a different RCC variant than STM32F7. For STM32F4 sdmmc clocks bit are located into dckcfgr register whereas there are located into dckcfgr2 registers on STM32F7. In both registers, bits CK48MSEL and SDMMC1SEL are located at the same position. Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
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