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2019-05-21powerpc: Migrate HIGH_BATS to KconfigMario Six
Migrate the CONFIG_HIGH_BATS variable to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21mpc83xx: pcie: Read the clock from registersMario Six
The MPC83xx DM timer driver disables arch.pciexp*_clk, and uses clk_get_rate instead. But the legacy MPC83xx PCIe driver still uses arch.pciexp*_clk for the clock. Hence, read the PCIe clock from the registers in the legacy MPC83xx PCIe driver. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21mpc83xx: Kconfig: Migrate HRCW to KconfigMario Six
The HRCW (hardware reset configuration word) is a constant that must be hard-coded into the boot loader image. So, it must be available at compile time, and cannot be migrated to the DT mechanism, but has to be kept in Kconfig. Configuration of this crucial variable should still be somewhat comfortable. Hence, make its fields configurable in Kconfig, and assemble the final value from these. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21mpc83xx: Get rid of CONFIG_83XX_CLKINMario Six
MPC83xx uses CONFIG_83XX_CLKIN instead of CONFIG_SYS_CLK_FREQ to set the system clock. To migrate the architecture, we can replace CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ. To do this * replace all occurrences of CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ * set CONFIG_SYS_CLK_FREQ to the old value of CONFIG_83XX_CLKIN in all MPC83xx config files Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21mpc83xx: Replace CONFIG_83XX_CLKIN in calculationsMario Six
CONFIG_SYS_CLK_FREQ is the standard way to set the system clock frequency. On MPC83xx, CONFIG_83XX_CLKIN is used for this purpose. Hence, the obvious way is to replace CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ. A few MPC83xx boards use the CONFIG_83XX_CLKIN variable for computing CONFIG_SYS_NS16550_CLK. This makes it harder to replace CONFIG_83XX_CLKIN. But the value of the multiplicator can be read from the SPMR register. Hence, replace the static calculations with a call to a new get_bus_freq function, as other architectures do. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21mpc83xx: Migrate legacy PCI options to KconfigMario Six
The MPC83xx include files contain some settings of the PCI subsystem. Migrate these to Kconfig until a proper DM PCI driver exists. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21mpc83xx: Make distinct MPC8349EMDS_SDRAM boardMario Six
The MPC8349EMDS config file contains config options to enable SDRAM support. To keep this ability after the Kconfig migration, create a new MPC8349EMDS_SDRAM board that enables the SDRAM support and remove the SDRAM support from the original board. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20powerpc: Add LSDMR config valuesMario Six
The LSDMR_* macros are used to configure the system bus on MPC83xx. A few of the possible LSDMR_* macros were never defined in the respective include files. This renders the SDRAM support on the MPC8349EMDS unusable, because it uses these undefined macros. To make the SDRAM option work, introduce these macros into the proper config file. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Make distinct caddy2 configMario Six
vme8349.h contains two separate boards: The vme8349 itself, and the caddy2 board. The caddy2 board is chosen by setting certain config variables. Create a proper config file for the caddy2 board to make Kconfig migration easier. Furthermore, simplify the vme8349 and caddy2 configs by keeping only the options necessary for each board. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Make distinct MPC8313ERDB targetsMario Six
MPC8313ERDB has the option of either enabling NOR or NAND boot in its config file (by commenting out certain #ifdefs). To keep this ability after migrating options to Kconfig, we introduce two MPC8313ERDB configs: one for NOR, and one for NAND. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20keymile: Make distinct kmeter1, and kmcoge5ne configsMario Six
The kmeter1, and kmcoge5ne boards also build from the same config file with #ifdef logic. Create a separate include config for each board with the #ifdef logic resolved as needed. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20keymile: Make distinct kmsupx5, tuge1, kmopti2, and kmtepr2 configsMario Six
The kmsupx5, tuge1, kmopti2, and kmtepr2 boards all build from the same include config file with lots of #ifdef logic. To ease Kconfig migration, create new config include files for these boards, and resolve the #ifdef logic as needed. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20keymile: Make distinct kmtegr1, kmvect1, suvd3 configsMario Six
The kmtegr1, kmvect1, and suvd3 boards all use the same config include file with lots of #ifdefs in it. The Kconfig migation will become easier if we get rid of these #ifdefs first. Hence, create distinct config include files for these boards, and unwind the #ifdef logic in these config files to only include the options necessary for each board. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Introduce ARCH_MPC837XMario Six
Replace CONFIG_MPC837x with a proper CONFIG_ARCH_MPC837X Kconfig option. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Introduce ARCH_MPC836*Mario Six
Replace CONFIG_MPC836* with proper CONFIG_ARCH_MPC836* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Introduce ARCH_MPC834*Mario Six
Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Introduce ARCH_MPC832*Mario Six
Replace CONFIG_MPC832* with proper CONFIG_ARCH_MPC832* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Introduce ARCH_MPC831*Mario Six
Replace CONFIG_MPC833* with proper CONFIG_ARCH_MPC833* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20mpc83xx: Introduce ARCH_MPC830*Mario Six
Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-19Merge git://git.denx.de/u-boot-x86Tom Rini
- Allow coreboot to process unhandled tags - Enable NVMe on QEMU x86_64 target
2019-05-19x86: coreboot: make it possible to process unhandled tagsChristian Gmeiner
coreboot makes it possible to add own entries into coreboot's table at a per mainboard basis. As there might be some custom ones it makes sense to provide a way to process them. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-18ARM: mediatek: mt8516: use PSCI to reset the SoCFabien Parent
Instead of using the watchdog, let's use PSCI to perform the reset of the SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-05-18dt: bcm63158: watchdog should use a 50Mhz clockPhilippe Reynes
The watchdog should use a clock at 50 Mhz, so instead of using the clock osc (200 Mhz), we define a reference clock at 50Mhz and use it for both watchdog. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-18dt: bcm6858: watchdog should use a 50Mhz clockPhilippe Reynes
The watchdog should use a clock at 50 Mhz, so instead of using the clock osc (200 Mhz), we define a reference clock at 50Mhz and use it for both watchdog. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18CONFIG_SYS_[DI]CACHE_OFF: convert to KconfigTrevor Woerner
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig parameters; only for the ARC architecture. This patch turns these two parameters into Kconfig items everywhere else they are found. All of the include/configs/* and defconfig changes in this patch are for arm machines only. The Kconfig changes for arc, nds32, riscv, and xtensa have been included since these symbols are found in code under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined include/configs/* or defconfigs for these architectures exist which include these symbols. These results have been confirmed with tools/moveconfig.py. Acked-by: Alexey Brodkin <abrodkin@snopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Re-migrate for a few more boards] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18CONFIG_SYS_[ID]CACHE_OFF: unify the 'any' caseTrevor Woerner
According to De Morgan's Law[1]: !(A && B) = !A || !B !(A || B) = !A && !B There are 5 places in the code where we find: #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) and 4 places in the code where we find: #if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)) In words, the construct: !defined(CONFIG_SYS_[DI]CACHE_OFF) means: "is the [DI]CACHE on?" and the construct: defined(CONFIG_SYS_[DI]CACHE_OFF) means: "is the [DI]CACHE off?" Therefore !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) means: "the opposite of 'are they both off?'" in other words: "are either or both on?" and: (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF) means: "are either or both on?" As a result, I've converted the 4 instances of '(!A || !B)' to '!(A && B)' for consistency. [1] https://en.wikipedia.org/wiki/De_Morgan%27s_laws Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
2019-05-16Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- SoCFPGA DT and reset cleanup, AE MCVEVK board support.
2019-05-15Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-bootTom Rini
STM32 MCUs update: _ Add MPU region for SPI NOR memory mapped region _ Add missing QSPI flash compatible for STM32 F7 boards _ Update spi-tx-bus-width and spi-rx-bus-width properties _ Add QSPI support for STM32F469 Discovery board
2019-05-14ARM: dts: socfpga: Keep FPGA bridge entries in SPL DTMarek Vasut
Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle the bridges on/off as needed according to the handoff file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-14ARM: dts: socfpga: Factor out U-Boot specifics from A10 handoff filesMarek Vasut
Pull out the u-boot,dm-pre-reloc from socfpga_arria10_socdk_sdmmc_handoff.dtsi into separate dtsi header file to make it easier to patch in custom handoff dtsi files, without having to manually add the U-Boot bits. Shuffle the include clauses in the A10 DT files to make it obvious what gets included where without having to follow confusing long chain of includes, i.e. board DT file includes everything it needs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-14arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] boardWolfgang Grandegger
Re-add support for Aries Embedded MCV SoM, which is CycloneV based and the associated MCVEVK and MCVEVP baseboard. The board can boot from eMMC. Ethernet and USB is supported. The Aries Embedded boards have been removed with commit 03b54997d568 ("board/aries: Remove"). I will now take care of them. The device-tree files are from mainline Linux commit e93c9c99a629 ("Linux v5.1)". Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de> CC: Marek Vasut <marex@denx.de> CC: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-14arm: sofcpga: s10: remove unused ad-hoc reset codeSimon Goldschmidt
The stratix 10 reset manager ad-hoc code in arch/arm contains an unused function 'reset_deassert_peripherals_handoff' that has been added from the beginning. As this is probably a result of copying the gen5 reset manager and this function has never been used, remove it. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-14arm: socfpga: remove re-added ad-hoc reset codeSimon Goldschmidt
commit c5de2b7eae68 ("arm: socfpga: implement proper peripheral reset") has removed the call to 'reset_deassert_peripherals_handoff()' from socfpga gen5 SPL since the reset driver now handles resets. However, commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") has re-added this ad-hoc reset code, so that all peripherals were now again enabled instead of letting the drivers enable them by request. While at it, remove this function for gen5 as it should not be used. Fixes: commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-13Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- A10 FPGA programming support, Gen5 livetree conversion
2019-05-10spl: socfpga: Implement fpga bitstream loading with socfpga loadfsTien Fong Chee
Add support for loading FPGA bitstream to get DDR up running before U-Boot is loaded into DDR. Boot device initialization, generic firmware loader and SPL FAT support are required for this whole mechanism to work. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loadingTien Fong Chee
Add FPGA driver to support program FPGA with FPGA bitstream loading from filesystem. The driver are designed based on generic firmware loader framework. The driver can handle FPGA program operation from loading FPGA bitstream in flash to memory and then to program FPGA. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10sh: sh3: Remove CPU supportMarek Vasut
This CPU core is old, no boards using the CPU are left in mainline, it has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: shmin: Remove the boardMarek Vasut
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: ms7720se: Remove the boardMarek Vasut
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: mpr2: Remove the boardMarek Vasut
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Mark Jonas <mark.jonas@de.bosch.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: sh2: Remove CPU supportMarek Vasut
This CPU core is old, no boards using the CPU are left in mainline, it has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: rsk7269: Remove the boardMarek Vasut
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: rsk7264: Remove the boardMarek Vasut
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: rsk7203: Remove the boardMarek Vasut
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-09arm: k3: config.mk: Use k3_gen_x509_cert.sh to generate boot imagesLokesh Vutla
Instead of overlading makefile, use the k3_gen_x509_cert.sh script to generate boot images. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-09arm: zimage: add barebox image magic numberChristoph Fritz
For chainboot configurations or test environments, this patch allows booting barebox images by using command bootz. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
2019-05-09Fix spelling of available.Vagrant Cascadian
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
2019-05-09Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchipTom Rini
Improvements and new features: - split more rockchip pinctrl_core feature into per SoC - enable TPL for evb-rk3399 board - enable TPL/SPL for evb-px5 board - enable TPL and OP-TEE support for evb-rk3229 - update fix in arm common assembly start code for rockchip header file - update default SPL_FIT_GENERATOR for rockchip - rk3399 boards update to use '-u-boot.dtsi' - add new rk3399 boards: Nanopi M4, Nanopc T4 - enable sound for chromebook_minnie
2019-05-09Merge git://git.denx.de/u-boot-marvellTom Rini
- DM updates for multiple MVEBU boards (Stefan) - Add CRS305-1G-4S board (Luka) - Enable MMC in SPL on clearfog (Baruch)