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2018-09-27powerpc/dts: Makefile changes to clean and build dtsJagdish Gediya
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds filesJagdish Gediya
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-19Merge git://git.denx.de/u-boot-imxTom Rini
- changes in pico-* boards - fix imx6ull pinmux
2018-09-19Merge git://git.denx.de/u-boot-marvellTom Rini
- Multiples updates to the turris boards / platform - Changes / enhancements to the Marvell PHY drivers, mainly to support the turris platform - Many fixes and enhancements to the pxa3xx NAND driver - Fixes for the UART boot mode in kwboot - Misc minor changes to other 32bit and 64bit boards
2018-09-19board: turris_mox: Fixup U-Boot's device tree if PCIe connectedMarek Behún
If PCIe Mox module is connected we want to have PCIe node enabled in U-Boot's device tree. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19dts: mvebu: mcbin: drop redundant SD slot nodeBaruch Siach
Commit 61dccf73d302 (dts: mvebu: a80x0: Enable SD/eMMC interfaces) added a redundant DT node for SD card slot. Drop it. Cc: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19arch/arm/dts: Update Turris Mox device treeMarek Behún
Remove smi_pins definition since it is already in armada-37xx.dtsi. Add assigned-clocks definitions to spi0. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19ARM: mach-mvebu: handle fall-back to UART bootChris Packham
The bootROM in the Armada-38x (and similar) SoC has two modes for UART boot. The first is when the normal boot media is blank (or otherwise missing the kwb header). The second is when the boot sequence has been interrupted with the magic byte sequence on the UART lines. In the first mode the bootROM routine and error code register will indicate that there was an error booting from the configured media in bits 7:0. In the second mode there is no error to indicate but the boot source is provided via bits 31:28. Handle both situations so that kwboot can be used for both boot strapping a blank board and for intercepting a regular boot sequence. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19Revert "arm: mvebu: fix boot from UART when in fallback mode"Chris Packham
This reverts commit e83e2b390038c9075642cb243a6292241beb8d73. This prevents kwboot from overriding the hardware strapped boot source. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19arm64: mvebu: armada-8k: support environment in SD/eMMCBaruch Siach
Detect the SD/eMMC boot device at run-time. Load the environment from the boot deice, as well as save to it. Leave the environment offset the same as in the SPI flash. Make SD/eMMC 0 the default environment device when the boot device is not detected. Cc: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-18Merge git://git.denx.de/u-boot-dmTom Rini
- MPC83xx device tree additions (CPU and RAM) - Fix sandbox build error - Sync bitrev with Linux - Various ofnode/DT improvements
2018-09-18Merge branch 'master' of git://git.denx.de/u-boot into masterStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-09-18misc: Add MPC83xx serdes driverMario Six
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18cpu: Add MPC83xx CPU driverMario Six
Add a CPU driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18test: Add tests for CPU uclassMario Six
Add a sandbox CPU driver, and some tests for the CPU uclass. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18timer: Add MPC83xx timer driverMario Six
Add a timer driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18clk: Add MPC83xx clock driverMario Six
Add a clock driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18mpc83xx: Add sysreset driverMario Six
Add a sysreset driver for the MPC83xx platform. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18powerpc: Add read*_*/write*_* macrosMario Six
Define the read*_*/write*_* macros for the PowerPC platform to be able to use the macros in wait_bit.h. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18ram: Add driver for MPC83xxMario Six
Add a RAM driver for the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18sandbox: Enable bitrev library buildBin Meng
Imply CONFIG_BITREVERSE for Sandbox. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18sandbox: Build with -fPICAndy Shevchenko
Sandbox is not a real bootloader and it does require a position independent code to be supported. Thus, build it with -fPIC explicitly. Fixes: 16940f720f9b ("Makefile: Don't generate position independent code") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reported-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2018-09-17Merge git://git.denx.de/u-boot-x86Tom Rini
2018-09-17x86: cpu: add docstring to scu_ipc_command()Georgii Staroselskii
These comments were copied from the Linux kernel driver in drivers/platform/x86/intel_scu_ipc.c Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: tangier: acpi: add I2C6 nodeGeorgii Staroselskii
Now that we have I2C#6 working, it's time to add a corresponsing ACPI binding. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: dts: edison: configure I2C#6 pinsGeorgii Staroselskii
Now that we have the pinctrl driver for Merrifield in place we can make use of it and set I2C#6 pins appropriately. Initial configuration came from the firmware. Which quite likely has been used in the phones, where that is not part of Atom peripheral, is in use. Thus we need to override the leftover. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: tangier: pinmux: add API to configure protected pinsGeorgii Staroselskii
This API is going to be used to configure some pins that are protected for simple modification. It's not a comprehensive pinctrl driver but can be turned into one when we need this in the future. Now it is planned to be used only in one place. So that's why I decided not to pollute the codebase with a full-blown pinctrl-merrifield nobody will use. This driver reads corresponding fields in DT and configures pins accordingly. The "protected" flag is used to distinguish configuration of SCU-owned pins from the ordinary ones. The code has been adapted from Linux work done by Andy Shevchenko in pinctrl-merrfifield.c Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix build warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: cpu: introduce scu_ipc_raw_command()Georgii Staroselskii
This interface will be used to configure properly some pins on Merrifield that are shared with SCU. scu_ipc_raw_command() writes SPTR and DPTR registers before sending a command to SCU. This code has been ported from Linux work done by Andy Shevchenko. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-16Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini
2018-09-16Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2018-09-16m68k: ColdFire mcf5441x, add eSDHC supportAngelo Dureghello
This patch adds mcf5441x eSDHC support for the mcf5441x family. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16m68k: fix multiple memory accesses on swap operationsAngelo Dureghello
On a u32 val = __sw32(*addr); multiple memory accesses are not welcome, since "addr" may be an IO peripheral register address. This patch changes __sw16/32 to perform a single memory access for the source value. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16m68k: fix mcf5441x total interrupt numberAngelo Dureghello
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-15sh: tmu: Zap get_tbclk and timer_read_counterMarek Vasut
Replace those two functions with generic ones by defining the timer macros in include/config/*.h . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up register usageMarek Vasut
The code uses all in all three TMU registers, drop the massive register layout structures and just define the required timer registers and use them throughout the code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Inline sh_tmu.hMarek Vasut
The header contains only the TMU register layout, just inline it into the TMU timer implementation and drop the header completely. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQMarek Vasut
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2, while the old SH parts use CONFIG_SYS_CLK_FREQ directly. Just put this into the TMU implementation and drop the CONFIG_SH_TMU_CLK_FREQ config option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Inline get_tmu0_clk_rate()Marek Vasut
This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant directly instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Inline tmu_timer_{start,stop}()Marek Vasut
These functions are always called for timer = 0, so drop the timer check. Since these functions are called from one place only and they are reduced to one line of code, just inline them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Simplify the tmu_bit mathMarek Vasut
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0. Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIVMarek Vasut
This constant is always 4 , for all boards that exist. Define it once in arch/sh/lib/time.c and remove it from the configs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: sh7724: Drop EDMR macroMarek Vasut
Drop the macro as it is never used and it collides with sh_eth.h macros. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-09-15socfpga: stratix10: fix sdram_calculate_sizeDalon Westergreen
Incorrect type of size variable results in 0 being returned for sdram sizes greater than or equal to 4GB. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-14Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"Tom Rini
This commit is breaking several variants of da850, so: This reverts commit 5f389201dece76b484443773dce2525dc205f5a1. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-14imx: imx6ull: fix pinmux input_val for uart5 rx pinHeiko Schocher
just try to bring up an imx6ull board with console on uart5 and found, that input_val for pin MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX is 7 and not 5 on imx6ull. With this patch rx works now. Signed-off-by: Heiko Schocher <hs@denx.de>
2018-09-14pico-imx6ul: Convert to SPLFabio Estevam
There are two versions of imx6ul pico SOMs: one with 256MB and another one with 512MB of RAM. Convert to SPL so that both versions can be supported. This patch doesn't rework the clock initialization to avoid changing the behavior in this same patch, so it will be cleaned up in future. Currently only the 256MB is tested/supported. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-11ARM: da850evm_direct_nor_defconfig: Enable DM_SERIALAdam Ford
With DM enabled, this patch enables DM_SERIAL and removes the NS16550 initialization from da850_lowlevel since the driver will take care of that itself. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabledAdam Ford
boot-common.c checks to see if I2C is enabled in SPL, but it doens't check for DM_I2C before initializing it. This will now only initialize the I2C is the DM_I2C is not enabled to avoid initializing it more than once. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11ARM: dts: da850-evm-u-boot: Remove redundant entriesAdam Ford
With the re-sync from Linux 4.18, several entries in da850-evm-u-boot.dtsi are no longer necessary, so this patch removes them. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18Adam Ford
Signed-off-by: Adam Ford <aford173@gmail.com>
generated by cgit (git 2.34.1) at 2025-01-05 22:32:33 +0000