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2019-11-07ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Remove unused GPIOAdam Ford
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight. This patch removes the all but GPIO4 from the spl device tree to reduce the SPL footprint. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supplyKeerthy
Hook buck12_reg to vtm avs supply Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 nodeKeerthy
Add tps65941 node and dependent wkup_i2c0 node needed for AVS class 0 support Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-j721e-r5-common-proc-board: Add VTM nodeKeerthy
Add VTM node for voltage and thermal management. For u-boot, this is needed for supporting AVS class 0, as the efuse values for the OPPs are stored under the VTM. Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in suppliesTero Kristo
Link the vdd-supplies for the voltage domains under the VTM node. Also, enable the node under SPL. This will enable the AVS class 0 support on am65x-evm board. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-am654-r5-base-board: add supply rail for MPUTero Kristo
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached to i2c0 bus. Add device node for this so that it can be controlled via a regulator driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for splTero Kristo
Enable wkup_i2c0 as this is needed for voltage control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-am654-r5-base-board: Add VTM nodeKeerthy
Add VTM node for voltage and thermal management. For u-boot, this is needed for supporting AVS class 0, as the efuse values for the OPPs are stored under the VTM. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: mach-k3: j721e_init: Initialize avs class 0Keerthy
Initialize avs class 0 Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: mach-k3: am6_init: Initialize AVS class 0Keerthy
Initialize AVS class 0 so that mpu voltage rail is programmed to the AVS class 0 compensated value. Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: add initial support for the Phytium Durian Boardliu hao
This adds platform code and the device tree for the Phytium Durian Board. The initial support comprises the UART and the PCIE. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
2019-11-07arm: caches: Disable mmu only if mmu is availableLokesh Vutla
As part of disabling caches MMU as well gets disabled. But MMU is not available on all armv7 cores like R5F. So disable MMU only if it is available. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-07arm: socfpga: gen5: fix ERR_PTR_OFFSETSimon Goldschmidt
The default implementation of ERR_PTR/PTR_ERR maps errno values at the and of the address range (e.g. -EINVAL/-22 gets 0xFFFFFFEA). For socfpga gen5 SPL, this doesn't really work, as the heap is nearly at the end of the 32 bit address range. This patch adjusts the ERR_PTR_OFFSET to map errno values into the range of the Boot ROM, which should not be used for valid pointers. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-07arm64: Add memcpy_{from, to}io() and memset_io() helpersVignesh Raghavendra
Provide optimized memcpy_{from,to}io() and memset_io(). This is required when moving large amount of data to and from IO regions such as IP registers or accessing memory mapped flashes. Code is borrowed from Linux Kernel v5.4. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-06mpc85xx, dts, socrates: add u-boot specific dtsiHeiko Schocher
add u-boot specific dtsi file for socrates board. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06mpc85xx: add socrates dts from linuxHeiko Schocher
add socrates device tree from linux: commit 71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest") and added SPDX license identifier. Did not fix checkpatch warnings: arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where possible Also, add me as board maintainer. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-05imx: imx8mm-evk: enable ethernetPeng Fan
add phy-reset-gpios to reset phy Add board_phy_config to configure phy Enable DM_ETH Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05arm: dts: imx8mm: drop assigned clocks for clk nodePeng Fan
Drop assigned clocks for clk node, this will break boot on i.MX8MM EVK board. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not definedPeng Fan
When CONFIG_$(SPL_)CLK not defined, the clock controller device not exist, so to avoid boot failure for platform not have CONFIG_$(SPL_)CLK, add a check. Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add i.MX8MN DDR4 board supportPeng Fan
Support pinctrl/clk/sdhc, include ddr4 timing data. Log: U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) CPU: Freescale i.MX8MNano rev1.0 at 24 MHz Reset cause: POR Model: NXP i.MX8MNano DDR4 EVK board DRAM: 2 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add dtsi for i.MX8MNPeng Fan
Add dtsi for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8m: add i.MX8MN ddr4 image cfg filePeng Fan
Add cfg file for i.MX8MN DDR4 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: add get_boot_devicePeng Fan
No ROM INFO structure on iMX8MN, use new ROM API to get boot device from ROM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: cpu: restrict get_boot_devicePeng Fan
i.MX8MN has its own get_boot_device, so restrict with i.MX8MQ and i.MX8MM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add rom api supportPeng Fan
i.MX8MN support loading images with rom api, so we implement reuse board_return_to_bootrom to let ROM loading images. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: spl: use spl_board_boot_device for i.MX8MNPeng Fan
i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: add pin headerPeng Fan
Add pin header for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add i.MX8MN PE propertyPeng Fan
i.MX8MN does not have LVTTL, it has a PE property Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8m: add clk support for i.MX8MNPeng Fan
i.MX8MN has similar architecture with i.MX8MM, so it could reuse the clock code of i.MX8MM, but i.MX8MN has different CCM root configurations, so need a separate root entry. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: support get_cpu_revPeng Fan
Add a dummy cpu type and support get_cpu_rev for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add i.MX8MN kconfig entryPeng Fan
Add i.MX8MN kconfig entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05arm: dts: imx8qm-mek: add u-boot, dm-spl for lpuart0Peng Fan
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL is enabled. Since uclass power domain is also enabled, to make lpuart work properly, need add u-boot,dm-spl for lpuart power domain and its parent. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05arm: dts: imx8qxp-mek: add u-boot, dm-spl for lpuart0Peng Fan
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL is enabled. Since uclass power domain is also enabled, to make lpuart work properly, need add u-boot,dm-spl for lpuart power domain and its parent. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8qm: mek: enable dm-spl for pmPeng Fan
with u-boot,dm-spl added for imx8qm-pm node, and SPL_SIMPLE_BUS enabled, the bind and probe code in board file could be removed. Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-04Merge tag 'u-boot-imx-20191104' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191104 ------------------- - i.MX NAND: nandbcb support for MX6UL / i.MX7 - i.MX8: support for HAB - Convert to DM (opos6ul, mccmon6) - Toradex i.MX6ull colibri - sync DTS with kernel Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
2019-11-04Merge branch '2019-11-04-ti-imports'Tom Rini
- Various CPSW related improvements, DTS resync
2019-11-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Add support for Intel FSP-S and FSP-T in binman - Correct priority selection for image loaders for SPL - Add a size check for TPL - Various small SPL/TPL bug fixes and changes - SPI: Add support for memory-mapped flash
2019-11-03imx: nandbcb: add support for writing BCB onlyIgor Opaniuk
Add subcommand for add writing BCB only, where we provide appropriate offsets for firmware1 and firmware2 and size. Example of usage: > nandbcb bcbonly 0x00180000 0x00080000 0x00200000 Writing 1024 bytes to 0x0: randomizing OK Writing 1024 bytes to 0x20000: randomizing OK Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: nandbcb: refactor update functionIgor Opaniuk
Move code for writing FCB/DBBT pages to a separate function Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: nandbcb: add support for i.MX7Igor Opaniuk
Add support for updating FCB/DBBT on i.MX7: - additional new fields in FCB structure - Leverage hardware BCH/randomizer for writing FCB Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: gpmi: add defines for hw randominizerIgor Opaniuk
Extend GPMI Integrated ECC Control Register Description, include additional defines for enabling randomizer function and providing proper randomizer type. For additional details check i.MX7 APR, section 9.6.6.3 GPMI Integrated ECC Control Register Description (GPMI_ECCCTRLn) Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: support i.MX8QM ROM 7720 a1 boardOliver Graute
Add i.MX8QM ROM 7720a1 board support Boot log as below: U-Boot 2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Advantech iMX8QM Qseven series Board: ROM-7720-A1 4GB Build: SCFW 65afe5f6 Boot: SD2 DRAM: 4 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 Net: eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1 , eth-1: ethernet@5b050000 Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
2019-11-03arm: dts: imx8mm: sync dts from Linux KernelPeng Fan
Sync dts for i.MX8MM from Linux Kernel 5.4.0-rc1 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03board/BuR/brppt2: initial commitHannes Schmelzer
This commit adds support for the brppt2 board. The board is based on the i.mx6 dual-lite SoC. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-11-03imx8: output SECO-FW and ATF commit IDsAnatolij Gustschin
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617) but drop imx-mkimage commit ID reading since we now use in tree mkimage. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03mach-imx: Adding new argument for SIP call interfaceYe Li
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ, so update the interface to add new argument. Signed-off-by: Ye Li <ye.li@nxp.com> [agust: fixed imx8m-power-domain build] Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8: Add AHAB secure boot supportPeng Fan
Add function and new command "auth_cntr" for secure boot support. When booting with life cycle set to OEM closed, we need to use this function to authenticate the OS container and load kernel & FDT from OS container to their destination. Also add image authentication call when loading container images. Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not set at default. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8mm: evk: enable bd71837 pmicPeng Fan
Enable bd71837 pmic for i.MX8MM EVK board, need to set voltage for DRAM and linux suspend voltage requirement. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx: spl: implement spl_boot_mode for i.MX7/8/8MPeng Fan
It will be easy to separate SD/EMMC when booting in SPL stage, then no need to bother which device is BOOT_DEVICE_MMC1/2. Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-15 13:56:28 +0000