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2018-04-04efi_loader: exit status for efi_reset_system_initHeinrich Schuchardt
efi_reset_system_init provides the architecture or board specific initialization of the EFI subsystem. Errors should be caught and signalled by a return code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-01Merge git://git.denx.de/u-boot-dmTom Rini
2018-04-01core: ofnode: Fix translation for #size-cells == 0Mario Six
Commit 286ede6 ("drivers: core: Add translation in live tree case") made dev_get_addr always use proper bus translations for addresses read from the device tree. But this leads to problems with certain busses, e.g. I2C busses, which run into an error during translation, and hence stop working. It turns out that of_translate_address() and fdt_translate_address() stop the address translation with an error when they're asked to translate addresses for busses where #size-cells == 0 (comment from drivers/core/of_addr.c): * Note: We consider that crossing any level with #size-cells == 0 to mean * that translation is impossible (that is we are not dealing with a value * that can be mapped to a cpu physical address). This is not really specified * that way, but this is traditionally the way IBM at least do things To fix this case, we check in both the live-tree and non-live tree-case, whether the bus of the device whose address is about to be translated has size-cell size zero. If this is the case, we just read the address as a plain integer and return it, and only apply bus translations if the size-cell size if greater than zero. Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Reported-by: Martin Fuzzey <mfuzzey@parkeon.com> Fixes: 286ede6 ("drivers: core: Add translation in live tree case") Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-30Merge git://git.denx.de/u-boot-marvellTom Rini
2018-03-30Merge git://git.denx.de/u-boot-x86Tom Rini
2018-03-30Merge git://git.denx.de/u-boot-riscvTom Rini
2018-03-30arm64: a37xx: dts: enable pcie portWilson Ding
This patch enabled PCIe port on both devel-board and espressobin board. Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Wilson Ding <dingwei@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: populate pcie memory regionWilson Ding
This patch added a new region of 32MiB AT 0xe800.0000 to Armada37x0's memory map. This region is supposed to be mapped in MMU in order to enable the access to the PCI I/O or MEM resources. Signed-off-by: Wilson Ding <dingwei@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38724 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Victor Gu <xigu@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30Revert "arm64: a37xx: dts: Add pin control nodes to DT"Ken Ma
The commit "arm64: mvebu: Add pinctrl nodes for Armada 3700" has added new pinctrl nodes. This reverts commit f7cab0f95b05ec6a66fe4796b9ad44406d0cc864. Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: Correct mpp definitionsKen Ma
This patch corrects below mpp definitions for armada 3720 DB board and ESPRESSOBin board: - "smi" pins group is added and "smi" function is set for eth0; - Now pcie pins are used as gpio to implement PCIe function in hardware, so "pcie" group function is changed to "gpio". Reviewed-on: http://vgitil04.il.marvell.com:8080/43287 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: Fix the number of GPIO on south bridgeKen Ma
The number of pins in South Bridge is 30 and not 29. There is a fix for the driver for the pinctrl, but a fix is also need at device tree level for the GPIO. Reviewed-on: http://vgitil04.il.marvell.com:8080/43286 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: Add additional pinctrl definitionKen Ma
Add mmc pins, pcie pins and sdio pins definition and do these pins' configuration for DB board and espressobin board; Add uart2 pins configuration for DB board. Reviewed-on: http://vgitil04.il.marvell.com:8080/40914 Reviewed-by: Wilson Ding <dingwei@marvell.com> Tested-by: Wilson Ding <dingwei@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: Add pinctrl configuration for ESPRESSOBin boardKen Ma
Reviewed-on: http://vgitil04.il.marvell.com:8080/40913 Reviewed-by: Wilson Ding <dingwei@marvell.com> Tested-by: Wilson Ding <dingwei@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: add gpio head file includingKen Ma
Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30x86: zImage: Pass working device tree data to the kernelIvan Gorinov
On x86 platforms, U-Boot does not pass Device Tree data to the kernel. This prevents the kernel from using FDT loaded by U-Boot. Read the working FDT address from the "fdtaddr" environment variable and add a copy of the FDT data to the kernel setup_data list. Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30riscv: ae250: Support DT provided by the board at runtimeRick Chen
Enable CONFIG_OF_BOAD to support delivery dtb to u-boot at run time instead of embedded. There are two methods to delivery dtb. 1 Pass from loader: When u-boot boot from RAM, gdb or loader can pass dtb via a2 to u-boot dynamically. Of course gdb or loader shall be in charge of dtb delivery. 2 Configure CONFIG_SYS_FDT_BASE: It can be configured as RAM or ROM base statically, no mater u-boot boot from RAM or ROM. If it was configured as ROM base, dtb can be burned into ROM(spi flash) by spi driver. Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is useless in nx25-ae250 configuration. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30Drop CONFIG_FTSDC010_BASERick Chen
After drop non-dm code of ftsdc010, the sd register base definition can be droppped now. So CONFIG_FTSDC010_BASE and CONFIG_FTSDC010_BASE_LIST both can be removed from config_whitelist.txt Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30nds32: dts: AG101P support sd High-Speed modeRick Chen
Enable High-Speed mode with cap-sd-highspeed in dts Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: dts: AE250 support sd High-Speed modeRick Chen
Enable High-Speed mode with cap-sd-highspeed in dts. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: bootm: Remove ATAGSRick Chen
ATAGS is not supported and will be replaced by DT in riscv-linux. So can be removed now. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: bootm: Support to boot riscv-linuxRick Chen
riscv-linux should use BBL (Berkeley bootloader) for loading the Linux kernel. U-Boot can play as FSBL(first stage bootloader) to boot BBL and riscv-linux. In BBL's init_first_hart(), it will pass dtb with a1. So implement bootm to pass arguments to BBL correctly. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix static const char * array declarationsRick Chen
It is reported by checkpatch.pl WARNING: static const char * array should probably be static const char * const Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix missing a blank line after declarationsRick Chen
It is reported by checkpatch.pl WARNING: Missing a blank line after declarations. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix alignment should match open parenthesisRick Chen
It is reported by checkpatch.pl. CHECK: Alignment should match open parenthesis Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix use of volatileRick Chen
It is reported by checkpatch.pl WARNING: Use of volatile is usually wrong: see Documentation/process/volatile-considered-harmful.rst Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix Macro argument reuseRick Chen
It is CHECK reported by checkpatch.pl CHECK: Macro argument reuse 'PTE' - possible side-effects? Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-28rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3188.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3036.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3399: add support for I2C[123467]Philipp Tomsich
This adds support for the (to date unsupported) I2C controllers 1~4 and 6~7 (i.e. now all controllers except I2C5, which is not accessible on the RK3399-Q7, are supported by pinctrl). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3399: fix GPIO2B1 and GPIO2B2 shift valuePhilipp Tomsich
The shift values for GPIO2B1 and GPIO2B2 had in fact referred to GPIO2B0 and GPIO2B1, respectively. This substitutes the correct values. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-25Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx changes for v2018.05 - Fix mkimage recognition - Update all my fragments ZynqMP: - Use clk driver - Support loading elfs in el1 - Various DTS and defconfig changes - Enable newer pmufw versions - Support more clocks - Remove ep108 - Secure image support - Fix memtest setup Zynq: - Enabling watchdog driver - Support more clocks - defconfig changes fpga: - Simplify error path net: - GMII case update
2018-03-23Merge git://git.denx.de/u-boot-arcTom Rini
Alexey: 1. Significantly rework cache-related functionality. In particular that fixes coherency problems in some corner-cases, allows us to enable and disable caches in run-time and still have properly running system, finally support execution from real flash (before we used to run from DDR from the very beginning). 2. Remove string routines implemented in assembly. That allows us to build and run U-Boot on wide range of ARC cores with different configurations. I.e. whatever tuning is used on GCC's command-line we'll get code for desired flavor of ARC. Otherwise for each and every corner-case we would need to add ifdefs in assembly code to accommodate missing instructions etc. 3. Get use of GCC's garbage collector which helps to slim-down resulting image quite a bit. 4. Also now we may disable U-Boot self-relocation for ARC if needed either by platform or for debugging purposes.
2018-03-23ARC: bootm: Refactor GO and PREP subcommands implementationEugeniy Paltsev
Refactor GO and PREP subcommands implementation for a simpler override in the boards platform code. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-23arm64: zynqmp: Add support for verifying secure imagesSiva Durga Prasad Paladugu
This patch adds new command "zynqmp" to handle zynqmp specific commands like "zynqmp secure". This secure command is used for verifying zynqmp specific secure images. The secure image can either be authenticated or encrypted or both encrypted and authenticated. The secure image is prepared using bootgen and will be in xilinx specific BOOT.BIN format. The optional key can be used for decryption of encrypted image if user key was specified while creation BOOT.BIN. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Remove ep108 boardMichal Simek
ZynqMP Emulation board is no longer tested and there is no reason to keep maintaining it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm: zynq: Enable cadence driver on zc706Michal Simek
Enable watchdog with reset-on-timeout feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm: zynq: Wire watchdog internalsMichal Simek
Watchdog is only enabled in full u-boot. Adoption for SPL should be also done because that's the right place where watchdog should be enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Enable newer pmufw versionsMichal Simek
As of now newer pmufw is keeping old interfaces. That's why permit u-boot to run on newer version. Recommended version will be setup later. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Convert board to use zynqmp-clk driverMichal Simek
Use zynqmp clock driver instead of fixed clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-22Merge git://git.denx.de/u-boot-netTom Rini
2018-03-22ARM: dts: da850-lcdk: Sync from Linux 4.16Lokesh Vutla
Sync dts from Linux 4.16 and also add u-boot specific dtsi for OMAPl138 board. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22davinci: Enable DDR_INIT for DA8XXLokesh Vutla
Commit 6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig") converted SOC_DA8XX to Kconfig but missed enabling DDR_INIT for SOC_DA8XX, which broke OMAPL138 to boot. Commit 2e87980580d0 ("davinci: Fix omapl138_lcdk builds") disabled DDR_INIT for all DA850 SoCs. This failed all DA850 boards to boot as ddr is not being initialized. Enable SYS_DA850_DDR_INIT for DA8XX so that all DA850 and OMAPL138 will have ddr initialized Fixes: 2e87980580d0 ("davinci: Fix omapl138_lcdk builds") Fixes: 6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig") Reported-by: Sekhar Nori <nsekhar@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: David Lechner <david@lechnology.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22armv8: layerscape: csu: enable ns access to PFE registersCalvin Johnson
Enable all types of non-secure access to PFE block registers. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECCCalvin Johnson
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces to bufferable. 2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces. 3. Disable ECC detection for PFE. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structureCalvin Johnson
SoC specific PFE macros are defined and structure ccsr_scfg is updated with members defined for PFE. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22armv8: fsl-layerscape: Add support of GPIO structurePrabhakar Kushwaha
Layerscape Gen2 SoC supports GPIO registers to control GPIO signals. Adding support of GPIO structure to access GPIO registers. Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-21mips: bmips: add ar-5315 usb supportÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21mips: bmips: add support for bcm6318 usbÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21mips: bmips: add vr-3032u usb supportÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21mips: bmips: add support for bcm63268 usbÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
generated by cgit (git 2.34.1) at 2024-12-27 09:14:30 +0000