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2016-08-05armv8: mmu: Detect page table overflow in emergency pt creationAlexander Graf
We create 2 sets of page tables: One for normal operation, one for emergency (used while modifying the former). Because the page tables grow dynamically, we have code that checks for overflow. Unfortunately we didn't adjust the available space variable while creating the emergency tables, so potentially someone might run into an overflow there (not seen in real world yet though!). Fix it by properly adjusting the size as well as the base offset in emergency page table creation. Reported-by: York Sun <york.sun@nxp.com> Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-05omap3: Drop omap3_evm_quick_* targetsTom Rini
These config targets were added well before the Kconfig migration began as a way to demonstrate how to make these platforms work with cut down features. At this point in time they no longer serve a good purpose so remove them. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-05omap3, omap4: Enable USE_TINY_PRINTF for allTom Rini
In the case of omap3 we have a number of platforms that are close to exceeding SRAM limits, depending on compiler. Move to USE_TINY_PRINTF to give them more room. OMAP4 will soon enough be in a similar place, so enable that now. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-05omap3: Move to select SUPPORT_SPL for allTom Rini
In reality all omap3 platforms support SPL so move the select for this up a level. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-05treewide: move CONFIG_PHYS_64BIT to KconfigMasahiro Yamada
We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so that it is always available to the build system. Otherwise we can run into cases where we have inconsistent sizes of certain attributes. Ravi Babu reported offset mismatch of struct dwc3 across files since commit 95ebc253e6d4 ("types.h: move and redefine resource_size_t"). Since the commit, resource_addr_t points to phys_addr_t, whose size is dependent on CONFIG_PHYS_64BIT for ARM architecture. I tried my best to use "select" where possible (for example, ARMv8 architecture) because I think this kind of option is generally user- unconfigurable. However, I see some of PowerPC boards have 36BIT defconfigs as well as 32BIT ones. I moved CONFIG_PHYS_64BIT to the defconfigs for such boards. CONFIG_36BIT is no longer referenced, so all of the defines were removed from CONFIG_SYS_EXTRA_OPTIONS. Fixes: 95ebc253e6d4 ("types.h: move and redefine resource_size_t") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Ravi Babu <ravibabu@ti.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-05ARM: Rework and correct barrier definitionsTom Rini
As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-05arc: Rename AXS101 board to more generic AXS10xAlexey Brodkin
As of now we have 2 flavors of ARC SDP boards: 1) AXS101 - with ARC770 in ASIC 2) AXS103 - with ARC HS38 in FPGA Both options share exactly the same base-board and only differ with CPU-tiles in use. That means all peripherals are the same (they are implemented in FPGA on the base-board) and so generic board could be used for both. While at it: * Recreated defconfigs with savedefconfig * In include/configs/axs10x.h numerical sizes replaced with defines from linux/sizes.h for better readability. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-05arc: Rename ARCangel4 board to nSIMAlexey Brodkin
ARCangel was one of the main development boards back in the day but now it's gone and replaced by other boards like ARC SDP. But we also used to have simulation platform very similar to ARCangel4 in terms of CPU settings as well as basic IO like UART. Even though ARCangel4 is long gone now we have a replacement for simulation which is a plain or stand-alone nSIM and Free nSIM. Note Free nSIM is available for download here: https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi And while at it: * Finally switch hex numerical values in nsim.h to defines from include/linux/sizes.h * Add defconfigs with ARC HS38 cores * Recreated all defconfigs with savedefconfig Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05arc: No need in sections defined in sources with newer toolsAlexey Brodkin
Starting from arc-2016.03 GNU tools linker properly works with symbols defined in linker script and so external declarations are no longer required, dump them. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05arc: Update exception & interrupt handling for ARCv2Alexey Brodkin
Initially IVT for ARCv2 was simply copypasted from ARCompact with some selected fixes so basic stuff works. Now we update it with more ARCv2 specific vectors like * Software Interrupt * Division by zero * Data cache consistency error * Misaligned access Also normal interrupts are now implemented properly and extened to all possible 240 items. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05arc: Add debug messages during relocation fixupsAlexey Brodkin
This might be useful to make sure relocation fixups really happen. And since this info gets printed only in DEBUG build it doesn't really hurt normal execution. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-02Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-08-02ARMv8/fsl-ppa: Consolidate PPA image stored-media flag for XIPHou Zhiqiang
The PPA binary may be stored on QSPI flash instead of NOR. So, deprecated CONFIG_SYS_LS_PPA_FW_IN_NOR in favour of CONFIG_SYS_LS_PPA_FW_IN_XIP to prevent fragmentation of code by addition of a new QSPI specific flag. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02arm/PSCI: Add support for creating ARMv7 PSCI version 1.0 DT nodeHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02arm/PSCI: Fixed the backward compatiblity issueHou Zhiqiang
Appended the compatible strings of old version PSCI to the latest version supported. And there are some psci functions' property must be added to DT only for psci version 0.1, including cpu_on, cpu_off, cpu_suspend, migrate. Note, ARMv8 Secure Firmware Framework doesn't support PSCI ver 0.1. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02arm/PSCI: Removed unused codeHou Zhiqiang
Identify the PSCI node only by its name, so removed the code finding it by compatible string. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02powerpc/mpc85xx: Update erratum workaround for A006379York Sun
Update erratum workaround for A006379 to set register CPCHDBCR0 with value 0x001e0000, replacing the old value 0x003c0000. Signed-off-by: York Sun <york.sun@nxp.com> Reported-by: Dave Liu <dave.liu@nxp.com>
2016-08-02Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini
2016-08-02ARM64: zynqmp: Do not enable DM_MMC by defaultMichal Simek
The patch: "dm: mmc: zynq: Convert zynq to use driver model for MMC" (sha1: 329a449f2c289b4de8f892fca1d9379ce5fd81b8) added dependency on enabling some MMC options by default. There are minimal ZynqMP configurations which require only minimal configurations to be enabled to keep u-boot size as lower as possible. Move options to defconfig instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-01ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodesMichal Simek
Serial driver is getting clk information via DT that's why also clk node needs to have this flag. Different behavior was introduced by: "dm: Use dm_scan_fdt_dev() directly where possible" (sha1: 911954859d6dece49c3e4835faea004cfe392506) where simple-bus driver starts to call dm_scan_fdt_dev() which has additional logic around pre_reloc_only parameter which exclude clk nodes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-31libfdt: Introduce new ARCH_FIXUP_FDT optionMichal Simek
Add new Kconfig option to disable arch_fixup_fdt() calls for cases where U-Boot shouldn't update memory setup in DTB file. One example of usage of this option is to boot OS with different memory setup than U-Boot use. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31Merge git://git.denx.de/u-boot-rockchipTom Rini
2016-07-31sunxi: Re-enable h3 emac supportHans de Goede
With the recent bug fixes for the sun8i_emac driver all known issues are resolved, so we can re-enable the driver. While at it, also enable the emac on the Orange Pi One. Cc: Chen-Yu Tsai <wens@csie.org> Cc: Corentin LABBE <clabbe.montjoie@gmail.com> Cc: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Jagan Teki <jteki@openedev.com>
2016-07-31rockchip: add support for rk3288 PopMetal boardjk.kernel@gmail.com
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and Gigabit Ethernet. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31rockchip: add basic support for fennec-rk3288 boardjk.kernel@gmail.com
Fennec is a RK3288-based development board with 2 USB ports, HDMI, micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access to display pins, I2C, SPI, UART and GPIOs. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31rockchip: rk3288: move evb board to rockchip folderjk.kernel@gmail.com
The 'evb-rk3288' is not a vendor name, change it to 'rockchip' which is the real vendor name. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31Revert "rockchip: Move the MMC setup check earlier"jk.kernel@gmail.com
Boot Rom wouldn't initialize sdmmc while booting from eMMC. We need to setup sdmmc gpio, otherwise we will hit an error below: =>mmc info blk_get_device: if_type=6, devnum=0: dwmmc@ff0c0000.blk, 6, 0 uclass_find_device_by_seq: 0 -1 uclass_find_device_by_seq: 0 0 - -1 -1 - -1 0 - found uclass_find_device_by_seq: 0 1 - -1 -1 - -1 0 - not found fdtdec_get_int_array: interrupts get_prop_check_min_len: interrupts Buswidth = 1, clock: 0 Buswidth = 1, clock: 400000 Sending CMD0 dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy This reverts commit 6efeeea79c880d3dd262e0dca9da2687f0ab68c9. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-07-31rockchip: add a dummy byte for the sdram-channel propertyjk.kernel@gmail.com
Add an extra byte so that this data is not byteswapped. Signed-off-by: Ziyuan Xu <jk.kernel@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2016-07-31configs: rockchip: remove no use MACROKever Yang
The CONFIG_ROCKCHIP_COMMON and CONFIG_SPL_ROCKCHIP_COMMON are no use now, remove them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-30m68k: code reformatting for all start.S filesAngelo Dureghello
This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-07-30ARM: dts: am57xx-idk-common: Enable support for QSPIVignesh R
AM571x and AM572x IDK have a spansion s25fl256s QSPI flash on the board connected to TI QSPI over CS0. Hence, add QSPI and flash slave DT nodes. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30ARM: dts: dra7xx: Update spi-max-frequency for QSPIVignesh R
According to AM572x DM SPRS953A, QSPI max bus speed is 76.8MHz. Therefore update the spi-max-frequency value of QSPI node for DRA74 and DRA72 evm. This increase flash read speed by ~2MB/s. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30ARM: dra7xx: Change DPLL_PER_HS13 divider valueLokesh Vutla
According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz clock, so that driver can use the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-28Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2016-07-28colibri_imx7: add Colibri iMX7S/iMX7D module supportStefan Agner
This commit adds support for the Toradex Computer on Modules Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence can be easily supported by one board. The board code detects RAM size at runtime which is one of the differences between the two boards. The board also uses the UART's in DTE mode, hence making use of the new DTE support via serial DM. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-28mx7dsabresd_secure_defconfig: Use CONFIG_ARMV7_BOOT_SEC_DEFAULTFabio Estevam
There is no need for introducing MX7_SEC, as there is the CONFIG_ARMV7_BOOT_SEC_DEFAULT option for this purpose. Switch to CONFIG_ARMV7_BOOT_SEC_DEFAULT and get rid of MX7_SEC. Tested by booting a 4.1.15 NXP kernel with mx7dsabresd_secure_defconfig target. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-27Add a power domain framework/uclassStephen Warren
Many SoCs allow power to be applied to or removed from portions of the SoC (power domains). This may be used to save power. This API provides the means to control such power management hardware. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-27dm: mmc: zynq: Convert zynq to use driver model for MMCSimon Glass
Move zynq to the latest driver model support by enabling CONFIG_DM_MMC, CONFIG_DM_MMC_OPS and CONFIG_BLK. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27dm: zynq: usb: Convert to CONFIG_DM_USBSimon Glass
Convert zynq USB to driver model. Note this is tested on zynq-zybo only. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27zynq: Increase the early malloc() sizeSimon Glass
This is needed to support driver-model conversion of USB and block devices. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27dm: Use dm_scan_fdt_dev() directly where possibleSimon Glass
Quite a few places have a bind() method which just calls dm_scan_fdt_dev(). We may as well call dm_scan_fdt_dev() directly. Update the code to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()Simon Glass
This new function is more convenient for callers, and handles pre-relocation situations automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-26Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2016-07-26Merge git://git.denx.de/u-boot-mpc86xxTom Rini
2016-07-26Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-07-26sunxi: Add EMAC ethernet0 alias for H3 dtsiChen-Yu Tsai
The sunxi ethernet address generation code looks for ethernet[0-3] aliases to find ethernet controllers to generate MAC addresses for. Without a valid address, the driver fails to register. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26sunxi: Add defconfig and dts file for the Orange Pi PC Plus SBCHans de Goede
There is a new Orange Pi PC *Plus* version available now, this is an extended version of the regular Orange Pi PC with sdio wifi and an eMMC. The upstream kernel devs have decided that they want a separate dts for the PC Plus rather then sharing a single dts between the regular PC and the PC Plus. So add a new orangepi_pc_plus_defconfig to match. The added dts file matches the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26armv8: fsl-layerscape: mmu: Fix enabling MMUYork Sun
MMU bit in SCTLR needs to be set explicitly after tables are created. It isn't an issue for EL3 becuase this bit is already set by early MMU setup. But for other exception levels this bit was not set. Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-26ARMv7: PSCI: ls102xa: move secure text section into OCRAMHongbo Zhang
LS1021 offers two secure OCRAM blocks for trustzone. This patch moves all the secure text sections into the OCRAM. Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com> Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implementionHongbo Zhang
This patch implements PSCI functions for ls102xa SoC following PSCI v1.0, they are as the list: psci_version, psci_features, psci_cpu_suspend, psci_affinity_info, psci_system_reset, psci_system_off. Tested on LS1021aQDS, LS1021aTWR. Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com> Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>