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2018-12-07gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.hPatrice Chotard
To allow access to this define by other driver, move it into gpio.h Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07gpio: stm32f7: Add gpio bank holes managementPatrice Chotard
In some STM32 SoC packages, GPIO bank has not always 16 gpios. Several cases can occur, gpio hole can be located at the beginning, middle or end of the gpio bank or a combination of these 3 configurations. For that, gpio bindings offer the gpio-ranges DT property which described the gpio bank mapping. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07serial: bcm6858: remove driver and switch to bcm6345Álvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}Álvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07arm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMCFelix Brack
This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001 board. It depends on Patrice Chotard's patch 'power: regulator: denied disable on always-on regulator' which prevents power cycling the vmmc supply. Without this patch the board will not boot as vmmc is unfortunately used by other board components, not just eMMC and micro SD card. Furthermore my patch 'dts: am335x-pdu001: Fix polarity of card detection input' is required to boot from external micro SD card. Without this patch no SD card will be detected and hence booting will fail. Signed-off-by: Felix Brack <fb@ltec.ch> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07dts: am335x-pdu001: Fix polarity of card detection inputFelix Brack
When a micro SD card is inserted in the PDU001 card cage, the card detection switch is opened and the corresponding GPIO input is driven by a pull-up. Hence change the active level of the card detection input from low to high. Signed-off-by: Felix Brack <fb@ltec.ch>
2018-12-07test: dma: add dma-uclass testGrygorii Strashko
Add a sandbox DMA driver implementation (provider) and corresponding DM test. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07ARM: at91: lds: add test for SPL binary size and bss sizeEugen.Hristev@microchip.com
Add test for the SPL binary size and the bss section size. This will throw an error at build time if the SPL sections do not fit in the designated RAM area, thus avoiding oversizing the SPL. Based on original work by Wenyou Yang. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-12-06pinctrl: stm32: make pinctrl use hwspinlockBenjamin Gaignard
Protect configuration registers with a hardware spinlock. If a hwspinlock is defined in the device-tree node used it to be sure that none of the others processors on the SoC could change the configuration at the same time. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06hwspinlock: add stm32 hardware spinlock supportBenjamin Gaignard
Implement hardware spinlock support for STM32MP1. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06dm: Add Hardware Spinlock classBenjamin Gaignard
This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06rockchip: rk3399: Add Ficus EE board supportManivannan Sadhasivam
Add board support for Ficus EE board from Vamrs. This board utilizes common Rock960 family support. Following peripherals are tested and known to work: * Gigabit Ethernet * USB 2.0 * MMC Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> [Reworked based on common Rock960 family support] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06rockchip: rk3399: Add Rock960 CE board supportManivannan Sadhasivam
Add board support for Rock960 CE board from Vamrs. This board utilizes common Rock960 family support. Following peripherals are tested and known to work: * USB 2.0 * MMC This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which is being used on the board. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06rockchip: rk3399: Add common Rock960 family from VamrsManivannan Sadhasivam
Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs. It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition) 96Boards. Below are some of the key differences between both Rock960 and Ficus boards: 1. Different host enable GPIO for USB 2. Different power and reset GPIO for PCI-E 3. No Ethernet port on Rock960 The common board support will be utilized by both boards. The device tree has been organized in such a way that only the properties which differ between both boards are placed in the board specific dts and the reset of the nodes are placed in common dtsi file. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [Added instructions for SD card boot] Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2018-12-06arm: dts: rockchip: add some common pin-settings to rk3399Randy Li
Those pins would be used by many boards. Commit grabbed from Linux: commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f Author: Randy Li <ayaka@soulik.info> Date: Thu Jun 21 21:32:10 2018 +0800 arm64: dts: rockchip: add some common pin-settings to rk3399 Those pins would be used by many boards. Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-05Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dmTom Rini
Minor sandbox enhancements / fixes tpm improvements to clear up v1/v2 support buildman toolchain fixes New serial options to set/get config
2018-12-05Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
- Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05x86: acpi: Generate SPCR tableAndy Shevchenko
Microsoft specifies a SPCR (Serial Port Console Redirection Table) [1]. Let's provide it in U-Boot. [1]: https://docs.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05x86: acpi: Add SPCR table descriptionAndy Shevchenko
Add SPCR table description as it provided in Linux kernel. Port subtype for ACPI_DBG2_SERIAL_PORT is used as an interface type in SPCR. Thus, provide a set of definitions to be utilized later. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-05dm: core: add functions to get/remap I/O addresses by nameÁlvaro Fernández Rojas
This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property. This is needed in bmips dma/eth patch series, but can also be used on many other drivers. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05sandbox: Use 'extras' to specify 'head' filesSimon Glass
At present sandbox has a start.o in the 'start' target but also includes it in the normal target list. This is not how this is normally handled. It is needed because sandbox does not include the u-boot-init variable in its link rule. Update the rule and move start.o from the normal target list to the 'extras' list. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05sandbox: Zero the ram buffer on startupSimon Glass
At present the RAM buffer is not inited unless it is read from a file, likely produced by an earlier phase of U-Boot. This causes valgrind warnings whenever the RAM buffer is used. Correct this by initing it if needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05sandbox: Check the filename in jump_to_image_no_args()Simon Glass
If the filename is NULL this function currently crashes. Update it to fail gracefully. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05sandbox: Fix up the debug message for the image filenameSimon Glass
This currently prints out the wrong filename. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05riscv: ax25-ae350: Pass dtb address to u-boot with a1 registerRick Chen
ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE to boot from ram which allow the board to override the fdt address originally. But after this patch riscv: save hart ID and device tree passed by prior boot stage It provide prior_stage_fdt_address which offer a temporary memory address to keep the dtb address passing from loader(gdb) to u-boot with a1. So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and can be removed. And it also somehow may corrupted BBL if it was be arranged in CONFIG_SYS_SDRAM_BASE. In board_fdt_blob_setup() When boting from ram: prior_stage_fdt_address will be use to reserved dtb temporarily. When booting from ROM: dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base. Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM) which is provided by HW. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
2018-12-05riscv: Add kconfig option to run U-Boot in S-modeAnup Patel
This patch adds kconfig option RISCV_SMODE to run U-Boot in S-mode. When this opition is enabled we use s<xyz> CSRs instead of m<xyz> CSRs. It is important to note that there is no equivalent S-mode CSR for misa and mhartid CSRs so we expect M-mode runtime firmware (BBL or equivalent) to emulate misa and mhartid CSR read. In-future, we will have more patches to avoid accessing misa and mhartid CSRs from S-mode. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-04ARM: rmobile: Set environment variable containing CPU typeMarek Vasut
Set environment variable 'platform' containing the CPU type. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04ARM: rmobile: Enable MMC extensionsMarek Vasut
Enable extended MMC commands and GPT partition table support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Sync Gen3 DTs with Linux 4.19.6Marek Vasut
Synchronize DTs with mainline Linux 4.19.6 , commit 96db90800c06d3fe3fa08eb6222fe201286bb778 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Sync Gen2 DTs with Linux 4.19.6Marek Vasut
Synchronize DTs with mainline Linux 4.19.6 , commit 96db90800c06d3fe3fa08eb6222fe201286bb778 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract i2c6 on M2W PorterMarek Vasut
The i2c6 node is missing in mainline Linux thus far, pull it into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract SCIF2 node on E3 EbisuMarek Vasut
The SCIF2 node is not in Linux 4.17 DTs on E3, pull it into U-Boot specific DT extras until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract SDHI nodes on E3 EbisuMarek Vasut
The SDHI nodes are not in Linux 4.17 DTs in E3, pull them into U-Boot specific DT extras until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract SDHI extras on H3, M3W, M3N Salvator-XMarek Vasut
The SDHI nodes are missing features supported in upstream U-Boot, like mode support properties. Pull the extras into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract SDHI extras on H3 and M3W ULCBMarek Vasut
The SDHI nodes are missing features supported in upstream U-Boot, like mode support properties. Pull the extras into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract CPLD node on H3 and M3W ULCBMarek Vasut
The CPLD node is missing in Linux 4.17 DTs on H3/M3W ULCB, pull the node into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract AVB node extras on V3M EagleMarek Vasut
The AVB node is not complete in Linux 4.17 DTs on V3M Eagle, pull the AVB node extras into U-Boot specific DT until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract SDHI nodes on M3NMarek Vasut
The SDHI nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot specific DT extras until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract USB nodes on M3NMarek Vasut
The USB nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot specific DT extras until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Extract RPC node to u-boot specific DTMarek Vasut
The RPC DT bindings are still work in progress. Extract the RPC DT node from the DT to allow easier update and so it can be replaced once the DT bindings are stable. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-04ARM: dts: rmobile: Add soc label to Gen3Marek Vasut
Add label to the /soc node, so it can be referenced from the U-Boot DTs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-12-03Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support
2018-12-03Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2018-12-03 This release is fully packed with lots of glorious improvements in UEFI land again! - Make PE images more standards compliant - Improve sandbox support - Improve correctness - Fix RISC-V execution on virt model - Honor board defined top of ram (fixes a few boards) - Imply DM USB access when distro boot is available - Code cleanups
2018-12-03Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- MMC fixes for R-Car Gen3
2018-12-03board: MCR3000: migrate to DM_SERIALChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: use new DM watchdogChristophe Leroy
This patch switches MCR3000 board to the new DM watchdog. The change in u-boot.lds is because MCR3000.o grows a bit with this patch and doesn't fit anymore below env_offset on some versions of GCC. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROLChristophe Leroy
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03powerpc, mpc8xx: clear top of stackChristophe Leroy
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
2018-12-03arm: baltos: move the board to CONFIG_BLKYegor Yefremov
Use DM for both MMC and USB subsystems and use dedicated DTS for U-Boot configuration. Disable SPL support for GPIO and remove EVMSK leftover for DDR power control via GPIO. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03Merge tag 'u-boot-amlogic-20181203' of git://git.denx.de/u-boot-amlogicTom Rini
ARM: meson: Add regmap support for clock driver and sync DT with 4.19
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