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2018-09-26arm64: zynqmp: Return pmufw version for zynqmp_pmufw_version()Siva Durga Prasad Paladugu
Modify the zynqmp_pmufw_version() routine to return PMUFW version so that it can be reused wherever required. Get PMUFW version from PMU only once at bootup and later just return stored value. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26arm64: zynqmp: Move PM version related macros to .hSiva Durga Prasad Paladugu
This patch moves the PM version related macros to .h file so that they can be reused in other files. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26arm64: zynqmp: Handle CONFIG_BOARD_LATE_INIT via KconfigMichal Simek
Disable BOARD_LATE_INIT via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-23mips: mt7628a.dtsi: Add SPI clock-frequency propertyStefan Roese
This patch adds the clock-frequency property to the SPI controller DT node. It will be used by the SPI driver to calculate the baud rate. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23mips: mt76xx: Add sysreset supportStefan Roese
This patch adds the necessary sysreset DT node and enables the required drivers via Kconfig. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23mips: Add Gardena Smart-Gateway board supportStefan Roese
The Gardena Smart-Gateway boards have a MT7688 SoC with 128 MiB of RAM and 8 MiB of flash (SPI NOR) and additional 128MiB SPI NAND storage. This patch also includes 2 targets. One is the target that can be programmed into the SPI NOR flash and a 2nd target "xxx-ram" is added to support loading and booting via an already running U-Boot version. This allows easy development and testing without the need to flash the image each time. Signed-off-by: Stefan Roese <sr@denx.de> [fixed and regenerated defconfig files] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23mips: Add LinkIt Smart 7688 supportStefan Roese
The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM and 32 MiB of flash (SPI NOR). This patch also includes 2 targets. One is the target that can be programmed into the SPI NOR flash and a 2nd target "xxx-ram" is added to support loading and booting via an already running U-Boot version. This allows easy development and testing without the need to flash the image each time. Signed-off-by: Stefan Roese <sr@denx.de> [fixed and regenerated defconfig files] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22mips: Add basic MediaTek MT7620/88 supportStefan Roese
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of the code is copied from the MediaTek GitHub repository: https://github.com/MediaTek-Labs/linkit-smart-uboot.git The mt7628a.dtsi file is imported from Linux v4.17. Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway both based on the MT7688 will be added in further patches. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22mips: Add arch/mips/include/asm/atomic.hStefan Roese
This is needed for the UBIFS support. The file is a copy of arch/xtensa/include/asm/atomic.h Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODEDaniel Schwierzeck
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT (or CONF_CM_CACHABLE_COW when a CM is available). There is no need to make this configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: make index base address configurableDaniel Schwierzeck
The index base address used for the cache initialisation is currently hard-coded to CKSEG0. Make this value configurable if a MIPS system needs to have a different address (e.g. in SRAM or ScratchPad RAM). Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: optimise changing of k0 CCA modeDaniel Schwierzeck
Changing the Cache Coherency Algorithm (CCA) for kernel mode requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1 before changing the CCA mode. Jump back to KSEG0 afterwards. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: reimplement dcache_[status, enable, disable]Daniel Schwierzeck
Those functions are not needed during cache init and can be implemented in C. Only support the safe disabling of caches when this is required for booting an OS. Reenabling caches is much harder to implement if an optional coherency manager must be supported. As there is no real use-case anyway, dcache_enable is implemented with an error message. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: start.S: make boot config at offset 0x10 configurableDaniel Schwierzeck
Some MIPS systems store some board-specific boot configuration in the U-Boot binary at offset 0x10. This is used by Malta boards and by Lantiq/Intel SoC's when booting from parallel NOR flash. Convert the hard-coded values to Kconfig options to remove such board-specific stuff out of the generic start.S code. This also deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22dt: bcm6838: add pinctrlPhilippe Reynes
Add pinctrl node and related syscon node for broadcom bcm6838 SoC. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-19Merge git://git.denx.de/u-boot-imxTom Rini
- changes in pico-* boards - fix imx6ull pinmux
2018-09-19Merge git://git.denx.de/u-boot-marvellTom Rini
- Multiples updates to the turris boards / platform - Changes / enhancements to the Marvell PHY drivers, mainly to support the turris platform - Many fixes and enhancements to the pxa3xx NAND driver - Fixes for the UART boot mode in kwboot - Misc minor changes to other 32bit and 64bit boards
2018-09-19board: turris_mox: Fixup U-Boot's device tree if PCIe connectedMarek Behún
If PCIe Mox module is connected we want to have PCIe node enabled in U-Boot's device tree. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19dts: mvebu: mcbin: drop redundant SD slot nodeBaruch Siach
Commit 61dccf73d302 (dts: mvebu: a80x0: Enable SD/eMMC interfaces) added a redundant DT node for SD card slot. Drop it. Cc: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19arch/arm/dts: Update Turris Mox device treeMarek Behún
Remove smi_pins definition since it is already in armada-37xx.dtsi. Add assigned-clocks definitions to spi0. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19ARM: mach-mvebu: handle fall-back to UART bootChris Packham
The bootROM in the Armada-38x (and similar) SoC has two modes for UART boot. The first is when the normal boot media is blank (or otherwise missing the kwb header). The second is when the boot sequence has been interrupted with the magic byte sequence on the UART lines. In the first mode the bootROM routine and error code register will indicate that there was an error booting from the configured media in bits 7:0. In the second mode there is no error to indicate but the boot source is provided via bits 31:28. Handle both situations so that kwboot can be used for both boot strapping a blank board and for intercepting a regular boot sequence. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19Revert "arm: mvebu: fix boot from UART when in fallback mode"Chris Packham
This reverts commit e83e2b390038c9075642cb243a6292241beb8d73. This prevents kwboot from overriding the hardware strapped boot source. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19arm64: mvebu: armada-8k: support environment in SD/eMMCBaruch Siach
Detect the SD/eMMC boot device at run-time. Load the environment from the boot deice, as well as save to it. Leave the environment offset the same as in the SPI flash. Make SD/eMMC 0 the default environment device when the boot device is not detected. Cc: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-18Merge git://git.denx.de/u-boot-dmTom Rini
- MPC83xx device tree additions (CPU and RAM) - Fix sandbox build error - Sync bitrev with Linux - Various ofnode/DT improvements
2018-09-18Merge branch 'master' of git://git.denx.de/u-boot into masterStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-09-18misc: Add MPC83xx serdes driverMario Six
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18cpu: Add MPC83xx CPU driverMario Six
Add a CPU driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18test: Add tests for CPU uclassMario Six
Add a sandbox CPU driver, and some tests for the CPU uclass. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18timer: Add MPC83xx timer driverMario Six
Add a timer driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18clk: Add MPC83xx clock driverMario Six
Add a clock driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18mpc83xx: Add sysreset driverMario Six
Add a sysreset driver for the MPC83xx platform. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18powerpc: Add read*_*/write*_* macrosMario Six
Define the read*_*/write*_* macros for the PowerPC platform to be able to use the macros in wait_bit.h. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18ram: Add driver for MPC83xxMario Six
Add a RAM driver for the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18sandbox: Enable bitrev library buildBin Meng
Imply CONFIG_BITREVERSE for Sandbox. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18sandbox: Build with -fPICAndy Shevchenko
Sandbox is not a real bootloader and it does require a position independent code to be supported. Thus, build it with -fPIC explicitly. Fixes: 16940f720f9b ("Makefile: Don't generate position independent code") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reported-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2018-09-17Merge git://git.denx.de/u-boot-x86Tom Rini
2018-09-17x86: cpu: add docstring to scu_ipc_command()Georgii Staroselskii
These comments were copied from the Linux kernel driver in drivers/platform/x86/intel_scu_ipc.c Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: tangier: acpi: add I2C6 nodeGeorgii Staroselskii
Now that we have I2C#6 working, it's time to add a corresponsing ACPI binding. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: dts: edison: configure I2C#6 pinsGeorgii Staroselskii
Now that we have the pinctrl driver for Merrifield in place we can make use of it and set I2C#6 pins appropriately. Initial configuration came from the firmware. Which quite likely has been used in the phones, where that is not part of Atom peripheral, is in use. Thus we need to override the leftover. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: tangier: pinmux: add API to configure protected pinsGeorgii Staroselskii
This API is going to be used to configure some pins that are protected for simple modification. It's not a comprehensive pinctrl driver but can be turned into one when we need this in the future. Now it is planned to be used only in one place. So that's why I decided not to pollute the codebase with a full-blown pinctrl-merrifield nobody will use. This driver reads corresponding fields in DT and configures pins accordingly. The "protected" flag is used to distinguish configuration of SCU-owned pins from the ordinary ones. The code has been adapted from Linux work done by Andy Shevchenko in pinctrl-merrfifield.c Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix build warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: cpu: introduce scu_ipc_raw_command()Georgii Staroselskii
This interface will be used to configure properly some pins on Merrifield that are shared with SCU. scu_ipc_raw_command() writes SPTR and DPTR registers before sending a command to SCU. This code has been ported from Linux work done by Andy Shevchenko. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-16Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini
2018-09-16Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2018-09-16m68k: ColdFire mcf5441x, add eSDHC supportAngelo Dureghello
This patch adds mcf5441x eSDHC support for the mcf5441x family. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16m68k: fix multiple memory accesses on swap operationsAngelo Dureghello
On a u32 val = __sw32(*addr); multiple memory accesses are not welcome, since "addr" may be an IO peripheral register address. This patch changes __sw16/32 to perform a single memory access for the source value. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16m68k: fix mcf5441x total interrupt numberAngelo Dureghello
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-15sh: tmu: Zap get_tbclk and timer_read_counterMarek Vasut
Replace those two functions with generic ones by defining the timer macros in include/config/*.h . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up register usageMarek Vasut
The code uses all in all three TMU registers, drop the massive register layout structures and just define the required timer registers and use them throughout the code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Inline sh_tmu.hMarek Vasut
The header contains only the TMU register layout, just inline it into the TMU timer implementation and drop the header completely. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQMarek Vasut
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2, while the old SH parts use CONFIG_SYS_CLK_FREQ directly. Just put this into the TMU implementation and drop the CONFIG_SH_TMU_CLK_FREQ config option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
generated by cgit (git 2.34.1) at 2024-12-26 08:50:16 +0000