summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2016-10-07ARM: keystone: remove declaration of unused functionsMasahiro Yamada
These two functions are neither defined nor referenced. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-07ARM: vf610: use strcpy for soc environment variableStefan Agner
To create the soc environment variable we concatenate two strings on the stack. So far, strcat has been used for the first string as well as for the second string. Since the variable on the stack is not initialized, the first strcat may not start using the first entry in the character array. This then could lead to an buffer overflow on the stack. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2016-10-07arm: dts: imx7: add Ricoh RN5T567 PMIC nodeStefan Agner
Add device tree node for Ricoh RN5T567. Currently we do not need the individual DC/DC converters or LDO's (and they are also not yet supported by the driver). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-10-07arm: dts: imx7: add basic i.MX 7/Colibri iMX7 device treeStefan Agner
Add base device for NXP i.MX 7Solo/7Dual. The two SoC are very similar and hence can share the same device tree for boot loaders purpose. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-07arm: dts: imx7: add pinctrl definesStefan Agner
Add pinctrl defines for NXP i.MX 7Solo/7Dual SoC. The pinctrl format is compatible to the Linux kernel, hence this file is a simple copy from the Linux kernel (commit 97f5c1817b7e). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-10-06ARM: Add register defines for am33xx ePWM registerstomas.melin@vaisala.com
Register definitions needed for configuring the ePWM module. Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2016-10-06ARM: OMAP5+: Override switch_to_hypervisor functionKeerthy
Override the switch_to_hypervisor function to switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for HYP mode. Based on the work done by Jonathan Bergsagel jbergsagel@ti.com. Cc: beagleboard-x15@googlegroups.com Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06ARM: Introduce function to switch to hypervisor modeKeerthy
On some of the SoCs one cannot enable hypervisor mode directly from the u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader. Hence introduce a weak function which can be overridden based on the SoC type and switch to hypervisor mode in a custom way. Cc: beagleboard-x15@googlegroups.com Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06omap: Set appropriate cache configuration for LPAE and non-LAPE casesKeerthy
Cache configuration methods is different for LPAE and non-LPAE cases. Hence the bits and the interpretaion is different for two cases. In case of non-LPAE mode short descriptor format is used and we need to set Cache and Buffer bits. In the case of LPAE the cache configuration happens via MAIR0 lookup. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06omap: Remove hardcoding of mmu section shift to 20Keerthy
As of now the mmu section shift is hardcoded to 20 but with LPAE coming into picture this can be different. Hence replacing 20 with MMU_SECTION_SHIFT macro. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06ARM64: Add support for some of atomic64 operationsAdam Oleksy
These functions are needed in UBI/UBIFS on ZynqMP platform (ARM64). Signed-off-by: Adam Oleksy <adam.oleksy@nokia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2016-10-06Various, accumulated typos collected from around the tree.Robert P. J. Day
Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Stefan Roese <sr@denx.de>
2016-10-06ARMv8/sec-firmware: fix a compile errorHou Zhiqiang
When enabled sec firmware framework, but lack of definition of the marco SEC_FIRMWARE_FIT_IMAGE, SEC_FIRMEWARE_FIT_CNF_NAME and SEC_FIRMWARE_TARGET_EL, there will be some build errors, so give a default definition. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2016-10-06ARM: Respect CONFIG_SPL_STACK define in lowlevel_init.SSiarhei Siamashka
The SPL and U-Boot proper may use different initial stack locations, which are configured via CONFIG_SPL_STACK and CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S code needs to handle this in the same way as crt0.S Without this fix, setting the U-Boot stack location to some place, which is not safely accessible by the SPL (such as the DRAM), causes a very early SPL deadlock. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06spl: Pass spl_image as a parameter to load_image() methodsSimon Glass
Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_board_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert boot_device into a structSimon Glass
At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Kconfig: Move SPL_DISPLAY_PRINT to KconfigSimon Glass
Move this option to Kconfig and tidy up existing uses. Also add a function comment to the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a parameter to jump_to_image_linux()Simon Glass
Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a parameter to spl_parse_image_header()Simon Glass
Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Move spl_board_load_image() into a generic headerSimon Glass
At present this is only used on ARM and sandbox, but it is just as applicable to other architectures. Move the function prototype into the generic SPL header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06armv7: ls1021a: Move DDR config options to KconfigYork Sun
Move DDR3, DDR4 and related config options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06armv8: fsl-layerscape: Move DDR config options to KconfigYork Sun
Move DDR3, DDR4 and realted options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to KconfigYork Sun
Move these options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06arm: Move FSL_HAS_DP_DDR and NUM_DDR_CONTROLLERS to KconfigYork Sun
Move this option to Kconfig and clean up existing uses. NUM_DDR_CONTROLLERS is also used by PowerPC SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06arm: Move SYS_FSL_IFC_BANK_COUNT to KconfigYork Sun
Move this option to Kconfig and clean up existing uses. This option is also used by PowerPC SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06arm: Move MAX_CPUS to KconfigYork Sun
Move MAX_CPUS option to Kconfig and clean up existing uses for ARM. This option is used by Freescale Layerscape SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06arm: Move FSL_LSCH2 FSL_LSCH3 to KconfigYork Sun
Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06arm: Fix Kconfig for proper display menuYork Sun
Some config options should not have prompt. They are selected by choosing target. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06armv8: fsl: Enable USB only when SYSCLK is 100 MHzSriram Dash
SYSCLK is used as a reference clock for USB. When the USB controller is used, SYSCLK must meet the additional requirement of 100 MHz. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06armv8: ls1043: Add USB node in dts for ls1043Sriram Dash
Add the USB node for LS1043 in dts. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539Hou Zhiqiang
Pin mux logic has 2 options in priority order, one is through RCW_SRC and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic takes the priority for SPI pads and do not allow RCW_BASE and SPI_EXT to control the SPI muxing. But actually those are DSPI controller's pads instead of QSPI controller's, so this workaround allows RCW fields SPI_BASE and SPI_EXT to control relevant pads muxing. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06ARMv7: LS102xA: Move two macros from header files to KconfigHongbo Zhang
Following commits 217f92b and 1544698, these two config CPU_V7_HAS_NONSEC and CPU_V7_HAS_VIRT are moved to Kconfig, for correctly select ARMV7_PSCI. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06armv8: fsl-layerscape: Fix "cpu status" commandYork Sun
The core position is not continuous for some SoCs. For example, valid cores may present at position 0, 1, 4, 5, 8, 9, etc. Some registers (including boot release register) only count existing cores. Current implementation of cpu_mask() complies with the continuous numbering. However, command "cpu status" queries the spin table with actual core position. Add functions to calculate core position from core number, to correctly calculate offsets. Tested on LS2080ARDB and LS1043ARDB. Signed-off-by: York Sun <york.sun@nxp.com>
2016-10-06armv8/fsl-layerscape: print SoC revsion numberWenbin Song
The exact SoC revsion number can be recognized from U-Boot log. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06armv7: LS1021a: enable i-cache in start.SXiaoliang Yang
Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06armv8: fsl-lsch2: enable snoopable sata read and writeTang Yuantian
By default the SATA IP on the ls1043a/ls1046a SoCs does not generating coherent/snoopable transactions. This patch enable it in the SCFG_SNPCNFGCR register along with sata axicc register. In addition, the dma-coherent property must be set on the SATA controller nodes. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06armv8: fsl-lsch2: adjust sata parameterTang Yuantian
The default values for Port Phy2Cfg register and Port Phy3Cfg register are better, no need to overwrite them. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06pcm052: add new BK4r1 target based on PCM052 SoMAlbert ARIBAUD \(3ADEV\)
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2016-10-06tools: mkimage: add support for Vybrid image formatAlbert ARIBAUD \(3ADEV\)
This format can be flashed directly at address 0 of the NAND FLASH, as it contains all necessary headers. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2016-10-04imx: imx6ul: disable POR_B internal pull upPeng Fan
>From TO1.1, SNVS adds internal pull up control for POR_B, the register filed is GPBIT[1:0], after system boot up, it can be set to 2b'01 to disable internal pull up. It can save about 30uA power in SNVS mode. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx-common: enlarge mux width to 4Peng Fan
For i.MX6, the mux width is 4, not 3. So enlarge the width. IOMUX_CONFIG_LPSR is changed from 0x8 to 0x20 to not use bit 3 of mux. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx: mx6: fix USB bmode to use reserved valueStefan Agner
Currently the bmode "usb" uses BOOT_CFG1 to 0x01, -which means BOOT_CFG1[7:4] is set to b0000. According to Table 8-7 Boot Device Selection this is NOR/OneNAND and not Reserved. Use 0x10 which leads to b0001, which is a Reserved boot device. With that the SoC reliably falls back to the serial loader. Cc: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Troy Kisky <troy.kisky@boundarydevices.com>
2016-10-04arm: imx: add i.MX6ULL 14x14 EVK board supportPeng Fan
Add i.MX6ULL EVK board support: Add device tree file, which is copied from NXP Linux. Enabled DM_MMC, DM_GPIO, DM_I2C, DM_SPI, PINCTRL, DM_REGULATOR. The uart iomux settings are still keeped in board file. Boot Log: U-Boot 2016.09-rc1-00366-gbb419ef-dirty (Aug 11 2016 - 13:08:58 +0800) CPU: Freescale i.MX6ULL rev1.0 at 396MHz CPU: Commercial temperature grade (0C to 95C) at 15C Reset cause: POR Model: Freescale i.MX6 ULL 14x14 EVK Board Board: MX6ULL 14x14 EVK DRAM: 512 MiB MMC: initialized IMX pinctrl driver FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 => mmc dev 1 switch to partitions #0, OK mmc1 is current device Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04arm: dts: add device tree for i.MX6ULLPeng Fan
Add device tree for i.MX6ULL. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04arm: dts: imx6ull: add pinctrl definesPeng Fan
Add pinctrl defines for NXP i.MX 6ULL. Since i.MX6ULL reuses some definitions of i.MX6UL, also add i.MX6UL pinctrl defines from linux kernel commit (29b4817d401). Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx: iomux: fix snvs usage for i.MX6ULLPeng Fan
SNVS TAMPER pin and BOOT MODE pins are in SNVS IOMUXC module, not in IOMUXC, so correct the related registers' offset. Use IOMUX_CONFIG_LPSR flag for these pins, so we can differentiate them from iomuxc pins. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
2016-10-04imx: imx6ull: adjust the ldo 1.2v bandgap voltagePeng Fan
Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop MISC0 bit[6:4]) setting to 2b'110. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx: mx6ull: Add AIPS3 initializationPeng Fan
Since the mx6ull adds the AIPS3, so enable its initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx: mx6ull: Update memory map addressPeng Fan
Update memory map address for mx6ull. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
generated by cgit (git 2.34.1) at 2025-01-02 18:33:40 +0000