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2018-05-18arm: socfpga: stratix10: Add watchdog and firewall base addressesLey Foon Tan
Add the base address for watchdog and firewall. Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18ARM: socfpga: Fix Documentation errors in scu_registersBen Kalo
According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers Access Control register offset is 0x50. Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2018-05-18ARM: socfpga: Adding SoCFPGA info for both SPL and U-BootTien Fong Chee
SoC FPGA info is required in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18ARM: socfpga: Adding clock frequency info for U-BootTien Fong Chee
Clock frequency info is required in U-Boot because info would be erased when transition from SPL to U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18configs: Add DDR Kconfig support for Arria 10Tien Fong Chee
This patch enables DDR Kconfig support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Add DDR driver for Arria 10Tien Fong Chee
Add DDR driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18ARM: socfpga: Add DRAM bank size initialization functionTien Fong Chee
Add function for both multiple DRAM bank and single DRAM bank size initialization. This common functionality could be used by every single SOCFPGA board. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18ARM: socfpga: Rename the gen5 sdram driver to more specific nameTien Fong Chee
Current sdram driver is only applied to gen5 device, hence it is better to rename sdram driver to more specific name which is related to gen5 device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18ARM: socfpga: Repair A10 EMAC reset handlingMarek Vasut
The EMAC reset and PHY mode configuration was never working on the Arria10 SoC, fix this. This patch pulls out the common code into misc.c and passes the SoC-specific function call in as a function pointer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoffMarek Vasut
Regenerate Altera Arria 10 SoCDK SDMMC handoff file using latest Quartus to get the new set of clock bindings in. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Synchronize Arria10 DTsMarek Vasut
Synchronize Altera Arria 10 DT sources with Linux 4.16.3 as of commit ef8216d28a5920022cddcb694d2d75bd1f0035ca Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Sort the DT MakefileMarek Vasut
Sort the Makefile entries, no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Sync A10 clock manager binding parserMarek Vasut
The A10 clock manager parsed DT bindings generated by Quartus the bsp-editor to configure the A10 clocks. Sadly, those DT bindings changed at some point. The clock manager patch used the old ones, this patch replaces the bindings parser with one for the new set. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Convert to DM serialMarek Vasut
Pull the serial port configuration from DT and use DM serial instead of having the serial configuration in two places, DT and board config. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Clean up Kconfig entriesMarek Vasut
Shuffle the default Kconfig entries around so it is not such a mess. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGETMarek Vasut
This was never used, is not used anywhere and is just in the way by adding annoying ifdeffery. Get rid of it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18arm: imx53: Add support for imx53 boards from K+PLukasz Majewski
This commit adds support for DDC and HSC boards from K+P in u-boot. Console output: U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200) CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: WDOG Model: K+P iMX53 DRAM: 512 MiB MMC: FSL_SDHC: 0 Loading Environment from MMC... OK In: serial Out: serial Err: serial Module EEPROM: ID: TQMa53-CB.0401 SN: 63152762 MAC: 00:0b:64:03:14:2a BBoard:40x0 Rev:10 Net: eth0: ethernet@63fec000 Hit any key to stop autoboot: 0 Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-18sandbox: Enable support for MC34708 PMIC in DTSLukasz Majewski
This commit also provides the default values of the emulated MC34708 PMIC internal registers content. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18i.MX6DL: mamoj: Add PFUZE100 supportJagan Teki
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support for it through DM_PMIC dt definition. pmic log: Reviewed-by: Stefano Babic <sbabic@denx.de> ======== => pmic list | Name | Parent name | Parent uclass @ seq | pfuze100@08 | i2c@021f8000 | i2c @ 3 => pmic dev pfuze100@08 dev: 0 @ pfuze100@08 => pmic dump Dump pmic: pfuze100@08 registers 0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81 0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00 0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b 0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08 0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00 0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10 0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18i.MX6DL: mamoj: Add I2C supportJagan Teki
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support through DM_I2C with dt definition. i2c log: Reviewed-by: Stefano Babic <sbabic@denx.de> ======= => i2c bus Bus 2: i2c@021a8000 Bus 3: i2c@021f8000 => i2c dev 2 Setting bus to 2 => i2c speed 400000 Setting bus speed to 400000 Hz => i2c probe Valid chip addresses: 20 51 53 => i2c md 53 0xff 00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ => i2c md 51 0xff 00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S => i2c dev 3 Setting bus to 3 => i2c speed 100000 Setting bus speed to 100000 Hz => i2c probe Valid chip addresses: 08 40 48 4B => i2c md 08 0xff 00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18i.MX6: board: Add BTicino i.MX6DL Mamoj initial supportJagan Teki
Add initial support for i.MX6DL BTicino Mamoj board. Mamoh board added: - SPL - SPL_DM - SPL_OF_CONTROL - DM for U-Boot proper - OF_CONTROL for U-Boot proper - eMMC - FEC - Boot from eMMC - Boot from USB SDP Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: i.MX6: dts: Build dtb based on SOC typeJagan Teki
Build dtb's based on SOC type instead building arch type. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-splJagan Teki
u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6UL files. This make syncing Linux dts files straight forward. Also update the MAINTAINERS file for dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: dts: imx6ul-isiot: Move usdhc2 into dtsiJagan Teki
Move usdhc2 node along with pinctrl to imx6ul-isiot.dts from imx6ul-isiot-emmc.dts Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot, dm-splJagan Teki
u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6QDL files. This make syncing Linux dts files straight forward. Also update the MAINTAINERS file for dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-17ARM: kirkwood: Add device-tree for sheevaplugChris Packham
Import the dts files from Linux 4.17 and enable device tree control in u-boot. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for pogo_e02Chris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for openrdChris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for nas220Chris Packham
Import the dts file from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for iconnectChris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for ib62x0Chris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for guruplugChris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for goflexhomeChris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for dockstarChris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for dns325Chris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: add devicetree files for kirkwood SoCChris Packham
These files are taken verbatim from the Linux kernel 4.17 Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17dts: pinctrl: Provide IMX_PAD_SION definition for imx53 pinctrlLukasz Majewski
The SION pin must be set for proper operation of I2C when DM is enabled. When legacy I2C is used, this bit is set implicitly in the u-boot code: arch/arm/include/asm/arch-mx5/iomux-mx53.h:92: MX53_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x368, 0x040, 4 | IOMUX_CONFIG_SION, 0x820, 0, NO_PAD_CTRL), The Linux kernel uses similar approach with: arch/arm/boot/dts/imx53-tqma53.dtsi:182: MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 After applying this patch it is possible to have the I2C working with DM on imx53 devices: MX53_PAD_KEY_ROW3__I2C2_SDA (0x1ee | IMX_PAD_SION) Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-17dts: imx53: Add gpio and i2c nodes to imx53.dtsi fileLukasz Majewski
Those DTS nodes has been ported from Linux kernel (v4.16) Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-17mx6: Select CONFIG_MP with MX6_SMPPeter Robinson
It makes sense to select the MP multi processor option at the same time we select the other SMP options needed for SMP capable i.MX6 SoCs. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2018-05-17mx31: Convert MX31_HCLK_FREQ and MX31_CLK32 to Kconfig.Magnus Lilja
Also remove the #ifdef's from clock.h since the Kconfig values defaults the to old default values in clock.h. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-17mx31pdk: Convert CONFIG_MX31 flag to use Kconfig.Magnus Lilja
Move CONFIG_MX31 from mx31pdk.h to mx31pdk_defconfig and introduce necessary Kconfig changes as well. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-17board: ge: bx50v3: remove redundant targetsIan Ray
This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3. The boards are identified automatically at runtime. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-15nds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue
nds2 bitops.h provides a __clear_bit() but does not define PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the architecturally provided __clear_bit(). This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in nds32 bitops.h will be called whenever generic_clear_bit() is called - as opposed to the default cross-platform generic_clear_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Macpaul Lin <macpaul@andestech.com>
2018-05-15nds32: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue
nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in nds32 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Macpaul Lin <macpaul@andestech.com>
2018-05-15nios2: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue
nios2 bitops.h provides a __clear_bit() but does not define PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the architecturally provided __clear_bit(). This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in nios2 bitops.h will be called whenever generic_clear_bit() is called - as opposed to the default cross-platform generic_clear_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Thomas Chou <thomas@wytron.com.tw>
2018-05-15nios2: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue
nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in nios2 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Thomas Chou <thomas@wytron.com.tw>
2018-05-15riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue
riscv bitops.h provides a __clear_bit() but does not define PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the architecturally provided __clear_bit(). This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in riscv bitops.h will be called whenever generic_clear_bit() is called - as opposed to the default cross-platform generic_clear_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Rick Chen <rick@andestech.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-05-15riscv: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue
riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Rick Chen <rick@andestech.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-05-15x86: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue
x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2018-05-15Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
generated by cgit (git 2.34.1) at 2025-01-13 22:57:36 +0000