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2014-07-09Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2014-07-09mx6: soc: Update the comments of set_ldo_voltage()Fabio Estevam
Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces set_ldo_voltage() function that can be used to set the voltages of any of the three LDO regulators controlled by the PMU_REG_CORE register. Prior to this commit there was a single set_vddsoc() which only configured the VDDSOC regulator. Update the comments to align with the new set_ldo_voltage() implementation. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-09MX6: Correct calculation of PLL_SYSAndre Renaud
DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do the shift after the multiply to avoid rounding errors Signed-off-by: Andre Renaud <andre@bluewatersys.com>
2014-07-07kmake: include DTB section into u-boot.bin if CONFIG_OF_EMBED enabledAlexey Ignatov
Fixes a bug when objcopy doesn't put .dtb.init.rodata section to resulting u-boot.bin, so u-boot was unable to find embedded DTB.
2014-07-07blackfin, powerpc: remove redundant definitions of ARRAY_SIZEMasahiro Yamada
Since ARRAY_SIZE macro is defined in include/common.h, re-defining it in arch-specific files is redundant. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Sonic Zhang <sonic.zhang@analog.com>
2014-07-07blackfin: Add more dcache functionsVasili Galka
Add invalidate_dcache_range() and flush_dcache_range() for the blackfin architecture. Such functions already exist on this arch with different names, so just forward the call. This fixes the build of bf609-ezkit board as it uses drivers/net/designware.c which requires the above functions. Cc: Sonic Zhang <sonic.adi@gmail.com>, Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
2014-07-07m68k: Fix incorrect memory access on M5235Vasili Galka
The csarX and cscrX registers in the fbcs_t struct are 16-bit for CONFIG_M5235 and 32-bit wide otherwise. The code in cpu_init.c accessed them always as 32-bit, effectively creating a wrong memory access on M5235. Fixed that by choosing out_be16/out_be32 depending on whether CONFIG_M5235 is defined or not. Cc: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
2014-07-07m68k: Fix bug, "address of" operator was forgottenVasili Galka
in_be16() shall be passed a pointer to register and not its value. This is clearly a typo resulting in a wrong memory access, so fix it. Cc: Alison Wang <b18965@freescale.com>, Jason Jin <Jason.jin@freescale.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
2014-07-07mpc8xx: remove spc1920 board supportMasahiro Yamada
This board is old enough and has no maintainer. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07mpc8xx: remove fads board supportMasahiro Yamada
These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07mpc8xx: remove netta, netta2, netphone board supportMasahiro Yamada
These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07mpc8xx: remove RPXlite_dw, quantum board supportMasahiro Yamada
These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07mpc8xx: remove qs850, qs860t board supportMasahiro Yamada
These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07am43xx: Tune the system to avoid DSS underflowsCooper Jr., Franklin
* This is done by limiting the ARM's bandwidth and setting DSS priority in the EMIF controller to ensure underflows do not occur.
2014-07-07am43xx: Update EMIF DDR3 Configuration for AM43x GPFranklin S. Cooper Jr
* Boot failures have been discovered due to a combination of routing issues and non optimal ddr3 timings in the EMIF * Since ddr3 timings are different after significant board layout changes different timings are required for alpha, beta and production boards. Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
2014-07-07build: define CPU only when arch/${ARCH}/cpu/${CPU} existsMasahiro Yamada
The directory arch/${ARCH}/cpu/${CPU} does not exist in avr32, blackfin, microblaze, nios2, openrisc, sandbox, x86. These architectures have only one CPU type. Defining CPU should not be required for such architectures. This commit allows cpu field (= the 3rd field of boards.cfg) to be kept blank. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
2014-07-07ARM: emif4: wait for CM_DLL_READYST to be setJeroen Hofstee
The code intends for the CM_DLL_READYST to be set, but actually polls till any bit is set since the logical AND is used instead of the bitwise one is used. Fix it. cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-07Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini
2014-07-05socfpga: Relocate arch common functions away from boardChin Liang See
To move the arch common function away from board folder to arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication for other non Altera dev kit which is using socfpga device. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Detlev Zundel <dzu@denx.de>
2014-07-05arm: Fix armv8 compilation errorShaibal.Dutta
Fix following compilation error when CONFIG_ARM64 is defined Error: unknown or missing system register name at operand 2 -- `mrs x0,daifmsr daifset,#3' Signed-off-by: Shaibal.Dutta <shaibal.dutta@broadcom.com> Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Darwin Rambo <drambo@broadcom.com>
2014-07-05arm: spl: fix include guardJeroen Hofstee
cc: Tom Rini <trini@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-05socfpga: Adding Scan Manager driverChin Liang See
Scan Manager driver will be called to configure the IOCSR scan chain. This configuration will setup the IO buffer settings Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2014-07-05socfpga: Adding DesignWare watchdog supportChin Liang See
To enable the DesignWare watchdog support at SOCFPGA Cyclone V dev kit. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
2014-07-04arm: ep9315: Return back Cirrus Logic EDB9315A board supportSergey Kostanbaev
This patch returns back support for old ep93xx processors family Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Cc: albert.u.boot@aribaud.net
2014-07-04ARM: cache_v7: use __weakJeroen Hofstee
This is not only more readable but also prevents a warning about a missing prototype. The prototypes which are actually missing are added. cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Tom Rini <trini@ti.com>
2014-07-04ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board supportYork Sun
LS2085A is an ARMv8 implementation. This adds board support for emulator and simulator: Two DDR controllers UART2 is used as the console IFC timing is tightened for speedy booting Support DDR3 and DDR4 as separated targets Management Complex (MC) is enabled Support for GIC 500 (based on GICv3 arch) Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com> Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2014-07-03armv8/fsl-lsch3: Add support to load and start MC FirmwareJ. German Rivera
Adding support to load and start the Layerscape Management Complex (MC) firmware. First, the MC GCR register is set to 0 to reset all cores. MC firmware and DPL images are copied from their location in NOR flash to DDR. MC registers are updated with the location of these images. Deasserting the reset bit of MC GCR register releases core 0 to run. Core 1 will be released by MC firmware. Stop bits are not touched for this step. U-boot waits for MC until it boots up. In case of a failure, device tree is updated accordingly. The MC firmware image uses FIT format. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
2014-07-03ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoCYork Sun
Freescale LayerScape with Chassis Generation 3 is a set of SoCs with ARMv8 cores and 3rd generation of Chassis. We use different MMU setup to support memory map and cache attribute for these SoCs. MMU and cache are enabled very early to bootst performance, especially for early development on emulators. After u-boot relocates to DDR, a new MMU table with QBMan cache access is created in DDR. SMMU pagesize is set in SMMU_sACR register. Both DDR3 and DDR4 are supported. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
2014-07-03ARMv8: Adjust MMU setupYork Sun
Make MMU function reusable. Platform code can setup its own MMU tables. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
2014-07-03Added 64-bit MMIO accessors for ARMv8J. German Rivera
This is needed for accessing peripherals with 64-bit MMIO registers, from ARMv8 processors. Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
2014-07-03arm: Add support for semihosting for armv8 fastmodel targets.Darwin Rambo
The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF images and u-boot, and does this for virtual platforms by using semihosting. This commit extends this idea by allowing u-boot to also use semihosting to load the kernel/ramdisk/dtb. This eliminates the need for a bootwrapper and produces a more realistic boot sequence with virtual models. Though the semihosting code is quite generic, support for armv7 in fastmodel is less useful due to the wide range of available silicon and the lack of a free armv7 fastmodel, so this change contains an untested armv7 placeholder for the service trap opcode. Please refer to doc/README.semihosting for a more detailed description of semihosting and how it is used with the armv8 virtual platforms. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Cc: trini@ti.com Cc: fenghua@phytium.com.cn Cc: bhupesh.sharma@freescale.com
2014-07-03i2c: tegra: use repeated start for readsStephen Warren
I2C read transactions are typically implemented as follows: START(write) address REPEATED_START(read) data... STOP However, Tegra's I2C driver currently implements reads as follows: START(write) address STOP START(read) data... STOP This sequence confuses at least the AS3722 PMIC on the Jetson TK1 board, leading to corrupted read data in some cases. Fix the driver to chain the transactions together using repeated starts to solve this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Yen Lin <yelin@nvidia.com>
2014-07-01Merge remote-tracking branch 'u-boot-samsung/master'Albert ARIBAUD
Conflicts: boards.cfg Conflict was trivial between goni maintainer change and lager_nor removal.
2014-07-01Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-07-01Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-06-30Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-06-25vf610: fix build due to missing sys_proto.hStefano Babic
commit 67a04ab3ab8522a3a34491853e46105317580df5 fix the build for MX25. The same error happens for VF610 SOC. Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-06-25Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'Albert ARIBAUD
2014-06-25Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-06-23sandbox: change local_irq_save() to macroMasahiro Yamada
local_irq_save() should be a macro, not a function because local_irq_save() saves flag to the given argument. GCC is silent about this issue, but Clang warns: In file included from lib/asm-offsets.c:15: In file included from include/common.h:20: In file included from include/linux/bitops.h:110: arch/sandbox/include/asm/bitops.h:59:17: warning: variable 'flags' is uninitialized when used here [-Wuninitialized] local_irq_save(flags); ^~~~~ That change causes another warning: In file included from include/linux/bitops.h:110:0, from include/common.h:20, from lib/asm-offsets.c:15: arch/sandbox/include/asm/bitops.h: In function ‘test_and_set_bit’: arch/sandbox/include/asm/bitops.h:56:16: warning: unused variable ‘flags’ [-Wunused-variable] So, flags should be set to __always_unused. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-23sandbox: terminate os_dirent_ls() result listStephen Warren
Each node in the linked-list that os_dirent_ls() returns has its next pointer set only when the next node is created. For the last node in the list, there is no next node, so this never happens, and the next pointer is never initialized. Explicitly initialize the next pointer so that it isn't dangling. Without this, "sb ls" might crash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-06-23x86: Enable 32-bit build using x86_64 multilib toolchainVasili Galka
Until now building the x86 arch boards required 32-bit toolchain. As many x86_64 toolchains come with 32-bit support (multilib) that's a good idea to enable build with such toolchains. The change required was to specify the usage of 32-bit explicitly to the compiler and the linker (-m32 and -m elf_i386 flags) and locate the right libgcc path. Signed-off-by: Vasili Galka <vvv444@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-06-23Exynos5420: Introduce support for the Peach-Pit boardAkshay Saraswat
While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit line of devices, there could be other boards using the same chip, so a common configuration file is being added (exynos5420.h) as well as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi). The peach board as declared in boards.cfg is a copy of smdk5420 declaration. The configuration files are similar, but define different default device trees, console serial ports and prompts. The device tree files for smdk5420 and peach-pit inherit from the same common file. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-06-23Exynos5420: Let macros be used for exynos5420Akshay Saraswat
Macros defined in exynos5_setup.h specific to SMDK5420 are required for Peach-Pit too. Hence, replacing CONFIG_SMDK5420 with CONFIG_EXYNOS5420 to enable these macros for all the boards based on Exynos5420. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-06-20tegra: dts: Bring in GPIO bindings from linuxSimon Glass
These files are taken from Linux 3.14. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2014-06-20Makefile: Support include files for .dts filesSimon Glass
Linux supports this, and if we are to have compatible device tree files, U-Boot should also. Avoid giving the device tree files access to U-Boot's include/ directory. Only include/dt-bindings is accessible. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-06-20sandbox: Support iotrace featureSimon Glass
Support the iotrace feature for sandbox, and enable it, using some dummy I/O access methods. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-20arm: Support iotrace featureSimon Glass
Support the iotrace feature for ARM, when enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-19OMAP: disable gpmc timeout safely for reenablingStefano Babic
gpmc timeout is disabled and the reset counter is set to 0. However, if later a driver activates the timeout setting the reset to a valid value, the old reset value with zero is still valid for the first access. In fact, the timeout block loads the reset counter after a successful access. Found on a am335x board with a FPGA connected to the GPMC bus together with the NAND. When the FPGA driver in kernel activates the timeout, the system hangs at the first access by the NAND driver. Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-06-19omap3: board: trivial: add void for no argsJeroen Hofstee
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>