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2015-09-02imx: mxs: reimplement get_cpu_revPeng Fan
Rewrite get_cpu_rev, from "static const char *get_cpu_rev(void)" to "u32 get_cpu_rev(void)". To align with get_cpu_rev of other i.MXes. Also write get_imx_type to replace get_cpu_type, since we have macro named get_cpu_type. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02imx: mx31 use new formula for get_cpu_revPeng Fan
Use new formula for get_cpu_rev, since we need to use this formula to do runtime check for all i.MXes. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02imx: mx27 implement get_cpu_revPeng Fan
Implement get_cpu_rev to support runtime check using is_cpu_type. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02imx: add cpu type for i.MX2 and i.MX3Peng Fan
Add cpu types for i.MX2/3. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02imx: mx6 move TARGET_xx Kconfig option to mx6 specific Kconfig filePeng Fan
Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig. Add enable "CONFIG_ARCH_MX6" for boards based on mx6. Then we can choose target boards using "make ARCH=arm menuconfig" with ARCH_MX6 defined. If using original way, we have no chance to enable ARCH_MX6 when "make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig, kconfig will complains "arch/../configs/platinum_titanium_defconfig:3: warning: override: TARGET_PLATINUM_TITANIUM changes choice state" Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric BĂ©nard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Marek Vasut <marex@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Soeren Moch <smoch@web.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Soeren Moch <smoch@web.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2015-09-02ARM: ts4800: add ethernet supportDamien Riegel
This commit adds ethernet support to the TS4800. Note that the MAC address is not fused on this board and have to be read from FEC PALR PAUR registers (this is how the kernel provided by Technologic Systems does it). signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Cc: Stefano Babic <sbabic@denx.de>
2015-09-02ARM: ts4800: add basic board supportLucile Quirion
This commit adds basic support including: MMC, Serial console, TS4800 watchdog The config use CONFIG_SKIP_LOWLEVEL_INIT as U-boot is used as a second stage bootloader. Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com> signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Cc: Stefano Babic <sbabic@denx.de>
2015-09-02arm: mxs: Fix mkimage invocationMarek Vasut
Remove this ad-hoc mkimage invocation in MXS Makefile and replace it with the standard mkimage rule instead. This patch fixes recent build issues introduced by the patch 92a655c mkimage: Set up a file size parameter and keep it updated These build issues could be triggered by building for example the MX28EVK and the u-boot.sb image: $ make mx28evk_defconfig $ make V=1 u-boot.sb [...] make -f ./scripts/Makefile.build obj=arch/arm/cpu/arm926ejs/mxs u-boot.sb ./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage u-boot.sb ./tools/mkimage: Can't open (null): Bad address arch/arm/cpu/arm926ejs/mxs/Makefile:82: recipe for target 'u-boot.sb' failed make[1]: *** [u-boot.sb] Error 1 Makefile:989: recipe for target 'u-boot.sb' failed make: *** [u-boot.sb] Error 2 With this patch: ./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage -d arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg u-boot.sb Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Juha Lumme <juha.lumme@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-02udoo: Switch to SPL supportvpeter4
Currently we need to build one U-boot image for each of the udoo variants: quad and dual-lite. By switching to SPL we can support all two variants with a single binary. Based on the SPL for wandboard. Tested with OpenELEC (Open Embedded Linux Entertainment Center) on both boards. Signed-off-by: Peter Vicman <peter.vicman@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Peter Vicman <peter.vicman@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-08-31Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2015-08-31pinctrl: sandbox: add sandbox pinctrl driverMasahiro Yamada
This driver actually does nothing but test pinctrl uclass, and demonstrate how things work. To try this driver, uncomment /* #define DEBUG */ in the drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be displayed. DRAM: 128 MiB sandbox pinmux: group = 1 (serial_a), function = 1 (serial) Using default environment In: cros-ec-keyb Out: lcd Err: lcd Net: Net Initialization Skipped eth0: eth@10002000, eth1: eth@80000000, eth5: eth@90000000 => i2c dev 0 Setting bus to 0 sandbox pinmux: group = 0 (i2c), function = 0 (i2c) sandbox pinconf: group = 0 (i2c), param = 3, arg = 1 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devicesSimon Glass
Add a TPM node to the various Chromebooks so that driver can be converted to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31dm: tpm: sandbox: Convert TPM driver to driver modelSimon Glass
Convert the sandbox TPM driver to use driver model. Add it to the device tree so that it can be found on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31sunxi: Enable non-secure access to RTC on sun6i (A31s)Chen-Yu Tsai
On the A31s the RTC is by default secured. Thus when u-boot loads the kernel in non-secure world, the RTC is unavailable. The SoC has a TrustZone Protection Controller, which can be used to enable non-secure access to the RTC. On the A31 the TZPC doesn't seem to do anything, i.e. changes to its register contents do not affect access to the RTC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-08-31sunxi: Add support for the Olimex A20 EVBMarcus Cooper
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-08-31sunxi: Add inet98v_rev2 defconfig and dts fileHans de Goede
The inet98v_rev2 is a pcb used in generic A13 based tablets. It features volume buttons, a power barrel, micro-usb otg, headphone connector and a power button. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-31sunxi: Add support for gt90h-v4 tabletsHans de Goede
The gt90h is a pcb found in generic 9" tablets with an A23 soc, 1G RAM and 8G nand, rtl8723as usb wifi, 1 micro usb port and 1 micro sd slot. The pmic setup on this board is somewhat special, dcdc2 MUST be set to 1.1V instead of the usual 1.2V otherwise the board is very unstable. aldo1 is used to power the micro sd slot, dldo1 is used for wifi. This commit adds a defconfig + dts (as submitted to the kernel) for the gt90h-v4 pcb. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-31ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board supportMasahiro Yamada
Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for PH1-LD6b reference board. Import from Linux with some adjustments: - Use SPDX-License-Identifier - Add clock-frequency to serial nodes - Drop unusable nodes from -ref.dts While I am here, sort Makefile entries alphabetically. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31ARM: dts: uniphier: add PH1-Pro5 SoC supportMasahiro Yamada
Initial version of UniPhier PH1-Pro5 device tree. (Imported from Linux with adjustment for SPDX License Identifier) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31ARM: dts: uniphier: sync with LinuxMasahiro Yamada
This commit imports device tree updates from Linux. It eventually adds pinctrl-related nodes and properties. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31ARM: uniphier: enable SPL_OF_CONTROLMasahiro Yamada
Device Tree really improves code maintainability and is now available for SPL too. This is the state-of-the-art implementation in U-boot. The board files (platform data) are no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-30ARM: uniphier: select SPL_DM rather than default in defconfigMasahiro Yamada
Now UniPhier SoCs highly depend on Driver Model for SPL, too. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30ARM: uniphier: fix build error when CONFIG_DEBUG_LL is definedMasahiro Yamada
The build error happens if CONFIG_DEBUG_LL and CONFIG_MACH_PH1_SLD3 are both enabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-28ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks()Kishon Vijay Abraham I
Now that we have separate function to enable USB clocks, remove enabling USB clocks from enable_basic_clocks(). Now board_usb_init() should take care to invoke enable_usb_clocks() for enabling USB clocks. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28ARM: AM43xx: Add functions to enable and disable USB clocksKishon Vijay Abraham I
Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28ARM: OMAP5: Add functions to enable and disable USB clocksKishon Vijay Abraham I
Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28board: ti: OMAP5: added USB initializtion codeKishon Vijay Abraham I
Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in omap5 board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28board: ti: beagle_x15: added USB initializtion codeKishon Vijay Abraham I
Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in beagle_x15 board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2Kishon Vijay Abraham I
Enabled clocks for the second dwc3 controller and second USB PHY present in DRA7. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28omap-common: SYS_BOOT fallback logic correction and support for more devicesPaul Kocialkowski
The SYS_BOOT-based fallback shouldn't only check for one of the conditions of use and then let the switch/case handle each boot device without enforcing the conditions for each type of boot device again. For instance, this behaviour would trigger the fallback for UART when BOOT_DEVICE_UART is defined, CONFIG_SPL_YMODEM_SUPPORT is enabled (which should be a show-stopper) and e.g. BOOT_DEVICE_USB is enabled and not CONFIG_SPL_USB_SUPPORT. Separating the logic for USB and UART solves this. In addition, this adds support for more peripheral devices (USBETH and CPGMAC) to the fallback mechanism. Note that the USBETH boot device should always be different from the USB boot device (each should match a different bootrom handoff case). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2015-08-28arm: spear: Enable caches on SPEArStefan Roese
The designware ethernet driver supports d-cache now. So there is nothing stopping us now to enable the caches completely on SPEAr. Tested on SPEAr600 x600 board. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28arm: spear: Move to common SPL infrastructureStefan Roese
The SPL implementation for SPEAr600 is older than the common SPL infrastructure. This patch now moves the SPEAr600 SPL over to the common SPL code. Tested on the only SPEAr board that currently uses SPL in mainline U-Boot, the x600. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28ARM: k2l: Fix device speedsLokesh Vutla
ARM supported speeds and init value of core_pll for SDP1200 are programmed wrong as part for the device speed cleanups. Fixing it here. Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection") Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28ARM: keystone2: Build MLO by defaultLokesh Vutla
MLO(NAND/MMC boot image), is used for all the ks2 platforms. Enabling it in config.mk so that these images will be automatically built upon calling make. u-boot-spi.gph is already the build target, so not including here. Reported-by: Nishanth Menon <nm@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28ARM: keystone2: Rename u-boot-nand.gph to MLOLokesh Vutla
NAND boot mode, ROM expects an image with a gp header in the beginning and an 8bytes filled with zeros at the end. The same is true for SD boot on K2G platforms but the file name should be MLO. Renaming u-boot-nand.gph to MLO, so that same image can be used for NAND and SD boots. And also not including all the u-boot only images under CONFIG_SPL_BUILD. Reported-by: Nishanth Menon <nm@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28ARM: keystone2: move the custom build rules out to keystone specific makefileNishanth Menon
Keystone has build rules introduced by commit ef509b9063fb7 ("k2hk: add support for k2hk SOC and EVM") and commit 0e7f2dbac6ead ("keystone: add support for NAND gpheader image"). These are not reused by other platforms for the build, hence there is no clear benefit is maintaining them in the generic makefile as a build target. move these to the keystone specific make option Original idea of using config.mk by Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon
DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet provided IODELAY values for standard RGMII phys do not work. Silicon Revision(SR) 2.0 provides an alternative bit configuration that allows us to do a "gross adjustment" to launch the data off a different internal clock edge. Manual IO Delay overrides are still necessary to fine tune the clock-to-data delays. This is a necessary workaround for the quirky ethernet Phy we have on the platform. NOTE: SMA registers are spare "kitchen sink" registers that does contain bits for other workaround as necessary as well. Hence the control for the same is introduced in a generic SoC specific, board generic location. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28ARM: DRA7: Add detection of ES2.0Nishanth Menon
Add support for detection of ES2.0 version of DRA7 family of processors. ES2.0 is an incremental revision with various fixes including the following: - reset logic fixes - few assymetric aging logic fixes - MMC clock rate fixes - Ethernet speed fixes - edma fixes for mcasp [ravibabu@ti.com: posted internal for an older bootloader] Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28NDS32: Generic Board Support and UnsupportKun-Hua Huang
Remove ag101 and ag102 support Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
2015-08-28NDS32: Generic Board Support and UnsupportKun-Hua Huang
Add nds32 ag101p generic board support. Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
2015-08-26Merge git://git.denx.de/u-boot-x86Tom Rini
2015-08-26x86: crownbay: Support Topcliff integrated pci uart devices with driver modelBin Meng
In order to make a pci uart device node to be properly bound to its driver, we need make sure its parent node has a compatible string which matches a driver that scans all of its child device nodes in the device tree. Change all pci bridge nodes under root pci node to use "pci-bridge" compatible driver, as well as corresponding <reg> properties to indicate its devfn. At last, adding "u-boot,dm-pre-reloc" to each of these nodes for driver model to initialize them before relocation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: crownbay: Enable on-board SMSC superio keyboard controllerBin Meng
So far we only enabled one legacy serial port on the SMSC LPC47m superio chipset on Intel Crown Bay board. As the board also has dual PS/2 ports routed out, enable the keyboard controller which is i8042 compatible so that we can use PS/2 keyboard and mouse. In order to make PS/2 keyboard work with the VGA console, remove CONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode using PIRQ routing table, adjust the mask in the device tree to reserve irq12 which is used by PS/2 mouse. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: minnowmax: Correct pad-offset value for host_en1Simon Glass
This should be 0x250, not 0x258. Fix it. Reported-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: minnowmax: Add access to GPIOs E0, E1, E2Simon Glass
These GPIOs are accessible on the pin header. Add pinctrl settings for them so that we they can be adjusted using the 'gpio' command. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: Add DSDT table for supporting ACPI on QEMUSaket Sinha
The DSDT table contains a bytecode that is executed by a driver in the kernel. Signed-off-by: Saket Sinha <saket.sinha89@gmail.com> Tested with QEMU '-M q35' Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-26x86: Add ACPI table support to QEMUSaket Sinha
This patch mainly adds ACPI support to QEMU. Verified by booting Linux kernel on QEMU Q35. Signed-off-by: Saket Sinha <saket.sinha89@gmail.com> Minor whitespace fixes and dropped mention of i440FX in commit message: Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: Generate a valid ACPI tableSaket Sinha
Implement write_acpi_table() to create a minimal working ACPI table. This includes writing FACS, XSDT, RSDP, FADT, MCFG, MADT, DSDT & SSDT ACPI table entries. Use a Kconfig option GENERATE_ACPI_TABLE to tell U-Boot whether we need actually write the APCI table just like we did for PIRQ routing, MP table and SFI tables. With ACPI table existence, linux kernel gets control of power management, thermal management, configuration management and monitoring in hardware. Signed-off-by: Saket Sinha <saket.sinha89@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tidied up whitespace and aligned some tabs: Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: superio: Add keyboard controller support to smsc_lpc47m driverBin Meng
Add an api to enable and configure the integrated keyboard controller on SMSC LPC47m superio chipset. It also adds several macros to help future extension. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: baytrail: Remove the fsp_init_phase_pci() callBin Meng
It turns out that calling fsp_init_phase_pci() in arch_misc_init() is subject to break pci device drivers as with driver model, when the bus enumeration happens is not deterministic. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>