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2019-07-18arm: dts: MediaTek: remove tick-timer from mt7629.dtsiWeijie Gao
This patch removes tick-timer as all mt7629 boards should use arch timer. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-07-18arm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsiWeijie Gao
The timer0 node has its two clocks written in reversed order. The timer0 is used as the tick timer which causes a problem that the time a delay function used is 4 times longer. This patch reverses these two clocks to solve this issue. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-07-18arm: mediatek: add missing arch timer configuration for MT7629Weijie Gao
This patch sets CNTVOFF of ARM CP15 timer to zero to make sure the virtual counter is fully usable for linux kernel. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-07-18arm: qemu: fix failure in flash initialization if booting from TF-AAKASHI Takahiro
If U-Boot is loaded and started from TF-A (you need to change SYS_TEXT_BASE to 0x60000000), it will hang up at flash initialization. If secure mode is off (default, or -machine virt,secure=off) at qemu, it will provide dtb with two flash memory banks: flash@0 { bank-width = <0x4>; reg = <0x0 0x0 0x0 0x4000000 0x0 0x4000000 0x0 0x4000000>; compatible = "cfi-flash"; }; If secure mode is on, on the other hand, qemu provides dtb with 1 bank: flash@0 { bank-width = <0x4>; reg = <0x0 0x4000000 0x0 0x4000000>; compatible = "cfi-flash"; }; As a result, flash_init()/flash_get_size() will eventually fail. With this patch applied, relevant CONFIG values are modified. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-18arm: move CONFIG_TFABOOT to generic KconfigAKASHI Takahiro
Currently, CONFIG_TFABOOT is located in armv8/fsl-layerscape Kconfig, but it will be also useful for other targets if some additional configuration are necessary. So move it to arch/arm/Kconfig. Please note that CONFIG_TFABOOT still depends on CONFIG_ARCH_SUPPORT_TFABOOT and so the menu won't come up if any target doesn't need its own customization for TF-A boot. This will maintain the compatibility. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Sriram Dash <sriram.dash@nxp.com> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Cc: Peng Ma <peng.ma@nxp.com> Cc: Yuantian Tang <andy.tang@nxp.com> Cc: Pankit Garg <pankit.garg@nxp.com>
2019-07-18ARM: correct detection of thumb modeHeinrich Schuchardt
When a crash occurs in thumb mode the crash dump is incorrect. This is due to the usage of a non-existing configuration variable CONFIG_ARM_THUMB in the definition of macro thumb_mode(regs). Use CONFIG_IS_ENABLED(SYS_THUMB_BUILD) to detect that the code has been compiled for thumb mode. Remove ARM_THUMB from config_whitelist.txt. With the patch crash dumps indicate thumb mode correctly. On a system with thumb mode: => exception unaligned data abort pc : [<8f7a2b52>] lr : [<8f7ab1ef>] reloc pc : [<1780cb52>] lr : [<178151ef>] sp : 8ed8c3f8 ip : 8f7a2b4d fp : 00000002 r10: 8f7f8228 r9 : 8ed95ea8 r8 : 8ed99488 r7 : 8f7ab141 r6 : 00000000 r5 : 8ed8c3f9 r4 : 8f7f6390 r3 : 8ed9948c r2 : 00000001 r1 : 00000000 r0 : 8f7f6390 Flags: nzCv IRQs off FIQs off Mode SVC_32 (T) Code: 8f7e 466d f105 0501 (e9d5) 6700 The Flags line has '(T)' and in the Code line the output is in u16 groups. On a system without thumb mode: => exception breakpoint prefetch abort pc : [<7ff5a5c8>] lr : [<7ff675ec>] reloc pc : [<0000e5c8>] lr : [<0001b5ec>] sp : 7ee0ad80 ip : 7ff5a5cc fp : 7ff674cc r10: 00000002 r9 : 7ef0bed8 r8 : 7ffd6214 r7 : 7ef0e080 r6 : 00000000 r5 : 7ffd4090 r4 : 00000000 r3 : 7ef0e084 r2 : 00000001 r1 : 00000000 r0 : 7ffd4090 Flags: nzCv IRQs off FIQs off Mode SVC_32 Code: e1a0500d e2855001 e1c560d0 e3a00001 (e12fff1e) The Flags line does not show '(T)' and in the Code line the output is in u32 groups. Reported-by: Marek Vasut <marex@denx.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2019-07-16Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- Beelink-x2 STB support (Marcus) - H6 DDR3, LPDDR3 changes (Andre, Jernej) - H6 pin controller, USB PHY (Andre)
2019-07-16sunxi: H6: Enable USB for existing boardsAndre Przywara
So far USB was not enabled for the Allwinner H6 boards, as the PHY driver was not ready and the clock gates were missing. Since this is now fixed, let's add the PHY and the OHCI/EHCI drivers to the build, for all existing H6 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: move SUNXI_GPIO to KconfigAndre Przywara
Probably for no particular reason SUNXI_GPIO was still defined the "old way", in header files only. Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove another line from our dreadful config_whitelist.txt. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: Add DDR3 DRAM delay valuesJernej Skrabec
Add some basic line delay values to be used with DDR3 DRAM chips on some H6 TV boxes. Taken from a register dump after boot0 initialised the DRAM. Put them as the default delay values for DDR3 DRAM until we know better. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: Add DDR3-1333 timingsAndre Przywara
Add a routine to program the timing parameters for DDR3-1333 DRAM chips connected to the H6 DRAM controller. The values were gathered from doing back-calculations from a register dump, trying to match them up with the official JEDEC DDDR3 spec. If in doubt, the register dump values were taken for now, but the JEDEC recommendation were added as a comment. Many thanks to Jernej for contributing fixes! Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: Add DDR3 support to DRAM controller driverAndre Przywara
At the moment the H6 DRAM driver only supports LPDDR3 DRAM. Extend the driver to cover DDR3 DRAM as well. The changes are partly motivated by looking at the ZynqMP register documentation, partly by looking at register dumps after boot0/libdram has initialised the controller. Many thanks to Jernej for contributing some fixes! Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: move LPDDR3 timing definition into separate fileAndre Przywara
Currently the H6 DRAM driver only supports one kind of LPDDR3 DRAM. Split the timing parameters for this LPDDR3 configuration into a separate file, to allow selecting an alternative later at compile time (as the sunxi-dw driver does). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: DRAM: follow recommended PHY init algorithmAndre Przywara
The DRAM controller manual suggests to first program the PHY initialisation parameters to the PHY_PIR register, and then set bit 0 to trigger the initialisation. This is also used in boot0. Follow this recommendation by setting bit 0 in a separate step. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: DRAM: avoid memcpy() on MMIO registersAndre Przywara
Using memcpy() is, however tempting, not a good idea: It depends on the specific implementation of memcpy, also lacks barriers. In this particular case the first registers were written using 64-bit writes, and the last register using four separate single-byte writes. Replace the memcpy with a proper loop using the writel() accessor. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-15arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defsGrygorii Strashko
Add mcu cpsw nuss pinmux and phy defs required by cpsw. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15arm64: dts: ti: k3-am65: add mcu cpsw nodeGrygorii Strashko
Add mcu cpsw and its components along with scm_conf node to have ethernet functional. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15test: dm: add MDIO testAlex Marginean
A very simple test for DM_MDIO, mimicks a register write/read through the sandbox bus to a dummy PHY. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15sun8i: h3: Add support for the Beelink-x2 STBMarcus Cooper
The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot, 2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a dual colour LED and an optical S/PDIF connector. Linux commit details about the sun8i-h3-beelink-x2.dts sync: "ARM: dts: sun8i: h3: Add ethernet0 alias to Beelink X2" (sha1: cc4bddade114b696ab27c1a77cfc7040151306da) Signed-off-by: Marcus Cooper <codekipper@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-14Merge tag 'u-boot-stm32-20190712' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - syscon: add support for power off - stm32mp1: add op-tee config - stm32mp1: add specific commands: stboard and stm32key - add stm32 mailbox driver - solve many stm32 warnings when building with W=1 - update stm32 gpio driver
2019-07-13ARM: dts: logicpd som-lvs and torpedos: Shrink SPL DTBAdam Ford
Since we have limited resources in SPL, it is the best interest to keep the SPL as small as possible and that includes the DTB. There are a few items in the device tree that can be removed, because these boards don't use them. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-13ARM: dts: logicpd-som-lv: Resync with Kernel 5.1.9Adam Ford
The MMC card-detect pin was incorrectly defined which was fixed. This patch resync's the dts and removes the u-boot specific fix. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-13ARM: dts: da850: Resync with Linux 5.1.9Adam Ford
The da850.dtsi file had some changes. This patch pulls in the changes from Kernel 5.1.9 Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-13configs: Make USE_TINY_PRINTF depend on SPL||TPL and be defaultTom Rini
The USE_TINY_PRINTF symbol only changes things within SPL and TPL builds, so make it depend on that support. Next, make it default as within these cases we should rarely have need of more advanced print formats outside of the debug context. To do this, in a few cases we need to correct our Kconfig dependencies as we had cases of non-SPL targets select'ing this symbol. Finally, in the case of a few boards we really do need the full printf functionality. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-13ARM: am335x: Add phyCORE AM335x R2 supportNiel Fourie
Support for Phytech phyCORE AM335x R2 SOM (PCL060) on the Phytec phyBOARD-Wega AM335x. CPU : AM335X-GP rev 2.1 Model: Phytec AM335x phyBOARD-WEGA DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0 eth0: ethernet@4a100000 Working: - Eth0 - i2C - MMC/SD - NAND - UART - USB (host) Device trees were taken from Linux mainline: commit 37624b58542f ("Linux 5.1-rc7") Signed-off-by: Niel Fourie <lusus@denx.de> Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Marek Vasut <marex@denx.de>
2019-07-13ARM: legoev3: convert to driver modelDavid Lechner
This converts LEGO MINDSTORMS EV3 to the driver model. MMC, SERIAL, SPI and SPI_FLASH are converted. The device tree contains only the minimal nodes required by U-Boot since the size of U-Boot is limited to 256K on this device. Signed-off-by: David Lechner <david@lechnology.com>
2019-07-13ARM: dts: omap3-evm: Sync dts(i) files from Linux 5.1.5Derald D. Woods
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2019-07-12ARM: dts: stm32: Remove useless "st, stm32-gpio" compatible stringPatrice Chotard
Since pinctrl_stm32 driver update, each gpio bank is now binded by pinctrl driver. The compatible string "st,stm32-gpio" becomes useless, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: bsec: Fix warnings when compiling with W=1Patrick Delaunay
This patch solves the following warnings: arch/arm/mach-stm32mp/bsec.c: In function 'stm32mp_bsec_read': warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (offset >= STM32_BSEC_OTP_OFFSET) { ^~ arch/arm/mach-stm32mp/bsec.c: In function 'stm32mp_bsec_write': warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (offset >= STM32_BSEC_OTP_OFFSET) { ^~ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: Fix warnings when compiling with W=1Patrick Delaunay
This patch solves the following warnings: arch/arm/mach-stm32mp/cpu.c:378:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (instance > ARRAY_SIZE(serial_addr)) ^ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: activate OF_BOARD_SETUP and FDT_FIXUP_PARTITIONSPatrick Delaunay
Update kernel MTD partition in device tree with U-Boot information. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: add configuration op-teePatrick Delaunay
Add support of Trusted boot chain with OP-TEE - reserved 32MB at the end of the DDR for OP-TEE Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12ARM: dts: stm32mp1: sync device tree with v5.2-rc4Patrick Delaunay
Synchronize device tree with v5.2-rc4 label and update the associated u-boot dtsi. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
2019-07-12stm32mp1: key: add stm32key commandPatrick Delaunay
Add dedicated command to register in fuse a public hash key provided by keygen tool. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: update device tree with ETZPC statusPatrick Delaunay
U-Boot should disable nodes in device tree if needed according ETZPC status in ft_system_setup(). ETZPC itself use an array on addresses to do the match between the status bits and the node. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: update package information in device treePatrick Delaunay
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: export get_cpu_package functionPatrick Delaunay
Prepare update of package information update in Linux device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: syscon: remove stgenPatrick Delaunay
Reduce difference with kernel Linux device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12stm32mp1: syscon: remove etzpc supportPatrick Delaunay
Support for ETZPC is removed as this device is not present in Linux kernel device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12ARM: dts: stm32: Add ipcc mailbox support on stm32mp1Fabien Dessenne
Add IPCC mailbox support on stm32mp157 eval and disco boards. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-11Merge tag 'dm-pull-9jul19-take2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm - Sandbox improvements including .dts refactor - Minor tracing and PCI improvements - Various other minor fixes - Conversion of patman, dtoc and binman to support Python 3
2019-07-11Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- SPL SATA enhancements to allow booting from RAW SATA device needed for Clearfog (Baruch) - Enable SATA booting on Clearfog (Baruch) - Misc changes to Turris Omnia (Marek) - Enable CMD_BOOTZ and increase SYS_BOOTM_LEN on crs305-1g-4s (Luka) - Enable FIT support for db-xc3-24g4xg (Chris) - Enable DM_SPI on Keymile Kirkwood board with necessary changes for this (Pascal) - Set 38x and 39x AVS on lower frequency (Baruch)
2019-07-11Merge tag 'uniphier-v2019.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier UniPhier SoC updates for v2019.10 - import DT updates from Linux - add UniPhier SPI controller driver - make U-Boot image for 64bit SoCs position independent - tidy up various init code for next generation SoCs - misc cleanups
2019-07-11arm: mach-omap2: am33xx: Init pinmux before clockMarek Vasut
The board_early_init_f() inits clock before initing pinmux. However, the clock configuration code might need to adjust PMIC settings of a PMIC on I2C bus (e.g. board/ti/am335x/board.c does that). If the I2C bus pin muxing is not configured before attempting to communicate with the PMIC, the communication will silently fail and the prcm_init() may configure fast enough CPU clock that the default voltage provided by the PMIC would be insufficient and the platform would become unstable. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jean-Jacques Hiblot <jjhiblot@ti.com> Cc: Tom Rini <trini@konsulko.com>
2019-07-11configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMATTom Rini
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY). In a few places outside of cmd/ switch to using CONFIG_IS_ENABLED() to test what is set. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-11arm: spear: Return to BootROM if failing to boot from the main deviceMiquel Raynal
Overload the weak function board_boot_order() so that besides choosing the main boot device, we can fallback on USB boot by returning in the BootROM, eg. if the NOR flash is empty while it was the primary boot medium. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11arm: spear: Do not link the _main branchMiquel Raynal
The _main call is not supposed to return at all: don't link the branch. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11arm: spear: Support returning to BootROMMiquel Raynal
Implement the weak board_return_to_bootrom() function so that when enabling the spl_bootrom.c driver, one can make use of usbboot on spear platforms. All necessary information to return to the BootROM are stored in the BootROM's stack. The SPL stack pointer is reset so we save the BootROM's stack pointer into the SPL .data section. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11arm: spear: Simplify start.S organizationMiquel Raynal
There is no reason to do the few spear-related initialization, in a different procedure than 'reset'. Spare one branching and get a linear code flow by removing this indirection. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11arm: spear: Reference the link register with LR instead of R14Miquel Raynal
The link register is stored in R14. ARM assembly code allows to use the 'lr' name to reference it instead of 'r14' which is not very meaningful. Do the substitution to ease the reading. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Stefan Roese <sr@denx.de>
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