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2018-04-11ARM: rmobile: Add TPL support on R8A7791 M2 PorterMarek Vasut
Add and enable TPL on M2 Porter. The TPL must fit into 16 kiB due to the Gen2 BootROM restriction. The TPL is running from MERAM and is capable of performing the initial initialization of PFC, Clock, GPIO, LBSC, DBSC and QSPI NOR. DBSC is responsible for bringing up the DDR DRAM access. The TPL is capable of loading the next stage, U-Boot, from either SPI NOR or UART as a fallback. If either does provide a valid U-Boot uImage, the system stops, which allows the operator to load U-Boot ie. via JTAG and start it manually. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11ARM: rmobile: Do not init caches in TPL before DRAMMarek Vasut
Skip the cache initialization, which can be done later on in U-Boot proper, since this interferes with early DRAM initialization in TPL. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11ARM: Fix Makefile during SPL and TPL buildMarek Vasut
The tiny variants of memset and memcpy implementations can be built for TPL as well, check whether a TPL build is in progress and avoid including the default variants. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2018-04-10clk: add sandbox test for bulk APINeil Armstrong
This patch adds the bulk clock API tests for the sandbox test suite. It's very similar to the main test but only uses the _bulk() API and checks if the clocks are correctly enabled/disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10reset: add sandbox test for bulk APINeil Armstrong
This patch adds the bulk reset API tests for the sandbox test suite. Unlike the main test, it also check the "other" reset signal using the bulk API and checks if the resets are correctly asserted/deasserted. To allow the bulk API to work, and avoid changing the DT, the number of resets of the sandbox reset controller has been bumped to 101 for the "other" reset line to be valid. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10armv7m: disable icache before linux bootingPatrice Chotard
Similarly to ARMV7, on ARMV7M instruction cache memory needs to be disabled before running linux kernel to avoid kernel to be stuck. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-09Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx changes for v2018.05-rc2 - Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL init for zcu102 revA - Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX and zc1751-dc3 - Net fixes - xlnx,phy-type - 64bit axi ethernet support - arasan: Fix nand write issue - fpga fixes - Maintainer file updates
2018-04-09Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2018-04-09 Highlights this time around: - Lots of minor spec compliance fixes - Support full range of GOP BLT commands - More fine grained error checking - Network fixes (init, DP) - Lots of other bug fixes...
2018-04-09arm64: zynqmp: Add support for Xilinx zcu111-revAMichal Simek
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for Xilinx zcu106-revAMichal Simek
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zcu104 customer boardMichal Simek
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with some differences. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zc12xx boardsMichal Simek
Add support for zc12xx boards. All of them are internal boards for silicon validation and share very similar base platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zc1751 dc3Michal Simek
zc1751 is based board with dc3 extenstion card which is used for silicon validation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zcu100 aka Ultra96 boardMichal Simek
Add support for Xilinx zcu100. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Get 200MHz clock early for MMCMichal Simek
SPL MMC boot requires to have clock early. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove pinctrl settingsMichal Simek
This part hasn't been pushed to mainline yet that's why remove it. The patch can be reverted in future when this is pushed there. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09arm64: zynqmp: Remove power domain descriptionMichal Simek
This part hasn't been pushed to mainline yet that's why remove it. The patch can be reverted in future when this is pushed there. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09fpga: zynqmp: Update zynqmp_load() as per latest xilfpgaSiva Durga Prasad Paladugu
Latest xilfpga expects to set BIT5 of flags for nonsecure bitsream and also expects length in bytes instead of words This patch does the same. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09arm: zynq: Use fixed partitions for spi flash for zc770 xm010Michal Simek
Sync with mainline. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Fix eeprom dt nodesMichal Simek
- Use eeprom for node name - Use atmel compatible string instead of at. - Add missing labels Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Add generic compatible string for I2C EEPROMJavier Martinez Canillas
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Use i2c-mux instead of i2cswitch for pca9548Michal Simek
i2c muxes should described like this. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Sync up licenses with mainline kernelMichal Simek
Use different location for SPDX line. Also update dates for new mainline DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Remove 0x prefixes from cc108Michal Simek
The patch fixing issues reported by DTC: zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have leading "0x" Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove double spaces from dts fileMichal Simek
There is no reason to have double spaces for indentation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add silabs prefix to u69 for zcu102Michal Simek
Add vendor prefix to si5341. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove number from clock-generator node nameMichal Simek
There shouldn't be a number appended based on spec. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove u-boot commands from dts filesMichal Simek
U-Boot commands shouldn't be the part of kernel DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Update sd properties for dc5Srinivas Goud
This patch adds no-1-8-v below properties to sd node for dc5 board dts. Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Enable ttcs for zc1751 dc5Michal Simek
Enable TTCs for this target as is done in Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add eeprom reference to eeprom nodesMichal Simek
eeprom can contain information which can be used by nvmem drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use atmel prefix instead of atMichal Simek
This changes was done in mainline and this patch is just following it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Fix spi flash partition definition for zc1751 dc2Michal Simek
Using different node name and label partitions as data. Also use latest compatible strings based on mainline review. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use s/_/-/g in node name for zcu102 rev1.0Michal Simek
Follow spec for node names. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use keycode from input/input.hMichal Simek
Instead of hardcoding numbers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove additional comments from dts filesMichal Simek
Remove additional comments which were removed as the part of upstreaming. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Sync up license with mainline kernelMichal Simek
Mainline Linux kernel has adopted SPDX header license in a different format then was used before. This patch is syncing it up. Also update years in License text and remove Nathalie's email because it is no longer valid. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use i2c-mux instead of i2cswitch insteadMichal Simek
Based on review from mainline i2c-mux is standard name for i2c switches. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use maxim prefix for all maxim chipsMichal Simek
Use vendor prefix for Maxim chips. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Sync alignment with mainlineMichal Simek
Sync pcie and lpd_dma nodes with mainline version. Incorrect locations are causing diff in statistics that's why synchronizations are needed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09efi_loader: correctly set the machine type in the PE headerHeinrich Schuchardt
The portable executable header has a field describing the machine type. The machine type should match the binary. So on i386 we should use IMAGE_FILE_MACHINE_I386 and on x86_64 we should use IMAGE_FILE_MACHINE_AMD64. The actual value is issued by the objcopy command invoked in scripts/Makefile.lib in depdendence of the value of EFI_TARGET. The value is used both for EFI_STUB and for EFI_LOADER. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-09arm: zynq: Handle ENXIO error return value properlyMichal Simek
zynq_clk_get_rate() is also returning ENXIO which is not handled now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Rename dts for Z-turn boardAnton Gerasimov
Makes naming in line with other Zynq boards. Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Update dts for Z-turn boardAnton Gerasimov
Delete devices implemented in PL, stylistic changes. Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-08net: Move enetaddr env access code to env config instead of net configAlex Kiernan
In order that we can use eth_env_* even when CONFIG_NET isn't set, move these functions to environment code from net code. This fixes failures such as: board/ti/am335x/built-in.o: In function `board_late_init': board/ti/am335x/board.c:752: undefined reference to `eth_env_set_enetaddr' u-boot/board/ti/am335x/board.c:766: undefined reference to `eth_env_set_enetaddr' which caters for use cases such as: commit f411b5cca48f ("board: am335x: Always set eth/eth1addr environment variable") when Ethernet is required in Linux, but not U-Boot. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-06ARM: dts: Add new "generic" am4372 device tree file.Vignesh R
With U-boot runtime board detect for DTB selection a "default" dtb needs to be created. This will be used temporarily until the "proper" dtb is selected. Also, add -u-boot.dtsi for AM437x SK and IDK to enable I2C for board detection via DM_I2C. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06stm32mp: handle SYSRESETPatrick Delaunay
Add support of sysreset with generic driver "syscon-reboot" provided by RCC, for U-boot and for SPL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp: add syscon for STGENPatrick Delaunay
Add STGEN as SYSCON device: allow access to device address defined in device tree Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: change STGEN clock source to HSEPatrick Delaunay
No more use static frequency HSI = 64MHz for STGEN clock but HSE (with higher accurency) by default. Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency is provided at boot by BootRom and cp15 cntfrq and modified during clock tree initialization if needed. When HSI is no more used by any device, this internal oscillator can be switched off to reduce consumption. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06arm: timer: get frequency for arch timer armv7 in cp15 cntfrqPatrick Delaunay
Manage dynamic value for armv7 arch clock timer, when CONFIG_SYS_HZ_CLOCK is not defined. Get frequency from CP15 cntfrq information, initialized for example by first boot stage, clock driver or by BootRom. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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