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2018-04-09arm64: zynqmp: Add support for Xilinx zcu106-revAMichal Simek
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zcu104 customer boardMichal Simek
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with some differences. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zc12xx boardsMichal Simek
Add support for zc12xx boards. All of them are internal boards for silicon validation and share very similar base platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zc1751 dc3Michal Simek
zc1751 is based board with dc3 extenstion card which is used for silicon validation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add support for zcu100 aka Ultra96 boardMichal Simek
Add support for Xilinx zcu100. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Get 200MHz clock early for MMCMichal Simek
SPL MMC boot requires to have clock early. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove pinctrl settingsMichal Simek
This part hasn't been pushed to mainline yet that's why remove it. The patch can be reverted in future when this is pushed there. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09arm64: zynqmp: Remove power domain descriptionMichal Simek
This part hasn't been pushed to mainline yet that's why remove it. The patch can be reverted in future when this is pushed there. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09fpga: zynqmp: Update zynqmp_load() as per latest xilfpgaSiva Durga Prasad Paladugu
Latest xilfpga expects to set BIT5 of flags for nonsecure bitsream and also expects length in bytes instead of words This patch does the same. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09arm: zynq: Use fixed partitions for spi flash for zc770 xm010Michal Simek
Sync with mainline. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Fix eeprom dt nodesMichal Simek
- Use eeprom for node name - Use atmel compatible string instead of at. - Add missing labels Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Add generic compatible string for I2C EEPROMJavier Martinez Canillas
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Use i2c-mux instead of i2cswitch for pca9548Michal Simek
i2c muxes should described like this. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Sync up licenses with mainline kernelMichal Simek
Use different location for SPDX line. Also update dates for new mainline DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Remove 0x prefixes from cc108Michal Simek
The patch fixing issues reported by DTC: zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have leading "0x" Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove double spaces from dts fileMichal Simek
There is no reason to have double spaces for indentation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add silabs prefix to u69 for zcu102Michal Simek
Add vendor prefix to si5341. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove number from clock-generator node nameMichal Simek
There shouldn't be a number appended based on spec. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove u-boot commands from dts filesMichal Simek
U-Boot commands shouldn't be the part of kernel DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Update sd properties for dc5Srinivas Goud
This patch adds no-1-8-v below properties to sd node for dc5 board dts. Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Enable ttcs for zc1751 dc5Michal Simek
Enable TTCs for this target as is done in Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Add eeprom reference to eeprom nodesMichal Simek
eeprom can contain information which can be used by nvmem drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use atmel prefix instead of atMichal Simek
This changes was done in mainline and this patch is just following it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Fix spi flash partition definition for zc1751 dc2Michal Simek
Using different node name and label partitions as data. Also use latest compatible strings based on mainline review. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use s/_/-/g in node name for zcu102 rev1.0Michal Simek
Follow spec for node names. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use keycode from input/input.hMichal Simek
Instead of hardcoding numbers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove additional comments from dts filesMichal Simek
Remove additional comments which were removed as the part of upstreaming. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Sync up license with mainline kernelMichal Simek
Mainline Linux kernel has adopted SPDX header license in a different format then was used before. This patch is syncing it up. Also update years in License text and remove Nathalie's email because it is no longer valid. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use i2c-mux instead of i2cswitch insteadMichal Simek
Based on review from mainline i2c-mux is standard name for i2c switches. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Use maxim prefix for all maxim chipsMichal Simek
Use vendor prefix for Maxim chips. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Sync alignment with mainlineMichal Simek
Sync pcie and lpd_dma nodes with mainline version. Incorrect locations are causing diff in statistics that's why synchronizations are needed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Handle ENXIO error return value properlyMichal Simek
zynq_clk_get_rate() is also returning ENXIO which is not handled now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Rename dts for Z-turn boardAnton Gerasimov
Makes naming in line with other Zynq boards. Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09ARM: dts: zynq: Update dts for Z-turn boardAnton Gerasimov
Delete devices implemented in PL, stylistic changes. Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-06ARM: dts: Add new "generic" am4372 device tree file.Vignesh R
With U-boot runtime board detect for DTB selection a "default" dtb needs to be created. This will be used temporarily until the "proper" dtb is selected. Also, add -u-boot.dtsi for AM437x SK and IDK to enable I2C for board detection via DM_I2C. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06stm32mp: handle SYSRESETPatrick Delaunay
Add support of sysreset with generic driver "syscon-reboot" provided by RCC, for U-boot and for SPL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp: add syscon for STGENPatrick Delaunay
Add STGEN as SYSCON device: allow access to device address defined in device tree Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: change STGEN clock source to HSEPatrick Delaunay
No more use static frequency HSI = 64MHz for STGEN clock but HSE (with higher accurency) by default. Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency is provided at boot by BootRom and cp15 cntfrq and modified during clock tree initialization if needed. When HSI is no more used by any device, this internal oscillator can be switched off to reduce consumption. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06arm: timer: get frequency for arch timer armv7 in cp15 cntfrqPatrick Delaunay
Manage dynamic value for armv7 arch clock timer, when CONFIG_SYS_HZ_CLOCK is not defined. Get frequency from CP15 cntfrq information, initialized for example by first boot stage, clock driver or by BootRom. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: select boot device and partitionPatrick Delaunay
Bootrom loads SPL from SDCARD or eMMC according BootPin selection. Then SPL loads U-Boot on the same mmc device with the following predefined GPT partitioning: on SDCARD: gpt partitioning 1: SPL 2: SPL#2 3: U-Boot 4: bootable partition on eMMC: The 2 boot partitions are used for SPL (2 copy) boot1: SPL boot2: SPL#2 The user partition use gpt partitioning 1: U-Boot 2: bootable partition This patch select the correct SPL partition (3 for SDCARD on mmc0 and 1 for eMMC on mmc1) according the BootRom information saved in TAMP register and based on configuration flasg: - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new) => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot And the correct boot_targets is selected according the environment variables boot_device and boot_instance, with preboot command, to search the bootable partition with kernel on this device (generic distro support). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: get boot mode from BootRomPatrick Delaunay
SPL copy BootRom boot mode information in TAMP register 21. This TAMP register information is used after relocation to set 2 env variables - boot_device - boot_instance Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp1: add eMMC support for ED1Patrick Delaunay
Add command GPT support Add EMMC boot support Add the 2 other SDMMC instances for ED1: - SDMMC2 = mmc 1, eMMC on the ED1 board - SDMMC3 = extension connector, deactivated by default Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp: add check of cpu identifierPatrick Delaunay
Add support of DBGMCU_IDC for cpu identifier and revision Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06stm32mp: cleanup cpu.cPatrick Delaunay
Move all defines at the beginning of the file Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06ARM: am33xx: Inhibit re-initialization of DDR during RTC-onlyRuss Dill
This inhibits the re-inititialization of DDR during an RTC-only resume. If this is not done, an L3 NOC error is produced as the DDR gets accessed before the re-init has time to complete. Tested on AM437x GP EVM. Signed-off-by: Russ Dill <Russ.Dill@ti.com> [j-keerthy@ti.com Ported to Latest Master branch] Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-04-06am43xx: Do not allow EMIF to control DDR_RESET in rtconly configDave Gerlach
Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for am43xx_evm_rtconly_config. Without this DDR is unstable and can become corrupted after multiple iterations of RTC+DDR mode. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [j-keerthy@ti.com Ported to latest master branch] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06ARM: AM43xx: Add support for RTC only + DDR in self-refresh modeTero Kristo
Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers for wakeup from RTC-only mode with DDR in self-refresh. Parse these registers during SPL boot and jump to the kernel resume vector if the device is waking up from RTC-only modewith DDR in Self-refresh. The RTC scratch register layout used is: SCRATCH0 : bits00-31 : kernel resume address SCRATCH1 : bits00-15 : RTC magic value used to detect valid config SCRATCH1 : bits16-31 : board type information populated by bootloader During the normal boot path the SCRATCH1 : bits16-31 are updated with the eeprom read board type data. In the rtc_only boot path the rtc scratchpad register is read and the board type is determined and correspondingly ddr dpll parameters are set. This is done so as to avoid costly i2c read to eeprom. RTC-only +DRR in self-refresh mode support is currently only enabled for am43xx_evm_rtconly_config. This is not to be used with epos evm builds. Signed-off-by: Tero Kristo <t-kristo@ti.com> [j-keerthy@ti.com Rebased to latest u-boot master branch] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06powerpc: mpc8xx: move watchdog into drivers/watchdogChristophe Leroy
In preparation of DM watchdog, move basic actions into drivers/watchdog Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: cleaning up watchdogChristophe Leroy
In preparation of migration to DM watchdog, clean up a bit. The 8xx watchdog really is a HW watchdog, so declare it as is then it goes through Kconfig And the watchdog reset doesn't mind getting interrupted, so no need to disable interrupts Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: refactorise reginfoChristophe Leroy
reginfo is redundant with some of the commands in immap.c, so move reginfo into that file and remove duplicated info. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
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