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2018-11-26ARM: meson: Add boot device discoveryNeil Armstrong
The Amlogic Meson SoCs ROM supports a boot over USB with a custom protocol. When no other boot medium are available (or by forcing the USB mode), the ROM sets the primary USB port as device mode and waits for a Host to enumerate. When enumerated, a custom protocol described at [1] permits writing to memory and execute some specific FIP init code to run the loaded Arm Trusted Firmware BL2 and BL3 stages before running the BL33 stage. In this mode, we can load different binaries that can be used by U-boot like a script image file. This adds support for a custom USB boot stage only available when the boot mode is USB and the script file at a pre-defined address is valid. This support was heavily copied from the Sunxi Allwinner FEL U-Boot support. The tool pyamlboot described at [2], permits using this boot mode on boards exposing the first USB port, either as OTG or Host port. [1] https://github.com/superna9999/pyamlboot/blob/master/PROTOCOL.md [2] https://github.com/superna9999/pyamlboot/blob/master/README.md Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26ARM: meson: factorize common code out amlogic's boardsJerome Brunet
Now we have moved all the Amlogic board support to common generic board code, we can move the identical board_init() and ft_board_setup() functions to weak functions into the board-common mach-meson file. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26board: amlogic: add support for S400 boardNeil Armstrong
The S400 board is the Amlogic AXG SoC reference board including : - Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz - 1GB DDR4 SDRAM - 10/100 Ethernet - 2 x USB 2.0 Host - eMMC - Infrared receiver - SDIO WiFi Module - MIPI DSI Connector - Audio HAT Connector - PCI-E M.2 Connectors Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26clk: Add clock driver for AXGNeil Armstrong
This patch adds a minimal clock driver for the Amlogic AXG SoC to handle the basic gates and PLLs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26ARM: dts: Sync Amlogic Meson AXG DT from Linux 4.20-rc1Neil Armstrong
Synchronize the Amlogic AXG Device Tree files and bindings include from the recent Linux 4.20-rc1, because it includes patches fixing support for U-boot. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26ARM: meson: Add support for AXG familyNeil Armstrong
This patch adds support for the Amlogic AXG SoC, which is very close from the Amlogic GXL SoCs with : - Same 4xCortex-A53 CPUs but clocked at 1.2GHZ max - DDR Interface limited to DDR4 16bit - The whole physical register address space has been moved to 0xfxxxxxxx - The pinctrl setup has changed - The clock tree is different enough to use a different driver Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26ARM: meson: rework soc arch file to prepare for new SoCJerome Brunet
We are about to add support for the Amlogic AXG SoC. While very close to the Gx SoC family, we will need to handle a few thing which are different in this SoC. Rework the meson arch directory to prepare for this. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26ARM: rework amlogic configurationJerome Brunet
Rework the board SYS_BOARD, SYS_VENDOR and SYS_CONFIG_NAME setup by moving the board Kconfig into the mach-meson Kconfig to make it easier to add new boards for a SoC architecture and add a custom config header or custom board handler for a platform. This drops the board CONFIGs and the duplicate boards configs headers in favor of a single meson64.h config header. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26board: amlogic: factorise gxbb boardsJerome Brunet
The nanopi-k2 and the odroid-c2 are similar enough to be supported by the same u-boot board. This change use odroid-c2 u-boot board for the nanopi-k2 as well. Dedicated defconfig are kept to customize the names and device tree. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26board: amlogic: move khadas-vim2 as q200 ref boardNeil Armstrong
The Khadas vim2 derive from amlogic s912 reference design (Q200). This patch moves the khadas-vim2 board support to a generic Q200 board, while keeping a dedicated defconfig to customize the names and device tree. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26board: amlogic: remove p212 derivativesJerome Brunet
The Khadas vim and the libretech aml-s905x-cc (aka Potato) derive from amlogic s905x reference design (P212). All the code in these board is a copy/paste from the p212, which is tedious to maintain. This change use p212 u-boot board for all these boards, while keeping a dedicated defconfig to customize the names and device tree. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26ARM: meson: clean-up platform selectionJerome Brunet
Even if multiple board are selected through Kconfig, u-boot will only compile one. This makes sense since compiling these targets will export global symbols, such as board_init() The change rework amlogic Kconfig so only one board may be selected at a time Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-20sf: Add a method to obtain the block-protect settingSimon Glass
It is useful to obtain the block-protect setting of the SPI flash, so we know whether it is fully open or (perhaps partially) write-protected. Add a method for this. Update the sandbox driver to process this operation and add a test. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20misc: Update read() and write() methods to return bytes xferedSimon Glass
At present these functions return 0 on success. For some devices we want to know how many bytes were transferred. It seems useful to adjust the API to be more like the POSIX read() and write() functions. Update these two methods, a test and all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-20sandbox: Update some drivers to work in SPL/TPLSimon Glass
At present sandbox drivers are mostly not used before relocation. Some of these are needed by Chromium OS verified boot, since it uses sandbox TPL, so update them accordingly. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20sandbox: Add a function to read a host fileSimon Glass
Add a way to read a file from the host filesystem. This can be useful for reading test data, for example. Also fix up the writing function which was not the right version, and drop the debugging lines. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20sandbox: remove stray DEBUGHeinrich Schuchardt
DEBUG should not be defined in production code. Change printf() to debug() where this writes a debug message. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-20ARM: mvebu: dts: add Clearfog GT-8KRabeeh Khoury
The SolidRun Clearfog GT-8K is based on Armada 8040. https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k The config file is identical to the Macchiatobin one (mvebu_mcbin-88f8040_defconfig) with only the default device-tree changed. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20arm64: mvebu: a8k: autodetect RAM sizeBaruch Siach
Some Armada 8K boards like Macchiatobin and Clearfog GT-8K use RAM from external DIMM. Hard coding the RAM size in the device-tree is not convenient. Fortunately, the ATF that initializes the RAM knows the size of RAM, and U-Boot can query the ATF using a SMC call. The ATF maps the lower 3G of RAM starting at address 0. Higher RAM is mapped at 4G. This leaves a 1G hole between 3G and 4G for IO peripherals. Use a second bi_dram[] entry to describe the higher RAM area. As a result, CONFIG_NR_DRAM_BANKS must be set to 2 to use more than 3GB RAM. This code in this commit is mostly taken from downstream Marvell U-Boot code by Grzegorz Jaszczyk. Cc: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20linux/sizes.h: sync from kernelBaruch Siach
The kernel added SZ_4G macro in commit f2b9ba871b (arm64/kernel: kaslr: reduce module randomization range to 4 GB). Include linux/const.h for the _AC macro. Drop a local SZ_4G definition in tegra code. Cc: Tom Warren <twarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20MIPS: drop asm/const.hBaruch Siach
Commit 86f21c96f467368 (mips: Use common _AC macro now.) removed the _AC definition from const.h. All other macros defined in const.h are not used anywhere, and there is now no user of this header. Remove this header. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-20Use _AC and UL macros from linux/const.hBaruch Siach
Drop the _AC and UL macros from common.h. Linux headers is the original source of this macro, so keep its definition in the same header. Update existing users of these macros to include const.h directly. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Rick Chen <rick@andestech.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-18MIPS: fix linking of standalone programsDaniel Schwierzeck
Use the global MIPS specific u-boot.lds for linking standalone programs instead of the outdated ones in examples/standalone/. Also pass --gc-sections in LDFLAGS_STANDALONE to optimize the size of standalone programs. Finally remove the deprecated config.mk files in arch/mips/cpu/mips[32,64]/. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18Kbuild: add LDFLAGS_STANDALONEDaniel Schwierzeck
Introduce a new Makefile variable for passing LDFLAGS to standalone programs. Currently the variable CONFIG_STANDALONE_LOAD_ADDR is misued on some archs to pass a specific linker script. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-18mips: mt76xx: linkit-smart-7688: Misc updates to dts/config/defconfigStefan Roese
These misc updates include the following changes: - Change baudrate from 57600 to 115200 - Enable MIPS_BOOT_CMDLINE_LEGACY - Enable FIT support - Enable ethernet support - Enable SPI support - Enable GPIO support - Change max image size from 0x40000 to 0x80000 A note about the baudrate change: The original Mediatek U-Boot version used 57600 baud. Lets move to a more common and faster speed of 115200 baud. And remove the "console=" property from the DT as its not needed. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: gardena-smart-gateway: Misc updates to dts/config/defconfigStefan Roese
These misc updates include the following changes: - Change baudrate from 57600 to 115200 - Enable MIPS_BOOT_CMDLINE_LEGACY - Enable FIT support - Enable ethernet support - Enable SPI NOR and NAND support - Change MTD_UBI_BEB_LIMIT to 22 - Enable MTD Support - Enable GPIO support - Enable watchdog support - Enable bootcounter support - Enable version variable - Change max image size from 0x80000 to 0xa0000 - Change SYS_MALLOC_LEN to 16MiB (because of UBI/UBIFS) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: gardena-smart-gateway: Add board_late_init() to set LED def stateStefan Roese
This is needed to set the LEDs automatically to a default state, as configured in the dts. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: gardena-smart-gateway: Add LEDs to dtsStefan Roese
Add the available LEDs to the DTS file so that they can be used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Enable watchdog supportStefan Roese
This patch enables and starts the watchdog on the MT7620 platform. Currently the WD timeout is configured to 60 seconds. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [fixed build error due to missing function prototype arch_misc_init] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Kconfig: Add ethernet and GPIO supportStefan Roese
Imply DM_ETH and DM_GPIO for ARCH_MT7620, as this platform now supports ethernet and GPIO as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Add watchdog DT node to mt7628a.dtsiStefan Roese
Add the watchdog DT node to the DTS file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Add GPIO DT nodes to mt7628a.dtsiStefan Roese
Add the GPIO DT nodes to the DTS file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: Add ethernet DT node to mt7628a.dtsiStefan Roese
Add the ethernet DT node to the DTS file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR initStefan Roese
This fixes an issue which has been noticed on the Gardena board, with the watchdog enabled, where the watdchdog reset (after a system hang) did result in reporting of 2.9 GiB and a hang after this. With this patch applied the memory controller is correctly reset and initialized again even after a watchdog reset. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-16armv7r: dts: am654: Add initial supportLokesh Vutla
Add R5 specific dts for am654-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-11-16arm: dts: k3: Sync dts from LinuxLokesh Vutla
Sync the k3-am654 specific dts files from Linux next with tag 20181019. This changes are in queue for Linux v4.20-rc1 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support for triggering ddr init from SPLLokesh Vutla
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support to start ATF from R5 SPLLokesh Vutla
Considering the boot time requirements, Cortex-A core should be able to start immediately after SPL on R5. Add support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support for generating build targetsLokesh Vutla
Update Makefiles to generate: - tiboot3.bin: Image format that can be processed by ROM. Below is the tiboot3.bin image format that is required by ROM: _______________________ | X509 | | Certificate | | ____________________ | | | | | | | u-boot-spl.bin | | | | | | | |___________________| | |_______________________| Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16armv7R: K3: am654: Enable MPU regionsLokesh Vutla
Enable MPU regions for AM654 evm: - Region0: 0x00000000 - 0xFFFFFFFF: Device memory, not executable - Region1: 0x41c00000 - 0x42400000: Normal, executable, WB, Write alloc - Region2: 0x80000000 - 0xFFFFFFFF: Normal, executable, WB, Write alloc - region3-15: Disabled With this dcache can be enabled either in SPL or U-Boot. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16ram: Introduce K3 AM654 DDR Sub System driverLokesh Vutla
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
2018-11-16arm: Make arch specific memcpy thumb-safe.Klaus Goger
The current arch implementation of memcpy cannot be called from thumb code, because it does not use bx instructions on return. This patch addresses that. Note, that this patch does not touch the hot loop of memcpy, so performance is not affected. Tested on MXS (arm926ejs) with and without thumb-mode enabled. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2018-11-16test/py: test pinmux commandPatrice Chotard
Add pinmux test which test the following commands: - pinmux list - pinmux dev - pinmux status Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Mark some tests as sandbox-centric] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-16ARM: DTS: Resync am3517-evm.dts with Linux 4.19Adam Ford
Some minor changes have been made to the AM3517-evm and the underlying am3517.dtsi files. This patch re-sync's the DTS and DTSI files with Linux. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16bcm968580xref: add initial supportPhilippe Reynes
This add the initial support of the broadcom reference board bcm968580xref with a bcm6858 SoC. This board has 512 MB of ram, 256 MB of flash (nand), 2 usb port, 1 uart, 4 ethernet ports (LAN), 1 ethernet port (WAN). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16bcm6858: add initial supportPhilippe Reynes
This add the initial support of the broadcom bcm6858 SoC family, only the cpu, dram and uart are supported. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16arm: at91: wdt: Convert watchdog driver to dm/dtPrasanthi Chellakumar
Convert the Watchdog driver for AT91SAM9x processors to support the driver model and device tree. Changes "CONFIG_AT91SAM9_WATCHDOG" to new "CONFIG_WDT_AT91" Kconfig option. Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
2018-11-16ARMv8: SError exception handling in PSCI exception vectorsChee Hong Ang
Allow platform vendors to handle SError interrupt exceptions from ARMv8 PSCI exception vectors by overriding this weak function 'plat_error_handler'. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2018-11-16ARMv8: Add EL3 exception handling for ARMv8's KconfigChee Hong Ang
Kconfig option to allow all External Abort and SError exception taken to EL3. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2018-11-16ARMv8: Enable all asynchronous abort exceptions taken to EL3Chee Hong Ang
Allow EL3 to handle all the External Abort and SError interrupt exception occur in all exception levels. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>