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2019-04-12Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2019-04-12Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini
2019-04-12Merge git://git.denx.de/u-boot-marvellTom Rini
- Misc dts files sync'ed with Linux version (Chris) - Orion watchdog fix (Chris) - kwbimage changed to also support Marvell bin_hdr binary (Chris) - Add DM support to enable CONFIG_BLK for sata_mv (Stefan) - Enable BLK on multiple platforms (Stefan) - Misc minor fixes to AXP theadorable board (Stefan) - Correct logic for DM_SCSI + unconverted drivers check (stefan) - Misc changes to kirkwood to enable DM_USB here (Chris) - Change ahci_mvebu to enable usage on A38x (Baruch) - Update the kirkwood entry in git-mailrc (Baruch) - Misc minor improvements (turris, documentation) (Baruch) - Enhance sata_mv to support Kirkwood as well (Michael) - Add wdt command (Michael) - Add Marvell integrated CPUs (MSYS) support with DB-XC3-24G4XG board support (Chris)
2019-04-12ARM: dts: dra71-evm: Correct evm_sd regulator max voltageFaiz Abbas
Correct vpo_sd_1v8_3v3 regulator max voltage to 3.3V Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Keerthy <j-keerthy@ti.com>
2019-04-12ARM: dts: dra7: Change pbias voltage to 3.3VFaiz Abbas
As per recent TRM[1], PBIAS cell on dra7 devices supports 3.3v and not 3.0v as documented earlier. Update PBIAS regulator max voltage and the voltage written in the driver to reflect this. [1] http://www.ti.com/lit/pdf/sprui30 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-04-12ti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common placeTom Rini
The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific notion but rather "where is our previous stage loaded in memory?" option. Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for our HS builds that are not using SPL anyhow. Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Andrew F. Davis <afd@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com?
2019-04-12armv7R: K3: am654: Trigger panic on DDR init failuresAndreas Dannenberg
When initializing DDR from R5 SPL trigger U-Boot's panic facility rather than simply returning from the board init function as there is little point continuing code execution. Further, as panic implies a board reset, so using it might potentially allow to recover from this error in certain cases such as when the init failure was caused by a temporary glitch of some sorts. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-12arm: k3: Add support for updating msmc dt nodeLokesh Vutla
Certain parts of msmc sram can be used by DMSC or can be marked as L3 cache. Since the available size can vary, changing DT every time the size varies might be painful. So, query this information using TISCI cmd and fixup the DT for kernel. Fixing up DT does the following: - Create a sram node if not available - update the reg property with available size - update ranges property - loop through available sub nodes and delete it if: - mentioned size is out if available range - subnode represents l3 cache or dmsc usage. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-12arm: k3: Add a wrapper to get tisci handleLokesh Vutla
Create a wrapper to get the ti sci handle. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-12ARM: davinci: da850evm: Enable SPL_OF_CONTROL without PLATDATAAdam Ford
With the memory mapping giving us some more avialable RAM, this updates the da850-evm-u-boot.dtsi to include the serial port, SPI and Flash nodes along with some dependent nodes in the SPL dtb. This also removes the platform data initialization code for the serial port and SPI Flash. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-04-12am335x, guardian: Add support for the bosch guardian boardSjoerd Simons
Add support for the Bosch Guardian board. CPU : AM335X-GP rev 2.1 Model: Bosch AM335x Guardian I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Felix Brack <fb@ltec.ch>
2019-04-12Add support for the MT41K128M16JT125K memory modulesSjoerd Simons
Add configuration for the MT41K128M16JT125K memory modules as used on the Bosch Guardian device. Based on a patch by: Govindaraji Sivanantham <Govindaraji.Sivanantham@in.bosch.com> Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> [checkpatch.pl cleanup by Martyn Welch] Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-04-12ARM: dts: k2g-ice: add dt node for netcpMurali Karicheri
This patch adds dt node for DP83867 phy used on K2G ICE board and also enable netcp device nodes for the board. EVM hardware spec recommends to add 0.25 nsec delay in the tx direction and 2.25 nsec delay in the rx direction for internal delay in the clock path to be on the safer side. The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode 1. Unfortunately, the phy data manual disallows this. Add ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to enable workaround suggested for this incorrect strap setting. This ensures proper operation of this PHY. The dts bindings are kept in sync with that from 4.14.y linux kernel. This required the pinmux device related bindings to be commented out to allow for compilation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12ARM: dts: k2g-evm: remove unused phy-mode property from phy nodeMurali Karicheri
This patch removes the unused phy-mode property from the phy dt node. On K2G, currently link-interface determines if phy is used or not and is already set to use rgmii. So this is not needed. Besides phy-mode should be added to slave interface configuration of the cpsw driver, not in the phy node. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12ARM: k2g: add a workaround to reset the phyMurali Karicheri
This patch adds a workaround to reset the phy one time during boot using GPIO0 pin 10 to make sure, the Phy latches the configuration from the input pins correctly. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12ARM: k2g-ice: Add pinmux support for rgmii interfaceMurali Karicheri
This add pinmux configuration for rgmii interface so that network driver can be supported on K2G ICE boards. The pinmux configurations for this are generated using the pinmux tool at https://dev.ti.com/pinmux/app.html#/default As this required some BUFFER_CLASS definitions, same is re-used from the linux defnitions in include/dt-bindings/pinctrl/keystone.h Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-12ARM: mvebu: sync db-88f6820-amc.dts with Linux v5.0Chris Packham
Sync armada-385-db-88f6820-amc.dts with Linux. Retain the u-boot,dm-pre-reloc and nand differences. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: mvebu: rename armada-385-amc.dts to armada-385-db-88f6820-amc.dtsChris Packham
This board was added to u-boot first but the Linux maintainers requested a more descriptive name. Rename the file to match the Linux usage and update the board defconfig. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: kirkwood: remove obsolete call to icache_enableLeigh Brown
Commit 93b283d49f93 ("ARM: CPU: arm926ejs: Consolidate cache routines to common file") changed cache setup for Kirkwood such that icache_enable() is now called from enable_caches() which is called from initr_caches() which is in the list of functions in init_sequence_r[] prior to arch_misc_init(). This means the call to icache_enable() in arch_misc_init() is no longer required, so remove it. Signed-off-by: Leigh Brown <leigh@solinno.co.uk> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: mvebu: Add DB-XC3-24G4XG boardChris Packham
The DB-XC3-24G4XG is a switch development board from Marvell. It can either use and external CPU card such as the db-88f6820-amc or the internal CPU that is integrated into the switch. Add support for running U-Boot on the internal CPU and enable the USB, SPI and NAND peripherals. For now this needs the bin_hdr from the Marvell U-Boot for this board. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: mvebu: NAND clock support for MSYS devicesChris Packham
One difference with the integrated CPUs is that they use a different clock control block to the Armada devices. Update mvebu_get_nand_clock() accordingly. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: mvebu: Add Marvell's integrated CPUsChris Packham
Marvell's switch chips with integrated CPUs (collectively referred to as MSYS) share common ancestry with the Armada SoCs. Some of the IP blocks (e.g. xor) are located at different addresses and DFX server exists as a separate target on the MBUS (on Armada-38x it's just part of the core complex registers). Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: mvebu: Fix Kconfig dependency warningsStefan Roese
We now have MEVBU boards without SPL support (e.g. db-xc3-24g4xg). Because of this, a new compile time warning from Kconfig is show: WARNING: unmet direct dependencies detected for SPL_OF_CONTROL Depends on [n]: SUPPORT_OF_CONTROL [=y] && SPL [=n] && OF_CONTROL [=y] Selected by [y]: - ARMADA_32BIT [=y] && ARM [=y] && ARCH_MVEBU [=y] WARNING: unmet direct dependencies detected for SPL_DM Depends on [n]: DM [=y] && SPL [=n] Selected by [y]: - ARMADA_32BIT [=y] && ARM [=y] && ARCH_MVEBU [=y] ... This patch fixes this issue and removes these warnings. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com>
2019-04-12arm: mvebu: AXP: Enhance PCIe port capability configurationStefan Roese
This patch enables the PCIe port specific link capabilities configuration for Armada XP. The weak function board_sat_r_get() was used to return a common flag for PCIe Gen1 vs Gen2 capability for all PCIe ports. This is now changed with this patch to return a bit per PCIe port (4 bits in this case, bit 0 for PCIe port 0, etc). The theadorable board uses this new feature to configure PCIe port 0 as Gen1 and all other PCIe ports as Gen2 capable. All other AXP boards using this function are not changed in the configuration and still configure all ports as PCIe Gen2. This patch also removes the parameter "pex_mode" from board_serdes_cfg_get() as this parameter was not used in any of the implementations. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Phil Sutter <phil@nwl.cc>
2019-04-12ARM: mvebu: define board_ahci_enable() for A38xBaruch Siach
This allows the ahci_mvebu driver to do A38x platform specific configuration at initialization. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: kirkwood: remove kw_config_adr_windowsChris Packham
Now that kirkwood is using the mvebu mbus this function is no longer needed. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: kirkwood: switch to using mvebu mbusChris Packham
The mvebu mbus code already had most of the support required for kirkwood. The only difference is that unlike the other mvebu targets kirkwood doesn't have a bridge control block so the code related to managing that needs to be compiled out. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: kirkwood: remove KW_DEFADR_PCI_IO_REMAPChris Packham
KW_DEFADR_PCI_IO_REMAP has the same value as KW_DEFADR_PCI_IO and is only used to set up a 1:1 mapping. Remove it and update the mapping to use KW_DEFADR_PCI_IO. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ARM: kirkwood: rename KW_CPU_WIN_BASE to MVEBU_CPU_WIN_BASEChris Packham
This will allow the kirkwood platforms to use more common code with the other mvebu SoCs. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: mvebu: x530: Enable watchdog in SPL and U-BootChris Packham
Enable the hardware watchdog to guard against system lock ups when running in the SPL or U-Boot. Stop the watchdog just before booting so that the OS can re-enable it if needed. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12arm: sync armada-xp dts files from Linux 5.0Chris Packham
Bring in the Armada 370/XP dts/dtsi files from Linux. As U-Boot hasn't got the new NAND driver the updating binding has not been included. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-11arm64: dts: ti: k3-am65: add mcu navss nodesGrygorii Strashko
Add DT node for MCU NAVSS its components to get DMA working on AM654 SoC. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-04-11soc: keystone: Merge into ti specific directoryVignesh R
Merge drivers/soc/keystone/ into drivers/soc/ti/ and convert CONFIG_TI_KEYSTONE_SERDES into Kconfig. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-04-11firmware: ti_sci: Add support for NAVSS resource managementGrygorii Strashko
Texas Instruments' System Control Interface (TI-SCI) Message Protocol abstracts management of NAVSS resources, like PSI-L pairing and unpairing, UDMAP tx/rx/flow configuration and Rings. This patch adds support for requesting and configuring such resources from TI-SCI firmware. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Vignesh R <vigneshr@ti.com>
2019-04-11Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Various rmobile fixes
2019-04-11DTS: imx53: Add imx53-kp-u-boot.dtsi file with u-boot specific propertyLukasz Majewski
This file adds the "u-boot,i2c-transaction-bytes" to mc34708 PMIC. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-10sunxi: Allow booting from 128KB SD/eMMC offsetAndre Przywara
On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-10arm: sunxi: Enable DRAM ODT by default on H3/H5Paul Kocialkowski
Most of the boards we support with H3/H5 enable DRAM on-die termination, which is consistent with the high DRAM clocks that are used. Make it the default (like it's done for other similar platforms) instead of defining it in each defconfig. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-10arm: sunxi: Set the default DRAM ZQ value to 3881979 on H3/H5Paul Kocialkowski
Most H3/H5 boards we support have the DRAM ZQ value set to 3881979, which is also consistent with the default set for the R40. Make this value the default on H3/H5 instead of 123. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-10arm: sunxi: Allow per-platform DRAM ZQ configuration on sun8iPaul Kocialkowski
A few sun8i platforms define specific default DRAM ZQ values, but they are not taken in account because of MACH_SUN8I being used for the 123 default first. Replace MACH_SUN8I with the list of platforms that don't have specific DRAM ZQ values, to avoid overwriting the default for those that do. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2019-04-10sunxi: dram_sun8i: Fix A33 memory initializationMichael Trimarchi
While the exact problem is not known, based on discussion between Philipp Tomsich and André Przywara it is guessed that exit self-refresh timing is not set with correct value. There may be implicit enter or exit Self-Refresh anywhere as part of some training phase. In ZynqMP register guide [1], which is close to the various Allwinner DRAM controllers, tXSDLL is bits [14:8], while the non-DLL tXS is bits [6:0]: Self refresh exit delay. So it could be safely increased and it only affects the time after the self-refresh “exit”, which happens only after (re-)initialisation. There was no document for cpu in question so based on oscilloscope readings [2][3] and observed result by comparing allwinner architecture. So set it same as Allwinner H5 silicon. Before this patch, failure rate of was 7%. This was tested on A33 allwinner cpu, dual rank connection connected with two MT41K512M16HA-125:A memory model. Memory is configured as DDR3 1.5V And also this is tested in A33-OLinuXino dev board. [1] https://www.xilinx.com/html_docs/registers/ug1087/ddrc___dramtmg8.html [2] https://ibb.co/R70zmyS [3] https://ibb.co/HVVCGQ8 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com> Acked-by: Jagan Teki <jagan@openedev.com>
2019-04-10sun50i: a64: Add Oceanic 5205 5inMFD initial supportJagan Teki
Oceanic 5205 5inMFD is a 5 inch Multi function display baseboard designed to mount SoPine SOM. Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - SD Slot - SPI-NOR flash - EMAC, RTL8211E - MCP2515 CAN - 4-lane, MIPI-DSI panel - Goodix 911 CTP - USB Host - 12V DC power supply Linux commit details about the sun50i-a64-oceanic-5205-5inmfd.dts sync: "arm64: allwinner: a64: Add Oceanic 5205 5inMFD initial support" (sha1: 00f7980a3bd53d12abc34f68146a8eed0e894248) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-09ARM: dts: rmobile: Enable USB on E2 AltMarek Vasut
The E2 Alt board has two USB ports, add missing DT nodes to make the USB available. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0Marek Vasut
Synchronize R-Car Gen3 device trees with Linux 5.0, commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.0Marek Vasut
Synchronize R-Car Gen2 device trees with Linux 5.0, commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: dts: rmobile: Import R8A77965 M3NULCB DTsMarek Vasut
Import R8A77965 M3N ULCB device trees from Linux 5.0 , commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09pinctrl: renesas: Add R8A77965 pin control tablesMarek Vasut
Add pin control tables for R8A77965 from Linux 5.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09clk: renesas: Add R8A77965 clock tablesMarek Vasut
Add clock tables for R8A77965 from Linux 5.0 , except for the crit, R and Z clock, which are neither used nor supported by the U-Boot clock framework yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: rmobile: Add dedicated R8A77965 SoC supportMarek Vasut
Add dedicated entry for R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: rmobile: Enable multi-DTB fit LZO compressionMarek Vasut
Enable LZO compression of the multi-DTB fitImages, since the U-Boot with multiple DTs enabled is becoming quite large and the DTs can be well compressed. The LZO compression saves almost 200 kiB on the Salvator-X(S) and ULCB targets. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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