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2017-01-11dts: arm64: rk3399: add max-frequency for sdhciKever Yang
Add 'max-frequency' for sdhci node for clock init. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11rockchip: Fix veyron-minnie's Kconfig descriptionMartin Michlmayr
The veyron-minnie Kconfig referred to jerry by mistake. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-01-11rockchip: dts: popmetal: add usb host power supply nodeKever Yang
The popmetal board using a HOST_VBUS_DRV gpio signal to control the USB host port 5V power, add a fix regulator and pinctrl for it, and enable the USB host1 controller with the vbus-supply. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip: tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-11SPL: Adjust more debug prints for ulong entry_pointTom Rini
With entry_point now being an unsigned long we need to adapt the last two debug prints to use %lX not %X. Fixes: 11e1479b9e67 ("SPL: make struct spl_image 64-bit safe") Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-11Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblazeTom Rini
Xilinx changes for v2017.03 - ATF handoff - DT syncups - gem: Use wait_for_bit(), add simple clk support - Simple clk driver for ZynqMP - Other small changes
2017-01-11mmc: move more driver config options to KconfigMasahiro Yamada
Move (and rename) the following CONFIG options to Kconfig: CONFIG_DAVINCI_MMC (renamed to CONFIG_MMC_DAVINCI) CONFIG_OMAP_HSMMC (renamed to CONFIG_MMC_OMAP_HS) CONFIG_MXC_MMC (renamed to CONFIG_MMC_MXC) CONFIG_MXS_MMC (renamed to CONFIG_MMC_MXS) CONFIG_TEGRA_MMC (renamed to CONFIG_MMC_SDHCI_TEGRA) CONFIG_SUNXI_MMC (renamed to CONFIG_MMC_SUNXI) They are the same option names as used in Linux. This commit was created as follows: [1] Rename the options with the following command: find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e ' s/CONFIG_DAVINCI_MMC/CONFIG_MMC_DAVINCI/g s/CONFIG_OMAP_HSMMC/CONFIG_MMC_OMAP_HS/g s/CONFIG_MXC_MMC/CONFIG_MMC_MXC/g s/CONFIG_MXS_MMC/CONFIG_MMC_MXS/g s/CONFIG_TEGRA_MMC/CONFIG_MMC_SDHCI_TEGRA/g s/CONFIG_SUNXI_MMC/CONFIG_MMC_SUNXI/g ' [2] Commit the changes [3] Create entries in driver/mmc/Kconfig. (copied from Linux) [4] Move the options with the following command tools/moveconfig.py -y -r HEAD \ MMC_DAVINCI MMC_OMAP_HS MMC_MXC MMC_MXS MMC_SDHCI_TEGRA MMC_SUNXI [5] Sort and align drivers/mmc/Makefile for readability Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-10Merge git://git.denx.de/u-boot-dmTom Rini
2017-01-10mips: Use common _AC macro now.Tom Rini
MIPS no longer needs to have its own version of this macro now. Fixes: 2a6713b09b8d ("move UL() macro from armv8/mmu.h into common.h") Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-10Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2017-01-10ARM64: zynqmp: Generate handoff structure for ATFMichal Simek
Xilinx ATF extending options for passing images from BL2(FSBL) to BL31. U-Boot SPL is FSBL replacement that's why it should generate handoff structure the same. Support only one entry which is U-Boot in EL2 itself. When FIT image is adopted structure generate should be data driven. Currently ATF is placing this structure at the beggining of OCM which is rewriting early parts of ATF which should be unused at that time. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM: zynqmp: Make SYS_VENDOR configurableMike Looijmans
Add a string description for SYS_VENDOR to allow configuring boards from other vendors than just "xilinx". Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM64: zynqmp: Fix i2c node's compatible stringMoritz Fischer
The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core which fixes some silicon bugs that needed software workarounds in Version 1.0 that was used on Zynq systems. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10net: zynq_gem: Use clock driver for ZynqMPSiva Durga Prasad Paladugu
Enable and use the clock driver routine defined in clock driver toset required clock appropriately. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM64: zynqmp: Add idle state for ZynqMPStefan Krsmanovic
Added the idle-states node to describe zynqmp idle states. Only cpu-sleep-0 idle state is added in this patch. References to the idle-states node are added in all CPU nodes. Time values: entry/exit latencies and min-residency, needs to be tuned. arm,psci-suspend-param is selected to comply with PSCIv1.0 and Extended StateID format. Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Acked-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM64: zynqmp: Fix usb nodes for dc1 and dc2Michal Simek
Fix DT binding for usb nodes. Setup correct aliases and enable dwc3 nodes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM64: zynqmp: Add missing earlycon for ep108Michal Simek
Just sync between version. Others zynqmp boards have this setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-10ARM64: zynqmp: clk: Add the clock for watchdogShubhrajyoti Datta
The watchdog clock node is missing. Add the same. This solves the below error. cdns-wdt fd4d0000.watchdog: input clock not found cdns-wdt: probe of fd4d0000.watchdog failed with error -2 Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source propertySudeep Holla
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to check for/support the legacy "gpio-key,wakeup" boolean property to enable gpio buttons as wakeup source, "wakeup-source" is the new standard binding. This patch replaces the legacy "gpio-key,wakeup" with the unified "wakeup-source" property in order to avoid any futher copy-paste duplication. Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM: zynq: Remove spi-max-frequencyMichal Simek
spi-max-frequency for spi bus depends on devices which are connected to it. Remove this parameter from dtsi file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-09am33xx: board: init usb ether gadget for rndis supportMugunthan V N
Add usb ether gadget device with usb_ether_init() when CONFIG_DM_ETH and CONFIG_USB_ETHER are defined. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-08am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASEAndrew F. Davis
The SPL load address changes based on boot type in HS devices, ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs for similar reasons. Add this same logic for AM33xx devices. Also make the default value for ISW_ENTRY_ADDR correct for GP devices based on SoC, HS devices already pick the correct value in their defconfig. Signed-off-by: Andrew F. Davis <afd@ti.com>
2017-01-08arm: mach-omap2: Fix secure file generationAndrew F. Davis
When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was not generated but generate an unsigned one anyway, first fix this warning to say that it was generated but not secured. When the user then exports TI_SECURE_DEV_PKG after getting this warning, and tries to re-build, 'make' will detect the build artifacts as unchanged and so assume they do not need to be re-generated. This causes it to fail to sign the files and it will pack unsigned files into the final image, even though TI_SECURE_DEV_PKG is now correctly defined and working. Fix this by using FORCE on the targets causes them to be re-run even if the dependent files have not changed. This then causes another issue. We currently rename the signed dtb files to overwrite the non-signed ones. We do this so the 'mkimage' tool gives the packaged dtb sections the correct name. If we do not rename the files then SPL will not find them during boot. Fix this by renaming the dtb files by appending _HS to the end of the filename, after the ".dtb", this causes them to still be named correctly in the FIT blob. Signed-off-by: Andrew F. Davis <afd@ti.com>
2017-01-04Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini
2017-01-04powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to KconfigYork Sun
Use Kconfig option SYS_PPC64 instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to KconfigYork Sun
Use Kconfig option to select chassis version. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: E6500: Move macro CONFIG_E6500 to KconfigYork Sun
Use Kconfig option E6500 and clean up existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: mpc85xx: Remove unused ifdef in config headerYork Sun
After most config options are moved to Kconfig, the unused ifdef or elif can be removed. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04ddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to KconfigYork Sun
Use Kconfig to select DDR version instead of using config header. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun
These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to KconfigYork Sun
Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing usage in ls102xa and fsl-layerscape. Remove all powerpc macros in config header and board header files. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun
Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to KconfigYork Sun
Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13, SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig. Move existing macros to related Kconfig. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate bk4r1] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun
Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04fsl_ddr: Move DDR config options to driver KconfigYork Sun
Create driver/ddr/fsl/Kconfig and move existing options. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04powerpc: T104xQDS: Remove macro CONFIG_T104xD4QDSYork Sun
Remove this macro. It was added by e622d9ed but actually wasn't used. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: T2080RDB: Remove macro CONFIG_T2080RDBYork Sun
Use TARGET_T2080RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: T2080QDS: Remove macro T2080QDSYork Sun
Use TARGET_T2080QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: T1040QDS: Remove macro CONFIG_T1040QDSYork Sun
Use TARGET_T1040QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014York Sun
Remove these SoCs from Kconfig because they don't have individual configuration. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to KconfigYork Sun
Use Kconfig option to set little- or big-endian access to secure boot and trust architecture. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04crypto: Move SYS_FSL_SEC_COMPAT into driver KconfigYork Sun
Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC and ARM SoCs, move it to Kconfig under the driver. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to KconfigYork Sun
Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate 8572] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to KconfigYork Sun
Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to KconfigYork Sun
Use Kconfig option for E500 and E500MC macros. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04sunxi: A64: enable SPLAndre Przywara
Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-01-04sunxi: DRAM: fix H3 DRAM size display on aarch64Andre Przywara
Fix the output of the DRAM size on AArch64 SPLs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-01-04sunxi: H3/A64: fix non-ODT settingAndre Przywara
According to Jens disabling the on-die-termination should set bit 5, not bit 1 in the respective register. Fix this. Reported-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-01-04sunxi: A64: use H3 DRAM initialization code for A64 as wellJens Kuske
The A64 DRAM controller is very similar to the H3 one, so the code can be reused with some small changes. This refactoring does not change the code size for the existing H3 part. [Andre: rework from #ifdefs to using socid parameters in static functions, minor fixes, merging in fixes from Jens] Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-01-04sunxi: clocks: Use the correct pattern register for PLL11Philipp Tomsich
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-01-04sunxi: H3: add DRAM controller single bit delay supportJens Kuske
So far the DRAM driver for the H3 SoC (and apparently boot0/libdram as well) only applied coarse delay line settings, with one delay value for all the data lines in each byte lane and one value for the control lines. Instead of setting the delays for whole bytes only allow setting it for each individual bit. Also add support for address/command lane delays. For the purpose of this patch the rules for the existing coarse settings were just applied to the new scheme, so the actual register writes don't change for the H3. Other SoCs will utilize this feature later properly. With a stock GCC 5.3.0 this increases the dram_sun8i_h3.o code size from 2296 to 2344 Bytes. [Andre: move delay parameters into macros to ease later sharing, use defines for numbers of delay registers, extend commit message] Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
generated by cgit (git 2.34.1) at 2024-12-29 16:03:34 +0000