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2017-08-13armv8: TPL_STACK will always be defined, so test CONFIG_TPL_NEEDS_SEPARATE_STACKPhilipp Tomsich
Now that TPL_STACK has been moved off the whitelist (ok, I'm lying: the 'moving off the whitelist' part comes in once moveconfig runs... which will be a few commits down the line) and added to Kconfig, we need to test CONFIG_TPL_NEEDS_SEPARATE_STACK to see whether the value from TPL_STACK should be used or whether we try to inherit whatever SPL uses. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368Philipp Tomsich
Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: board: lion-rk3368: add support for the RK3368-uQ7Philipp Tomsich
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm, MXM-230 edge connector compatible with the Qseven specification) form-factor system-on-module based on the octo-core Rockchip RK3368. It is designed, supported and manufactured by Theobroma Systems. It provides the following features: - 8x Cortex-A53 (in 2 clusters of 4 cores each) - (on-module) up to 4GB of DDR3 memory - (on-module) SPI-NOR flash - (on-module) eMMC - Gigabit Ethernet (with an on-module KSZ9031 PHY) - USB - HDMI - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: mark SPL and TPL as supported for ROCKCHIP_RK3368Philipp Tomsich
With SPL and TPL support for the RK3368 in place, mark SPL and TPL as supported from Kconfig for the RK3368. As this is primarily tested on the RK3368-uQ7, we'll leave it to board's individual defconfig to enable. Also enable DEBUG_UART_BOARD_INIT for the RK3368, so we get output during the early boot-up, as we turn on TPL and SPL. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: add SPL supportPhilipp Tomsich
Adds SPL support for the RK3368 (assuming that our TPL stage has initialised DRAM and set up the memory firewall). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: spl: make spl-boot-order code reusable (split from rk3399)Philipp Tomsich
In order to reuse the support for the u-boot,spl-boot-order property from the rk3399, we split it into a reusable module that can be included by the SPL code for any of our boards. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: add TPL supportPhilipp Tomsich
This adds the TPL support for the RK3368, including the u-boot-tpl.lds. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: dts: add DMC node in rk3368.dtsiPhilipp Tomsich
For full SPL support, including DRAM initialisation, we need a few nodes from the DTS: this commit adds the DMC (DRAM controller) node, the service_msch (memory scheduler) node and marks GRF, PMUGRF and CRU as 'u-boot,dm-pre-reloc'. In addition to this, we also include the dt-binding for the DMC to allow DTS files including this DTSI to refer to the symbolic constants for the DDR3 bin and for the memory-schedule. Note that the DMC contains both the memory regions for the (Designware) protocol controller as well as the DDR PHY. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: add DRAM controller driver with DRAM initialisationPhilipp Tomsich
This adds a DRAM controller driver for the RK3368 and places it in drivers/ram/rockchip (where the other DM-enabled DRAM controller drivers for rockchip devices should also be moved eventually). At this stage, only the following feature-set is supported: - DDR3 - 32-bit configuration (i.e. fully populated) - dual-rank (i.e. no auto-detection of ranks) - DDR3-1600K speed-bin This driver expects to run from a TPL stage that will later return to the RK3368 BROM. It communicates with later stages through the os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR init code). Unlike other DMC drivers for RK32xx and RK33xx parts, the required timings are calculated within the driver based on a target frequency and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this time). The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0) register for controlling the operation of its (single-channel) DRAM controller in the GRF block. This provides for selecting DDR3, mobile DDR modes, and control low-power operation. As part of this change, DDRC0_CON0 is also added to the GRF structure definition (at offset 0x600). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Makefile: streamline SPL/TPL configurationPhilipp Tomsich
Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13net: gmac_rockchip: Add support for the RK3368 GMACPhilipp Tomsich
The GMAC in the RK3368 once again is identical to the incarnation in the RK3288 and the RK3399, except for where some of the configuration and control registers are located in the GRF. This adds the RK3368-specific logic necessary to reuse this driver. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-13rockchip: clk: rk3368: add support for GMAC (SLCK_MAC) clockPhilipp Tomsich
To enable the GMAC on the RK3368, we need to set up the clocking appropriately to generate a tx_clk for the MAC. This adds an implementation that implements the use of the <&ext_gmac> clock (i.e. an external 125MHz clock for RGMII provided by the PHY). This is the clock setup used by the boards currently supported by U-Boot (i.e. Geekbox, Sheep and RK3368-uQ7). This includes the change from commit - rockchip: clk: rk3368: define GMAC_MUX_SEL_EXTCLK Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: clk: rk3368: implement MMC/SD clock reparentingPhilipp Tomsich
The original clock support for MMC/SD cards on the RK3368 suffered from a tendency to select a divider less-or-equal to the the one giving the requested clock-rate: this can lead to higher-than-expected (or rather: higher than supported) clock rates for the MMC/SD communiction. This change rewrites the MMC/SD clock generation to: * always generate a clock less-than-or-equal to the requested clock * support reparenting among the CPLL, GPLL and OSC24M parents to generate the highest clock that does not exceed the requested rate In addition to this, the Linux DTS uses HCLK_MMC/HCLK_SDMMC instead of SCLK_MMC/SCLK_SDMMC: to match this (and to ensure that clock setup always works), we adjust the driver appropriately. This includes the changes from: - rockchip: clk: rk3368: convert MMC_PLL_SEL_* definitions to shifted-value form Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: clk: rk3368: define DMA1_SRST_REQ and DMA2_SRST_REQPhilipp Tomsich
On he RK3368, we need to temporarily disable security on the DMA engines during TPL and SPL to allow the MMC host to DMA into DRAM. To do so, we need to reset the two DMA engines, which in turn requires the DMA1_SRST_REQ and DMA2_SRST_REQ constants to refer to the appropriate bits in the CRU. As the ATF correctly initialises security (and only leaves EL3 after doing so), this can not pose a security issue. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: pinctrl: rk3368: move IOMUX bit-definitions to pinctrl driverPhilipp Tomsich
There is no real reason to keep the bit-definitions for the IOMUX in the grf header file (which defines the register layout of the GRF block): these should only be used by our pinctrl driver (with the possible exception of early debug-init code in TPL/SPL). This moves the relevant definitions from the grf_rk3368.h header into the pinctrl driver pinctrl_rk3368.c. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: dts: add sgrf nodePhilipp Tomsich
We will to drop device security temporarily (until the ATF initialises it fully) from the TPL/SPL stage: this requires access to some registers in the SGRF. This adds the sgrf node to the rk3368.dtsi, so we can then bind a syscon device onto it and access its memory ranges. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: grf: use shifted-constantsPhilipp Tomsich
The RK3368 GRF header was still defines with a shifted-mask but with non-shifted function selectors for the IOMUX defines. As the RK3368 support is still fresh enough to allow a quick change, we do this now before having more code use this. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: rk3368: syscon: SGRF support for OF_PLATDATAPhilipp Tomsich
In TPL we will need to configure security in the SGRF of the RK3368. This change adds support for the SGRF as a syscon device, so we can retrieve its address range through the syscon API in TPL (and can avoid having to hard-code the address). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: syscon: MSCH/PMUGRF/GRF support for OF_PLATDATAPhilipp Tomsich
The RK3368 has both a limited TPL size (just 0x7000 bytes) and the added challenge of booting in AArch64, which increases the code size for TPL (particularily when using the LP64 programming model). For this reason we expect the RK3368 to always use OF_PLATDATA for its TPL stage. This change adds support for the MSCH, PMUGRF and GRF register regions in syscon, which are necessary for initialising the RK3368's DRAM controller. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: pmugrf: add definitions for os_reg[0..3]Philipp Tomsich
On the RK3368 we use a TPL-stage similar to Rockchip's DDR init (i.e. it initialises DRAM, leaves some info for the next stage and returns to the BootROM). To allow compatibility with Rockchip's DDR init code, we use the same register os_reg2 in pmugrf for passing this info (i.e. DRAM size and configuration) between stages. This change adds the definitions for os_reg[0] through os_reg[3] to the pmugrf structure for the RK3368. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: improve Kconfig text for the RK3368Philipp Tomsich
The RK3368 option in Kconfig referred to the RK3328 (copy-and-paste) and had a few typos and unnecessarily used UTF-8 characters. While fixing this, I also reformatted and further clarified the text (e.g. made the grouping into a a big and little cluster of 4 cores each explicit). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Makefile: allow selective inclusion of sdram_common.o from ↵Philipp Tomsich
TPL/SPL/U-Boot The utility functions in sdram_common.c will be useful both for some SPL implementations (and if unused, the linked will discard these anyway) and for the full U-Boot stage. This changes selects sdram_common.o through the $(SPL_TPL_) macro to allow better control of its inclusion through the CONFIG_ROM, CONFIG_SPL_RAM or CONFIG_TPL_RAM options. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13armv8: spl: Support separate stack for TPLPhilipp Tomsich
To allow a TPL and SPL to run from different addresses/memories, we need to split setup of the TPL and SPL stacks. To do so, we introduce CONFIG_TPL_STACK (not listed in Kconfig) which can be used to override the initial stack pointer for TPL. To provide backward compatibility for existing boards, this is added as an optional configuration item and the normal search order (i.e. SPL_STACK, then SYS_STACK) apply if not defined. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13armv8: move low-level assembly functions into function-sectionsPhilipp Tomsich
TPL builds today don't need to call into firmware or set up the MMU (if this changes, it should be controlled through a config option whether to include this or not), but include the needed support code for this anyway. By moving these unused low-level functions into seperate function-sections, the linker can garbage-collect the unused sections. Note that (if DM support is enabled), there will be a call to the cache-flushing code from alloc_priv(...) in drivers/core/device.c. This then add 52 bytes of binary size (an increase from 20589 to 20641 bytes) compared to completely removing this code. Even for a feature-rich TPL (including DM support as for the RK3368), this equates to a size difference of significantly more than 10% in TPL binary size. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: back-to-bootrom: simplify the #ifdef-check for LIBCOMMON in TPL/SPLPhilipp Tomsich
With the finer-grained control over LIBCOMMON_SUPPORT for TPL/SPL (i.e. with the newly introduced distinction between TPL_LIBCOMMON_SUPPORT and SPL_LIBCOMMON_SUPPORT), we can simplify the #ifdef-check to simply use CONFIG_IS_ENABELD. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up to use 'puts' and LIBCOMMON:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPLPhilipp Tomsich
The back-to-bootrom option is rather unfortunately named CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM instead of CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM), we need to rename it. At the same time, we introduce a TPL_ variant of the option to give us finer-grained control over when it should be used. This change is motivated by our RK3368 boot process, which returns to the boot ROM only from the TPL stage, but not from the SPL stage. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [added fix-up for evb-rk3229_defconfig and phycore-rk3288_defconfig:] [fixed inverted CONFIG_IS_ENABLED test for rk3288:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> include/configs/rock.h: undef
2017-08-13rockchip: back-to-bootrom: add 'back-to-bootrom' support for AArch64Philipp Tomsich
The back-to-bootrom support for Rockchip is equivalent to an (assembly) implementation of setjmp/longjmp (i.e. it saves the stack-pointer, link-register and callee-saved registers). Up until now, this had only been implemented for AArch32 (i.e. ARMv7 or older), which puts the new ARMv8 devices (which boot in AArch64 mode) at a slight disadvantage. To allow use of the 'back-to-bootrom' feature on new devices (e.g. the RK3368), this commit adds an implementation for AArch64. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13spl: add a 'return to bootrom' boot methodPhilipp Tomsich
Some devices (e.g. the RK3368) have only limited SRAM, but provide support for loading the next boot stage after our SPL performs basic setup (e.g. DRAM). For target systems like these, we add a boot device BOOTROM that will invoke a board-specific hook to return to the bootrom (if supported). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-12arm: omap: Fix 'get_device_type()' for OMAP34XXDerald D. Woods
Fixes: 00bbe96ebabb ("arm: omap: Unify get_device_type() function") The control status register value is embedded in a structure somewhere in SRAM, with the last refactoring effort. This patch allows OMAP3 EVM (TMDSEVM3530) to boot again using the known control register base and offset for 'readl', for the OMAP34XX case. Signed-off-by: Derald D. Woods <woods.technical@gmail.com> [trini: Change to if/else, add comment about it.] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-12Convert CONFIG_NAND to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_NAND Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Sync up a few more, add imply's] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-11Convert CONFIG_CMD_ZBOOT to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_ZBOOT Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_SPL to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_SPL Note that trats does not actually use SPL, so this option can no-longer be set. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_SH_ZIMAGEBOOT to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_SH_ZIMAGEBOOT Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_SF_TEST to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_SF_TEST Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_SAVES to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_SAVES Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_REGINFO to KconfigChristophe Leroy
This patch converts CONFIG_CMD_REGINFO to Kconfig Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_PCI to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_PCI Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_PCA953X to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_PCA953X Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-08-10Merge git://git.denx.de/u-boot-i2cTom Rini
2017-08-10Convert CONFIG_SYS_I2C_OMAP24XX to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_SYS_I2C_OMAP24XX Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-09config: ls1012aqds: Enable USB EHCI support for ls1012aqdsRajesh Bhagat
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com> [YS: Revise subject, remove commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09armv8/fsl-lsch2: correct the config description of DSPI clock dividerHou Zhiqiang
It is derived from Platform clock instead of Platform PLL frequency. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09Configs: Migrate CONFIG_SYS_I2C_OMAP34XX to CONFIG_SYS_I2C_OMAP24XXAdam Ford
The driver is for all boards 24XX and up, so let's eliminate the extra option called CONFIG_SYS_I2C_OMAP34XX since the driver checks for CONFIG_OMAP34XX we don't need CONFIG_SYS_I2C_OMAP34XX. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-08Merge git://git.denx.de/u-boot-x86Tom Rini
2017-08-08configs: Finish migration of PHY_GIGETom Rini
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-08x86: acpi: Fix build error with certain configurationBin Meng
When CONFIG_EFI_PARTITION is not set, the following build error is seen in arch/x86/lib/acpi_s3.c: error: expected declaration specifiers or '...' before '*' token static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void*)WAKEUP_BASE; This is actually caused by missing asmlinkage declaration, but with CONFIG_EFI_PARTITION on, the declaration comes from part.h which is included from common.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-08x86: Remove dead ISA related codesBin Meng
Neither new design uses ISA bus, nor does any U-Boot codes use these codes. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-07Move PHYLIB to KconfigAlexandru Gagniuc
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: move Broadcom SF2 driver to KconfigSuji Velupillai
move to Kconfig: CONFIG_BCM_SF2_ETH CONFIG_BCM_SF2_ETH_DEFAULT_PORT CONFIG_BCM_SF2_ETH_GMAC Also modified defconfigs of all platforms that use these configs. Signed-off-by: Suji Velupillai <suji.velupillai@broadcom.com> Tested-by: Suji Velupillai <suji.velupillai@broadcom.com> Reviewed-by: JD Zheng <jiandong.zheng@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>