Age | Commit message (Collapse) | Author |
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Replace CONFIG_P1022 with ARCH_P1022 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Remove CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PB and split TARGET_P1010RDB
to TARGET_P1010RDB_PA and TARGET_P1010RDB_PB in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_P1010 with ARCH_P1010 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8572 with ARCH_MPC8572 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8569 with ARCH_MPC8569 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8568 with ARCH_MPC8568 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8560 with ARCH_MPC8560 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_MPC8555CDS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8555 with ARCH_MPC8555 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace with CONFIG_TARGET_MPC8541CDS from Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8541 with ARCH_MPC8541 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8540 with ARCH_MPC8540 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8536 with ARCH_MPC8536 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_C29XPCIE instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_PPC_C29X with ARCH_C29X in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_BSC9132QDS from Kconfig option, remove CONFIG_BSC9132QDS
macro.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_BSC9131, CONFIG_BSC9132 with ARCH_BSC9131, ARCH_BSC9132
Kconfig options.
Also drop #ifdef in BSC9131RDB.h since it is redundant.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8544 with ARCH_MPC8544 in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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Patch queue for efi - 2016-11-17
Highlights this time around:
- x86 efi_loader support
- hello world efi test case
- network device name is now representative
- terminal output reports modes correctly
- fix psci reset for ls1043/ls1046
- fix efi_add_runtime_mmio definition for x86
- efi_loader support for ls2080
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When implementing efi loader support, we can expose runtime services
for payloads. One such service is CPU reset.
This patch implements RTS CPU reset support for layerscape systems.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
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The efi loader code has its own memory map, so it needs to be aware where
the spin tables are located, to ensure that no code writes into those
regions.
Signed-off-by: Alexander Graf <agraf@suse.de>
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On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.
Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.
So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.
For existing boot scripts, nothing should change with this patch.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
[agraf: Fix x86 build]
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The NXP ls1043 and ls1046 systems do not (yet) have PSCI enablement
for reset. Don't enable generic PSCI reset code on them.
Signed-off-by: Alexander Graf <agraf@suse.de>
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Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Zynqmp DMA driver expects two clocks (main clock and apb clock)
For LPDDMA channels the two clocks are missing in the
Dma node resulting probe failure.
xilinx-zynqmp-dma ffa80000.dma: main clock not found.
xilinx-zynqmp-dma ffa80000.dma: Probing channel failed
xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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LPDDMA default allows only secured access.
inorder to enable these dma channels,
one should ensure that it allows non secure access.
This patch updates the same.
Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Use 64bit size cell for main amba bus instead of 32bit because PCIe
node requires it Change 64bit sizes also for all others IPs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds ocm controller node in zynqmp.dtsi.
needed for OCM edac support.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds the ZynqMP GT core device-tree properties for
zynqmp.dtsi file.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1
Implemented the new workaround for auto tuning based on
zynqmp compatible string, so removed the 'broken-tuning'
property.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch changes the compatible string for sdhci node,
adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node.
Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add SMMU description for all tested IPs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for zynqmp fpga manager.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds edac node for arm cortexa53 to report
errors on L1 and L2 caches.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c.
Since we are using serdes driver , no need of mapping serdes register
space into DP driver.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Each plane can be associated with multiple DMA channels. So add
index for each DMA channel.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Keep dtsi in sync with mainline kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove unused xlnx,id property because it is not the part of
DT binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Updating required device tree changes as per mainlined driver
from 4.6 kernel.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, there
can be a situation where multiple PM IDs belong to a single PM domain
(e.g. PM IDs for GPU and two pixel processors correspond to a single
PM domain).
This patch adds support for assigning more than one PM ID to
a single PM domain.
Updated documentation accordingly.
Assigned pixel processors PM IDs to GPU PM domain.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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DDR power states are handled by the PM firmware, so this domain is
redundant. Also, since there is no device using this PM domain,
it will be powered off during boot, which is wrong.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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i2c device is just level shifter. Remove reference from dts.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add dcc to dtsi for supporting system without serial port.
DCC is enabled by default on ZynqMP.
Adding dcc to zcu100 and zcu102 which were tested.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is gpio push button on MIO22. Add it to DTS to have full board
description.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Show user that Linux is alive on the board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch enables can1 for ep108.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Added clks for ep108 platform.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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