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path: root/board/ebv/socrates/qts
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2016-10-27arm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-11-30arm: socfpga: Repair SoCrates boardMarek Vasut
This board was constantly parasiting on the CV SoCDK, so split it into it's own separate directory. Moreover, the board config was missing important bits, like simple-bus support in SPL, the DRAM configuration was incorrect and the DTS was also missing the pre reloc bits. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Jan Viktorin <viktorin@rehivetech.com>