summaryrefslogtreecommitdiff
path: root/board/freescale/ls1088a
AgeCommit message (Collapse)Author
2017-12-14board/ls2080a, ls1088a: Add check for mc-dpl applied in fdtYogesh Gaur
Function fdt_fixup_board_enet() performs fdt fixup. Only return fdt_status_okay() when both MC is applied and DPL is deployed, else return fdt_status_fail(). This check is added to LS1088A/LS2080A/LS2088A boards. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-13armv8: ls1088ardb: support force SDHC mode by hwconfigYangbo Lu
The BRDCFG5[SPISDHC] register field of Qixis device is used to control SPI and SDHC signal routing. 10 = Force SDHC Mode - SPI_CS[0] is routed to CPLD for SDHC_VS use. - SPI_CS[1] is unused. - SPI_CS[2:3] are routed to the TDMRiser slot. 11 = Force eMMC Mode - SPI_CS[0:3] are routed to the eMMC card. 0X = Auto Mode - If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode described above. - Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC mode described above. In default the hardware uses auto mode, but sometimes we need to use force SDHC mode to support SD card hotplug, or SD sleep waking up in kernel. This patch is to support force SDHC mode by hwconfig. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.Udit Agarwal
Add the secure boot defconfigs for QSPI boot on LS1088ARDB and LS1088AQDS platforms. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: ls1088: Add fsl_fdt_fixup_flashAshish Kumar
IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts if QSPI is enabled and vice-versa Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088aqds: Add SD boot support for ls1088qdsAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088ardb: Add SD boot support for ls1088Ashish Kumar
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-10-27armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_IDAshish Kumar
Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID PHY_INTERFACE_MODE_RGMII_TXID. These change where introduced in phy driver in commit 05b29aa0cb68 ("net: phy: realtek: fix enabling of the TX-delay for RTL8211F"). Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-10-09armv8: ls1088a: Update MC boot sequenceBogdan Purcareata
The MC boot sequence is contained in mc_env_boot. Update LS1088A boards to use this function, and hook it to reset_phy so that it's called late enough, after the ports have been initialized, for proper DPC / DPL fixup. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088aqds: Add support of EC1 and EC2Prabhakar Kushwaha
EC1 and EC2 are RGMII interface on ls1088aqds platform. This patch add support of RGMII with PHY and MDIO Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: fsl-layerscape: Support to add RGMII for ls1088aqdsAshish Kumar
This patch adds support for RGMII protocol NXP's LDPAA2 support RGMII protocol. LS1088A is the first Soc supporting both RGMII and SGMII. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088aqds: Add support of LS1088AQDSAshish Kumar
This patch add support of LS1088AQDS platform. The LS1088A QorIQTM Development System (QDS) is a high-performance computing, evaluation, and development platform that supports the LS1088A QorIQ Architecture processor. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088ardb: Add support for LS1088ARDB platformAshish Kumar
LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Disabled NAND in board header file] Reviewed-by: York Sun <york.sun@nxp.com> WIP: disable NAND for LS1088ARDB