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path: root/board/freescale/ls2080ardb/ddr.h
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2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-30armv8: ls2088ardb: Add 3DS RDIMM supportYork Sun
Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4 DDR chips. LS2088ARDB needs to be modified to connect all DQS signals. Some of them are grounded by default for x8 chips. Tested with RDIMM MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support RDIMM. Dropped related timing table. Signed-off-by: York Sun <york.sun@nxp.com>
2016-06-03board/freescale: Update ddr clk_adjustShengzhou Liu
This patch updates clk_adjust to actual value for boards with T-series and LS-series SoCs to match the setting of clk_adjust in latest ddr driver. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-17armv8/ls2080ardb: Update DDR timing to support more UDIMMsShengzhou Liu
Optimize DDR timing for good margins to support new Transcend and Apacer DDR4 UDIMM besides current Micron UDIMM. Verified 1333MT/s, 1600MT/s, 1866MT/s, 2133MT/s rate with following UDIMM on LS2080ARDB. - Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z - Apacer UDIMM: 78.C1GM4.AF10B - Transcend UDIMM: TS1GLH72V1H Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2015-11-30armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha
LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>