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2017-12-29mx6sxsabresd: Load the correct dtb for revA boardFabio Estevam
Currently only imx6sx-sdb.dtb is loaded, but if revA board is used the correct dtb is imx6sx-sdb-reva.dtb, so make this possible. While at it, remove an extra 'mmc dev'. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12imx: reorganize IMX code as other SOCsStefano Babic
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2016-12-16imx: clock: gate clk before changing pix clk muxPeng Fan
The LCDIF Pixel clock mux is not glitchless, so need to gate before changing mux. Also change enable_lcdif_clock prototype with a new input parameter to indicate disable or enable. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-09-06mx6: ddr: Allow changing REFSEL and REFR fieldsFabio Estevam
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and REFR fields of the MDREF register as 1 and 7, respectively for DDR3 and 0 and 3 for LPDDR2. Looking at the MDREF initialization done via DCD we see that boards do need to initialize these fields differently: $ git grep 0x021b0020 board/ board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */ board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800 board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800 board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800 So introduce a mechanism for users to be able to configure REFSEL and REFR fields as needed. Keep all the mx6 SPL users in their current REF_SEL and REFR values, so no functional changes for the existing users. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com>
2016-07-12mx6sxsabresd: Avoid hardcoded RAM sizeVanessa Maegima
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option, we should better use imx_ddr_size() function, which automatically determines the RAM size. Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
2016-04-01usb: Rename ehci-fsl.h to ehci-ci.hMateusz Kulikowski
Most of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors. This patch renames it to a generic header: ehci-ci.h Contents of file are not changed (so it contains several references to freescale SoCs). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-06Use correct spelling of "U-Boot"Bin Meng
Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-02-04imx: mx6: implement board_mmc_get_env_devPeng Fan
Implement board_mmc_get_env_dev for the boards. Following is examples: SD1/SD2/SD3: return devno; SD2/SD3: return devno - 1; SD2/SD4: if (devno == 2), return dev - 2; return dev - 1; Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-02-02imx: mx6sxsabresd: Add MCIMX28LCD display supportYe Li
The i.MX6SX SABRESD board supports MCIMX28LCD (800x480x24) at LCDIF1 port, enable this display feature by adding relevant BSP codes and configurations. Signed-off-by: Ye Li <ye.li@nxp.com>
2016-01-11MAINTAINERS/mailmap: Update my email addressFabio Estevam
Update my email address to the NXP account. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2015-12-07mx6sxsabresd: Fix Ethernet PHY reset sequenceFabio Estevam
Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional. This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. Fix this by calling enable_fec_anatop_clock() earlier and also by adding a 10ms reset delay as recommended in the AR8031 datasheet. Suggested-by: Jörg Krause <joerg.krause@embedded.rocks> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-11-12mx6sxsabresd: Remove empty reset_cpu()Fabio Estevam
There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-09-13mx6: remove SYS_SOC from board KconfigPeng Fan
Remove duplicated SYS_SOC Kconfig entry from board Kconfig, because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: "Eric Bénard" <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Marek Vasut <marex@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2015-09-02imx: mx6: ddr init MMDC according to ddr_typePeng Fan
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper. The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg when ddr_type is for DDR3. Later we can use ddr_type to initialize MMDC for LPDDR2. Initialize ddr_type for different boards which enable SPL. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefan Roese <sr@denx.de>
2015-09-02imx: clock support enet2 anatop clock supportPeng Fan
To i.MX6SX/UL, two ethernet interfaces are supported. Add ENET2 clock support: 1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed. To value 1, only i.MX6SX/UL can pass the check. 2. Modify board code who use this api to follow new api prototype. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2015-07-26mx6sxsabresd: Use 'int' for return valuesFabio Estevam
The variable 'ret' is used to store the value returned by pfuze_mode_init(), so it should be of type 'int' instead of 'unsigned int' in order to correctly handle negative numbers. Fix the variable type. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-02-11imx:mx6 set normal APS and standby PFM modePeng Fan
To normal mode, use APS switching mode. To standy mode, use PFM switching mode. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-01-22imx:mx6sxsabresd board spl supportPeng Fan
Add board level spl support for mx6sxsabresd board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-01-19mx6sxsabresd: Remove unneeded board_late_init()Fabio Estevam
Since commit 1f98e31bc0b2c37a ("imx: mx6sxsabresd: Use the pfuze common init function") board_late_init() became empty, so we can safely remove this unneeded function. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-12-31imx:mx6sxsabresd add qspi supportPeng Fan
Configure the pad setting and enable qspi clock to support qspi flashes access. Add QSPI related macro in configuration header file. Note: mx6sxsabresd Revb board, 32M flash is used, but in header file, CONFIG_SPI_FLASH_BAR is not defined, and we still use SZ_16M. The LUT initialization qspi_set_lut function uses 32BIT addr, however CONFIG_SPI_FLASH_BAR and 24BIT addr should be used to access bigger than 16MB size flash, and BRRD/BRWR should also be supported. Future patches will fix this. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-11Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
Conflicts: board/freescale/mx6sxsabresd/mx6sxsabresd.c Signed-off-by: Tom Rini <trini@ti.com>
2014-12-01arm: mx6: Change defines ENET_xxMHz to ENET_xxMHZ (no CamelCase)Stefan Roese
As checkpatch complaines about these camel-case defines, lets change them to only use upper-case characters. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20imx: mx6sxsabresd: Use the pfuze common init functionYe.Li
Modify the pfuze init for mx6sxsabresd to use the shared "pfuze_common_init" function. And move this initialization to power_init_board. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20imx: mx6sxsabresd: Add board support for USDHC2 and USDHC3Ye.Li
Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board. The default boot socket is USDHC4, so the MMC environment device and mmcdev variable are set to this device. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20mx6sxsabresd: Simplify the return value of setup_fec()Fabio Estevam
We can simply the return the value from enable_fec_anatop_clock() to make the code smaller and simpler. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20imx:mx6sxsabresd fix pfuz probe failedPeng Fan
The PFUZ probe failed with the following msg: " wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=0 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=1 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=2 i2c_init_transfer: give up i2c_regs=021a0000 Can't find PMIC:PFUZE100 " board_early_init_f is too early to call i2c related setting, because init_func_i2c is called after board_early_init_f being invoked. Thus move setup_i2c into board_init. Also PFUZ is connected to I2C bus 0, so change "1" -> "0". Using this patch PFUZ can be correctly probed: "PMIC: PFUZE100 ID=0x11" Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2014-11-14imx:mx6sxsabresd add board level support for usbPeng Fan
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode There are two usb port on mx6sxsabresd board: 1. otg port 2. host port The following are the connection between usb controller and board usb interface, host port has not ID pin set: otg1 core <---> board otg port otg2 core <---> board host port In order to make host port work, board_usb_phy_mode return USB_INIT_HOST to make host port work in HOST mode. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye Li <B37916@freescale.com>
2014-10-29kconfig: arm: introduce symbol for ARM CPUsGeorges Savoundararadj
This commit introduces a Kconfig symbol for each ARM CPU: CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136, CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100. Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected for CPU_ARM1176 and CPU_V7. For each target, the corresponding CPU is selected and the definition of SYS_CPU in the corresponding Kconfig file is removed. Also, it removes redundant "string" type in some Kconfig files. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-22Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic
2014-09-16mx6sxsabresd: Staticize i2c_pad_info1Fabio Estevam
i2c_pad_info1 is only used locally, so it can be made static. Fix the following sparse warning: board/freescale/mx6sxsabresd/mx6sxsabresd.c:160:22: warning: symbol 'i2c_pad_info1' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-09-13kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada
Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-08-20mx6sxsabresd: Add Ethernet supportFabio Estevam
mx6sxsabresd board has 2 FEC ports, each one connected to a AR8031. Add support for one FEC port initially. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-20mx6sxsabresd: Convert to the new Kconfig styleFabio Estevam
mx6sxsabresd was not in the master branch when the conversion to the new Kconfig style happened, so convert it now so that it can build again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-20mx6sxsabresd: Update DDR initializationFabio Estevam
Use the latest DDR initialization values suggested by the FSL hardware team. While at it, add some comments for clarification. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-08pmic: pmic_pfuze100: Use a shorter name for PMIC nameFabio Estevam
It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already know it is a PMIC. Call it simply 'PFUZE100' instead. Cc: Tim Harvey <tharvey@gateworks.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-23mx6sxsabresd: Add PFUZE100 PMIC supportFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-10mx6sx: Add initial support for mx6sxsabresd boardFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>