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2020-05-18command: Remove the cmd_tbl_t typedefSimon Glass
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop image.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move device-tree setup functions to fdt_support.hSimon Glass
These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-02common: Move some board functions out of common.hSimon Glass
A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-08-26powerpc: Enable device tree support for P2041RDBHou Zhiqiang
Add device tree for P1041RDB board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-11env: Move env_get() to env.hSimon Glass
Move env_get() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-16env: Rename some other getenv()-related functionsSimon Glass
We are now using an env_ prefix for environment functions. Rename these other functions as well, for consistency: getenv_vlan() getenv_bootm_size() getenv_bootm_low() getenv_bootm_mapsize() env_get_default() Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-13board_f: Rename initdram() to dram_init()Simon Glass
This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Dummy function on nios2] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-05board_f: Drop return value from initdram()Simon Glass
At present we cannot use this function as an init sequence call without a wrapper, since it returns the RAM size. Adjust it to set the RAM size in global_data instead, and return 0 on success. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05board_f: Drop board_type parameter from initdram()Simon Glass
It looks like only cm5200 and tqm8xx use this feature, so we don't really need it in generic code. Drop it and have the users access gd->board_type directly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2017-01-24NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUSTTom Rini
Introduce board/freescale/common/Kconfig so that we have a single place for CONFIG options that are shared between ARM and PowerPC NXP platforms. Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-27usb: fsl: Rename fdt_fixup_dr_usbSriram Dash
The function fdt_fixup_dr_usb is specific to fsl/nxp. So, make the function name explicit and rename fdt_fixup_dr_usb into fsl_fdt_fixup_dr_usb. Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
2016-06-03freescale: Tweak various Makefiles to remove redundancy, fix aestheticsRobert P. J. Day
No intended functional change, just remove redundancies in some Makefiles, and make whitespace aesthetics uniform. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seqPrabhakar Kushwaha
Users migrating Freescale's PowerPC SoC U-Boot code to their custom board, often overlook the need to execute set_liodns() and setup_portals() being called by platform files. So Move set_liodns() and setup_portals() to common u-boot boot sequence Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-19Add more SPDX-License-Identifier tagsTom Rini
In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-29net: Move some header files to include/Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-21fdt: Allow ft_board_setup() to report failureSimon Glass
This function can fail if the device tree runs out of space. Rather than silently booting with an incomplete device tree, allow the failure to be detected. Unfortunately this involves changing a lot of places in the code. I have not changed behvaiour to return an error where one is not currently returned, to avoid unexpected breakage. Eventually it would be nice to allow boards to register functions to be called to update the device tree. This would avoid all the many functions to do this. However it's not clear yet if this should be done using driver model or with a linker list. This work is left for later. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
2014-09-24MAINTAINERS: comment out blank M: fieldMasahiro Yamada
Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4 (patman: RunPipe() should not pipe stdout/stderr unless asked), Patman spits lots of "Invalid MAINTAINERS address: '-'" error messages for patches with global changes. It takes too long for Patman to process them. Anyway, "M: -" does not carry any important information. Rather, it is just like a place holder in case of assigning a new board maintainer. Let's comment out. This commit can be reproduced by the following command: find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-13kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada
Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-30Add board MAINTAINERS filesMasahiro Yamada
We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30kconfig: add board Kconfig and defconfig filesMasahiro Yamada
This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-22powerpc/mpc85xx: Check return value of find_tlb_idxYork Sun
find_tlb_idx() is called in board_early_init_r() on multiple boards. The return value is not checked before being used to disable a TLB. In normal case the return value wouldn't be -1. In case of a mis- configuration during porting to a new board, checking the return value may be helpful to reveal some user errors. Signed-off-by: York Sun <yorksun@freescale.com>
2014-01-21powerpc/mpc85xx:Increase binary size for P, B & T series boards.Prabhakar Kushwaha
u-boot binary size for Freescale mpc85xx platforms is 512KB. This has been reached to upper limit for some of the platforms causig linker error. So, Increase the u-boot binary size to 768KB. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2013-11-25Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-01board: powerpc: convert makefiles to Kbuild styleMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de>
2013-10-24fsl/mpc85xx: define common serdes_clock_to_string functionValentin Longchamp
This allows to share some common code for the boards that use a corenet base SoC. Two different versions of the function are available in fsl_corenet_serdes.c and fsl_corenet2_serdes.c files. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> [York Sun: fix t1040qds.c] Acked-by: York Sun <yorksun@freescale.com>
2013-10-16powerpc: Fix CamelCase warnings in DDR related codePriyanka Jain
Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h has various parameters with embedded acronyms capitalized that trigger the CamelCase warning in checkpatch.pl Convert those variable names to smallcase naming convention and modify all files which are using these structures with modified structures. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
2013-08-09powerpc/corenet: Move RCW print to cpu.cYork Sun
The RCW print is common for all corenet platforms. Not necessary to ducplicate in each board file. Signed-off-by: York Sun <yorksun@freescale.com>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-05-24powerpc/p2041: fix serdes reference clock frequency display for PC boardShaohui Xie
PC board has different serdes clock setting with PB board, it uses same serdes frequency setting on bank2 as on bank1. PC board can be distingushed from PB board by checking CPLD version, if running on PC board, then fix the serdes reference clock frequency of bank2. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-02-04ppc: Move lbc_clk and cpu to arch_global_dataSimon Glass
Move these fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Update for bsc9132qds.c, b4860qds.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-01-30powerpc/p2041: move Lanes mux to board early initShaohui Xie
Lanes mux currently is configured in eth.c when initializing FMAN ethernet ports, but SRIO and PCIe also need lanes mux, so we move the lanes mux to p2041rdb.c which implements a board-specific initialization and will be called at early stage. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08powerpc/p2041: configure the CPLD lane_mux according to RCWShaohui Xie
Lane muxing on p2041 is controlled by a reg in CPLD, offset of this reg is 0xc, CPLD supports SATA by default, we should re-configure the lane muxing according to RCW, which indicates what SerDes protocol it is running. Default lane muxing map is as below: Lane G on bank1 routes to SGMII, controlled by bit 1 of the reg; Lane A on bank2 routes to AURORA, controlled by bit 0 of the reg; Lane C/D on bank2 routes to SATA0 and SATA1, controlled by bit 2 and bit 3 respectively. Default value of these bits for lane muxing is '1', we should set or clear these bits accoring to RCW. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-29doc: cleanup - move board READMEs into respective board directoriesWolfgang Denk
Also drop a few files referring to no longer / not yet supported boards. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Jason Jin <jason.jin@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-07-06powerpc/85xx: Add USB device-tree fixup for various platformsramneek mehresh
Add USB device-tree fixup for following platforms: MPC8536DS, P1022DS, P1023RDS, P2020COME, P2020DS, P2041RDB, P3060QDS Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2012-04-24powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during bootTimur Tabi
Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes displays which of these is actually built, but it's inconsistent. This is especially problematic since the "default" build for a given 85xx board can be either one, so if you don't see a message, you can't always know which size is being used. Not only that, but each board includes code that displays the message, so there is duplication. The 'bdinfo' command has been updated to display this information, so we don't need to display it at boot time. The board-specific code is deleted. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-12-06p2041rdb: fix serdes clock mapShaohui Xie
Description of SerDes clock Bank2 setting in p2041 hardware specification is wrong, the clock map which based on it is wrong either, so fix the serdes clock map. wrong setting of SERDES Reference Clocks Bank2: SW2[5:6] = ON OFF =>100MHz for PCI mode SW2[5:6] = OFF ON =>125MHz for SGMII mode right setting of SERDES Reference Clocks Bank2: SW2[5:6] = OFF OFF =>100MHz for PCI mode SW2[5:6] = OFF ON =>125MHz for SGMII mode SW2[5:6] = ON OFF =>156.25MHZ Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-08powerpc/QorIQ: fix network frame manager TBI PHY address settingsRoy Zang
TBI PHY address (TBIPA) register has been set in general frame manager phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c So remove the duplicate code on QorIQ frame manager Ethernet related platforms, which include Hydra board, P4080DS board and P2041rdb board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-15punt unused clean/distclean targetsMike Frysinger
The top level Makefile does not do any recursion into subdirs when cleaning, so these clean/distclean targets in random arch/board dirs never get used. Punt them all. MAKEALL didn't report any errors related to this that I could see. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-09powerpc/mpc8xxx: Merge entries in DDR speed tableYork Sun
It is not necessary to keep multiple entries for the same setting in DDR speed tables. Merge them for smaller tables. Also restructure the tables for smaller size. Cleanup some typedefs. Enforce strict checking for speed table. If DIMM is running at higher than known speed, try to use the highest speed setting. If rank is unknown, it has to panic. Removed ODT overriding for P2020DS as it is not necessary. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: remove watch dog related codesShaohui Xie
CPLD 2.2 removed board watch dog support due to the limitation of CPLD capacity after adding all the requested features, such as switch overriding. There is no pin-compatible upgrade part available for current PCB design. So remove codes related to it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: updated description of cpld commandShaohui Xie
According to CPLD 2.2, the default configuration is changed, so updated the description of CPLD command, otherwise it will confusing. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: add more ddr frequencies supportShaohui Xie
This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833, 1000, 1066 and 1333 were verified on this board with SO-DIMM (UG51U6400N8SU-ACF). Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: set sysclk according to status of physical switch SW1Shaohui Xie
P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8], software need to read the SW1 status to decide what the sysclk needs. SW1[8~6] : frequency 0 0 1 : 83.3MHz 0 1 0 : 100MHz others: 66.667MHz Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: update cpld reset command according to CPLD 2.0Shaohui Xie
CPLD 2.0 provides a new register which bit[0] is set to '1' will reset board with initializing the CPLD registers to default values. And add bit[6] of register at offset 0x5 to use to enable flash bank selection. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29powerpc/85xx: Refactor P2041RDB to use common p_corenet filesKumar Gala
The P2041RDB has almost identical setup for TLB, LAWS, and PCI with other P-Series CoreNet platforms. The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the TLB and LAW setup tables. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entriesKumar Gala
We shouldn't be setting execute permissions on TLB entries that will not actually have any code run from them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>