Age | Commit message (Collapse) | Author |
|
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
DP501 only supports DP 1.1a.
Limit settings for link bandwidth and lane count to
values allowed by DP 1.1a.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
|
|
With Club 3D dual link adapter there are AUX-channel timeouts
when EDID is read. Increasing retry interval time to max (400us)
fixes this.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
|
|
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
|
|
For proper displayport performance, scrambling has to be enabled, but
is turned off on DP501 by default.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
|
|
The I2C bridge on DP501 supports EDID, MCCS and HDCP by default.
Allow EDID only to avoid I2C address conflicts.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
|
|
There is a new iocon hardware flavor, supporting DisplayPort finally.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
|
|
Signed-off-by: Tom Rini <trini@ti.com>
|
|
The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC.
It boots from SPI-Flash but can be configured to boot from SD-card for
factory programming and testing.
On board peripherals include:
- 2x GbE
- Lattice ECP3 FPGA connected via PCIe
- mSATA RAID1
- USB host
- DisplayPort video output
- Atmel TPM
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|