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As part of my usual round of build testing, output about missing
MAINTAINERS information was not logged, and thus often overlooked.
Correct that mistake by ensuring that I log the output of
genboardscfg.py every time. As part of that, address a number of
missing MAINTAINERS entires. In the case of a missing file, I have put
the original submitter down. In the rest of the cases I have added the
config (and sometimes relevant header file) to the existing set of file
globs.
Signed-off-by: Tom Rini <trini@konsulko.com>
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p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI
connector (which may run at x2 electrically, depending on the board
version and configuration) and a x1 connection to the M.2 slot (which may
not be active, depending on the board version and configuration). This
change enables those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Now that clock and reset drivers exist for Tegra186, we can enable the SD
card controller. Now that a BPMP I2C driver exists for Tegra186, we can
communicate with the PMIC to enable power to the SD card. Hook up the DT
content and board code required to make the SD card work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The
combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B
port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO expansion
headers.
Currently, due to U-Boot's level of support for Tegra186, the only
features supported by U-Boot are the console UART and the on-board eMMC.
Additional features will be added over time.
U-Boot has so far been tested by replacing the kernel image on the device
with a U-Boot binary. It is anticipated that U-Boot will eventually
replace the CCPLEX bootloader binary, as on previous chips. This hasn't
yet been tested.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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