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path: root/board/phytec/pcl063
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2019-10-08imx: initialize fec only when enabledParthiban Nallathambi
board early initialize fec ethernet controller pinmux only when FEC is enabled Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: remove board specific boot order from splParthiban Nallathambi
boot order was added to handle both SD and eMMC. But commit 14d319b1 introduced to handle both eMMC and SD globally. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: pcl063: add nand boot supportParthiban Nallathambi
Booting from NAND needs nandbcb and nand boot device selection Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-06-23Convert to use fsl_esdhc_imx for i.MX platformsYangbo Lu
Converted to use fsl_esdhc_imx for i.MX platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
2019-06-11imx: Extend PCL063 support for phyCORE-i.MX6ULL SOMParthiban Nallathambi
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063) with eMMC on SoM. CPU: Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 38C Reset cause: POR Model: Phytec phyBOARD-i.MX6ULL-Segin SBC Board: PHYTEC phyCORE-i.MX6ULL DRAM: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2C - MMC/SD - eMMC - UART (1 & 5) - USB (host & otg) Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-06-11ARM: dts: i.MX6ULL: U-Boot specific dts for u-boot, dm-splParthiban Nallathambi
u-boot,dm-spl property is specific to U-Boot, so created one for i.MX6ULL platforms. Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-01-28imx: Add PHYTEC phyBOARD-i.MX6UL-SeginMartyn Welch
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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