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2009-01-23fsl-ddr: use the 1T timing as default configurationDave Liu
For light loaded system, we use the 1T timing to gain better memory performance, but for some heavily loaded system, you have to add the 2T timing options to board files. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2008-11-18Align end of bss by 4 bytesSelvamuthukumar
Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-18Pass dimm parameters to populate populate controller optionsHaiying Wang
Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-13Coding style cleanup, update CHANGELOGWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-09-02Moved initialization of TULIP Ethernet controller to board_eth_init()Ben Warren
Affected boards: cu824 bab7xx adciop dasa_sim mousse mpc8540eval musenki mvblue pcippc2/pcippc6 sbc8240 stxssa Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-27FSL DDR: Convert STXSSA to new DDR code.Kumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-02Cleanup out-or-tree building for some boards (.depend)Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-12Change initdram() return type to phys_size_tBecky Bruce
This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-1185xx/86xx: Move to dynamic mgmt of LAWsKumar Gala
With the new LAW interface (set_next_law) we can move to letting the system allocate which LAWs are used for what purpose. This makes life a bit easier going forward with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-05-21Big white-space cleanup.Wolfgang Denk
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-17Remove all the search paths from the .lds files.Jason Wessel
The cross compiler is responsible for providing the correct libraries and the logic to find the linking libraries. Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
2008-03-2685xx: Add the concept of CFG_CCSRBAR_PHYSKumar Gala
When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-05Remove erroneous or extra spd.h #includers.Jon Loeliger
Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-01-1785xx: Convert STXGP3 & STXSSA to new TLB setupKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-1685xx: Use proper defines for PCI addressesKumar Gala
We should be using the _MEM_PHYS for LAW and TLB setup and not _MEM_BASE. While _MEM_BASE & _MEM_PHYS are normally the same, _MEM_BASE should only be used for configuring the PCI ATMU. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-1685xx: convert STXGP3/STXSSA over to use new LAW init codeKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-12Fix linker scripts: add NOLOAD atribute to .bss/.sbss sectionsWolfgang Denk
With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-09Reworked FSL Book-E TLB macros to be more readableKumar Gala
The old macros made it difficult to know what WIMGE and perm bits were set for a TLB entry. Actually use the bit masks for these items since they are only a single bit. Also moved the macros into mmu.h out of e500.h since they aren't specific to e500. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Stop using immap_t on 85xxKumar Gala
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_*_ADDR as the base of the registers instead of getting it via &immap. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Stop using immap_t for guts offset on 85xxKumar Gala
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers instead of getting it via &immap->im_gur. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-12Fix memory corruption problem on STX GP3 SSA Board.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-09-11[GP3SSA] Add define CONFIG_MPC85XX_PCI2 in config file to allow u-boot toGrzegorz Bernacki
scan on second pci bus. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-07-06Code cleanup and default config update for STC GP3 SSA board.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-31Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-03Cleanup STX GP3SSA code; fix build and compile problems.Wolfgang Denk
2007-05-03Add support for STX GP3SSA (stxssa) BoardDan Malek
Signed-off-by Dan Malek, <dan@embeddedalley.com>