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In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Adapt to current framework]
Signed-off-by: Tom Rini <trini@ti.com>
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Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed. In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later than rev A1, and then we can ramp up to the PG1.0 maximum
of 720Mhz. In the case of Beaglebone Black, we are either on PG2.0 that
supports 1GHz or PG2.1. As PG2.0 may or may not have efuse_sma set, we
cannot rely on this probe. In the case of the GP EVM, EVM SK and IDK we
need to rely on the efuse_sma if we are on PG2.1, and the defaults for
PG1.0/2.0.
Signed-off-by: Tom Rini <trini@ti.com>
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Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
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As this is a reference platform, update the README to note which IP
blocks are required for use due to design choices of the reference
rather than required by the SoC itself.
Signed-off-by: Tom Rini <trini@ti.com>
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TPS mux config is 4460 specific, so it should be limited to 4460 only.
Signed-off-by: Taras Kondratiuk <taras@ti.com>
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Use CONFIG_MACH_TYPE generic macro to set the machine type
number in the common arm code instead of setting it in the
board code.
Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
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Add the call back to reset the LAN9730 after
the FEAT_POWER has been called.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
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Set the usbethaddr based on the OMAP DIE_ID registers
which should be unique for each processor.
Then set this as the usb ethernet MAC address.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
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Add the USB ehci support for the OMAP5 uEVM.
Configure the uEVM mux data
Add the flags to build the appropriate modules
Add the usb call backs to initialize the EHCI controller
Signed-off-by: Dan Murphy <dmurphy@ti.com>
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Change the board name for the sys info to
5432 uEVM
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
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Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Change to SPDX, fix a few compiler warnings, adapt to
CONFIG_OMAP_COMMON]
Signed-off-by: Tom Rini <trini@ti.com>
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We defined PHYS_DRAM_1 to 0x80000000 (start of DRAM) and then used this
for CONFIG_SYS_SDRAM_BASE. But then we kept on referencing PHYS_DRAM_1
in other places. Change to directly setting CONFIG_SYS_DRAM_BASE and
then using that name in code.
Signed-off-by: Tom Rini <trini@ti.com>
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Add dpll and clock data for AM43xx
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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Add board specific information for AM43xx.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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Configure the tca6424 gpio expander
This allows use of the debug and tri color LEDs.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
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The Beaglebone White may be populated with a memory cape that has a NOR
module. Document how to program it.
Signed-off-by: Tom Rini <trini@ti.com>
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NOR requires that s_init be within the first 4KiB of the image so that
we can perform the rest of the required pinmuxing to talk with the rest
of NOR that we are found on. When NOR_BOOT is set we save our
environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid
using SPL for this case and u-boot.bin is written directly to the start
of NOR.
We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c
with TI81xx checks as at this time U-Boot does not discard unused
sections in the main build and this code relies on functions specific to
(and only provided in) ti81xx-related code.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
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This patch adds support for the NOR module that attaches
to the memory cape for a Beaglebone board. This does not
add booting support; only support so that you can boot from
SD/MMC and see the NOR module so that it can be programmed.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Clean up config changes slightly]
Signed-off-by: Tom Rini <trini@ti.com>
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We rework the various board_is_foo() checks to take a pointer to
struct am335x_baseboard_id rather than using a local copy in board.c.
This allows us to make use of the same checks in mux.c as well as fixing
problems when this code could be running from read-only memory.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
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The AM335x GP EVM ships with NAND. Document programming of the chip
including the redundant locations that the ROM will check.
Signed-off-by: Tom Rini <trini@ti.com>
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As reported in http://marc.info/?l=u-boot&m=137358037827735&w=2
There is no need for the "xMB" variant, as the gpio pins used for
identification where never changed from the xMA when the newer silcon
was used for the xMB, So rename XM A revision as AB revision
and report accordingly
Reported-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
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Adding CPSW Slave 0 and MDIO pinmux support for DRA7xx EVM
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
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Adding support for CPSW Ethernet support found in DRA7xx EVM
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
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BD ram address may vary in various SOC, so removing the hardcoding and
passing the same information through platform data
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
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Add a README for the family of boards the am335x_evm covers, and include
instructions on preparing and using falcon mode, for various media.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
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Fix the checkpatch warning on the panda.c file for leading
spaces.
Fix the CHECK warnings on the panda.c file for parenthesis alignment.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
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Detect if we are running on a panda revision A1-A6,
or an ES panda board. This can be done by reading
the level of GPIOs and checking the processor revisions.
This should result in:
Panda 4430:
GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
GPIO171, GPIO101, GPIO182: 1 0 1 => A6
Panda ES:
GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
Set the board name appropriately for the board revision that
is detected.
Update the findfdt macro to load the a4 device tree binary.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
[trini: %s/CONTROL_PADCONF_CORE/(*ctrl)->control_padconf_core_base/ and
formatting for that]
Signed-off-by: Tom Rini <trini@ti.com>
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move uart soft reset code to common place and call
this function from board code, instead of copy and paste
this code for every board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Matt Porter <mporter@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Tom Rini <trini@ti.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
[trini: Fix igep0033 build, remove 'regval' on pcm051]
Signed-off-by: Tom Rini <trini@ti.com>
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move rtc32k_enable() to common place so all am33xx boards can use it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Matt Porter <mporter@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Tom Rini <trini@ti.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
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Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR
Conflicts:
arch/arm/include/asm/arch-omap5/omap.h
Signed-off-by: Tom Rini <trini@ti.com>
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The omap2420H4 was the only mainline omap24xx board. Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time. Remove this board as there's not been interest in
it in U-Boot for quite a long time.
Signed-off-by: Tom Rini <trini@ti.com>
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Updating pinmux data as specified in the latest DM
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
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To be consistent with other ARM platforms,
renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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driver
Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot.
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
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Jump into full u-boot mode if a 'c' character is received on the uart.
We need to adjust the spl bss/malloc area to not overlap with the
loadaddr of the kernel (sdram + 32k), so move it past u-boot instead.
For raw mmc, we store the kernel parameter area in the free space after
the MBR (if used). For nand, we use the last sector of the partition
reserved for u-boot.
This also enables the spl command in the full u-boot so the kernel
parameter area snapshot can be created.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
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We need to call the save_omap_boot_params function on am33xx/ti81xx and
other newer TI SoCs, so move the function to boot-common. Only OMAP4+
has the omap_hw_init_context function so add ifdefs to not call it on
am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx
boards.
Reviewed-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
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Fix the device tree loading for panda(4430) and panda-es(4460)
Modify the board name if a 4460 panda or panda-es is detected
at run time.
In the findfdt add a check for the panda-es board name and load
the panda-es device tree blob.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
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We are able to tell the difference between xM Rev Ax/Bx and xM Rev Cx,
and have been for some time. The comment above the function however did
not list this, so update.
Signed-off-by: Tom Rini <trini@ti.com>
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Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs,
rename twl6035_init_settings with an more generic palmas_init_settings
Signed-off-by: Nishanth Menon <nm@ti.com>
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TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs
Rename twl6035 to palmas to allow reuse across multiple current and
future platforms
As part of this change, change the CONFIG_TWL6035_POWER to
CONFIG_PALMAS_POWER and update usage of header file accordingly.
Signed-off-by: Nishanth Menon <nm@ti.com>
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Adds CPSW support to the TI814X EVM configured with
an ET1011C PHY in GMII mode.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
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Enables required PLLs and clocks for CPSW on TI814x.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
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In the current u-boot, the device pin multiplexing and clock
initialisation needs to be early during the boot process and before
board_init() is called. U-boot is currently crashing on this board
because this is not being done early enough. Therefore, add a s_init()
function for the omap5912-osk board to do this.
Also fix the stack pointer so that it is pointing to the end of the
internal RAM and not the beginning as this was also causing the device
to crash.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
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