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2019-10-08arm64: zynqmp: Add a2197 memory board revAMichal Simek
Similar to processor board but i2c structure is completely different. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add System Controller for a2197-g/pMichal Simek
Similar SCs but different wiring. - dc_i2c is connected to X-PRC cards that's why label is required to have an option to hook up some devices. - Exactly identify i2c devices on x-prc boards. In case of missing i2c connection devices won't be accessible. - USB 0 should be device mode with super speed. - USB 1 should be host mode. - Fix i2c mux reset pin entry - commented, not verified. - Fix i2c1 eeprom compatible string - it is an ST 128Kbit device. Need to use atmel fallback. - Fix si570 I2C slave address and add corresponding part numbers. - Enable AMS for system monitoring. - phy reset property should be commented because it will throw a warning dump when called from context that can sleep. No support for phys property (zynqmp phy driver) with SGMII. Add is-internal-pcspma property required by uboot. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-10-08arm64: zynqmp: Add generic a2197 system controller configMichal Simek
Add generic configuration for a2197-p/-m/-g boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08ARM: zynq: Specify MMC controller number for boot sequenceMichal Simek
Xilinx Zynq SoC has two sdhci controllers but boot is only possible from the first one. That's why there is a need to specify controller number. mmc1 is supposed to be secondary boot device and should be also listed in distribution boot. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add idcodes for new RFSoC silicons ZU48DR and ZU49DRSiva Durga Prasad Paladugu
Add zu48dr and zu49dr to the list of zynqmp devices. The zu48dr and zu49dr are the new RFSoC silicons with id values of 0x7b and 0x7e. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add new jtag distro boot commandSiva Durga Prasad Paladugu
This patch adds new jtag distro boot command to look for bootscript file in DDR and execute it first incase of jtag bootmode. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Add new dfu usb distro boot commandT Karthik Reddy
This patch adds new dfu usb distro boot command to look for bootscript from dfu-util and runs it. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2019-10-08arm64: versal: Add new jtag distro boot commandSiva Durga Prasad Paladugu
This patch adds new jtag distro boot command to look for bootscript file in DDR and execute it first incase of jtag bootmode. This patch also updates scriptaddr to 512MB as there is high of script corruption incase of bigger kernel image. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Enable memory mapping via DTMichal Simek
Code reads DT and setup MMU table based on memory node. This will ensure that only DT needs to be changed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Set initrd_high to as high as possibleT Karthik Reddy
This patch is setting up the initrd_high to as high as possible by leaving max stack size for u-boot so that bigger rootfs can also be loaded by u-boot for booting kernel. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Set initrd_high to as high as possibleSiva Durga Prasad Paladugu
This patch is setting up the initrd_high to as high as possible by leaving max stack size for u-boot so that bigger rootfs can also be loaded by u-boot for booting kernel. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: fpga: Add PL bit stream load supportSiva Durga Prasad Paladugu
This patch adds PL bitstream load support for Versal platform. The PL bitstream is loaded by making an SMC to ATF which in turn communicates with platform firmware which configures and loads PL bitstream on to PL. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Define board_late_init for versalSiva Durga Prasad Paladugu
Define board_late_init which performs bootmode detection and prepares corresponding distro boot commaand sequence. Also disable it for mini platforms because simply there is no need to have it enabled. But also disable it for virtual platform because Qemu is not modelling this register space that's why travis testing would fail. This configuration should be reverted when mainline Qemu is updated. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08xilinx: Add sd boot command script for referenceSiva Durga Prasad Paladugu
This patch adds sdboot command script for reference. This can be converetd into uboot script using mkimage and use for booting. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08xilinx: Add qspi boot command script for referenceSiva Durga Prasad Paladugu
Thsi patch adds qspiboot command script for reference. This can be converetd into uboot script using mkimage and use for booting. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-11env: Move env_set() to env.hSimon Glass
Move env_set() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_set_hex() to env.hSimon Glass
Move env_set_hex() over to the new header file along with env_set_addr() which uses it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-30arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabledMichal Simek
xilinx_zynqmp_mini configuration is throwing build error: readlink: missing operand Try 'readlink --help' for more information. because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and Makefile pass ifneq condition. Add SPL_BUILD dependency which is also reflected in Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30arm64: zynqmp: add MAINTAINERS entry for Avnet UltraZed-EVLuca Ceresoli
The board was added without adding a MAINTAINERS entry. Fixes: $ ./tools/genboardscfg.py -f WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0' WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0' $ Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30arm64: zynqmp: add support for Avnet UltraZed-EV Starter KitLuca Ceresoli
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the only publicly-available compatible carrier card. The SoM is based on the EV version of the Xilinx ZynqMP SoC+FPGA. The psu_init_gpl.c file has been generated from the board definition files at [0] using Vivado 2018.3 and then minimized by tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since it is not mentioned in device tree and fixed a checkpatch error. [0] https://github.com/Avnet/bdf/tree/3686c9ff7d2f0467fb4fcf39f861b8d6ff183b12/ultrazed_7ev_cc/1.1 Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30ARM: zynq: Add configuration for Z-turn boardAnton Gerasimov
Basic (PS-only) configuration based on Vivado board files by Sergiusz Bazanski <sergius@q3k.org> Signed-off-by: Anton Gerasimov <tossel@gmail.com>
2019-07-30arm64: zynqmp: xil_io.h: declare functions as staticLuca Ceresoli
Fixes sparse warnings when building zynqmp defconfigs: ./board/xilinx/zynqmp/xil_io.h:12:6: warning: symbol 'Xil_Out32' was not declared. Should it be static? ./board/xilinx/zynqmp/xil_io.h:17:5: warning: symbol 'Xil_In32' was not declared. Should it be static? ./board/xilinx/zynqmp/xil_io.h:22:6: warning: symbol 'usleep' was not declared. Should it be static? Also add __maybe_unused to usleep() since it is not used by minimized psu_init_gpl.c files, so it would warn as "defined but not used". Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30arm64: zynqmp: spl: install a PMU firmware config object at runtimeLuca Ceresoli
Optionally allow U-Boot to load a configuration object into the Power Management Unit (PMU) firmware on Xilinx ZynqMP. The configuration object is required by the PMU FW to enable most SoC peripherals. So far the only way to boot using U-Boot SPL was to hard-code the configuration object in the PMU firmware. Allow a different boot process, where the PMU FW is equal for any ZynqMP chip and its configuration is passed at runtime by U-Boot SPL. All the code for Inter-processor communication with the PMU is isolated in a new file (pmu_ipc.c). The code is inspired by the same feature as implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted Firmware: * https://github.com/Xilinx/embeddedsw/blob/fb647e6b4c00f5154eba52a88b948195b6f1dc2b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c#L295 * https://github.com/ARM-software/arm-trusted-firmware/blob/c48d02bade88b07fa7f43aa44e5217f68e5d047f/plat/xilinx/zynqmp/pm_service/pm_api_sys.c#L357 SPL logs on the console before loading the configuration object: U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200) Loading PMUFW cfg obj (2008 bytes) EL Level: EL3 ... Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-21arm64: zynqmp: Cover ultra96 dts file by MAINTAINERS fragmentMichal Simek
Avnet Ultra96 dts file should be also cover by MAINTAINERS fragment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-26watchdog: Implement generic watchdog_reset() versionStefan Roese
This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Maxim Sloyko <maxims@google.com> Cc: Erik van Luijk <evanluijk@interact.nl> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Glass <sjg@chromium.org> Cc: "Álvaro Fernández Rojas" <noltari@gmail.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
2019-04-16arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DRSiva Durga Prasad Paladugu
This patch adds "zu39dr" to the list of zynqmp devices The zu39DR is the new RFSoC silicon with id value of 0x66. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16ARM: zynq: Check zynq aes & rsa command parameters countT Karthik Reddy
This patch checks for zynq aes & rsa commands max parameters count. Also checks minimum number of parameters count for aes command. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16arm64: zynqmp: Use zynqmp_mmio_read/write functionsT Karthik Reddy
Changed the return type of reset_reason() to int from u32, because zynqmp_mmio_read/write() returns signed value on error. Replaced readl and writel functions with zynqmp_mmio_read & zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-08watchdog: Move watchdog_dev to data section (BSS may not be cleared)Stefan Roese
This patch moves all instances of static "watchdog_dev" declarations to the "data" section. This may be needed, as the BSS may not be cleared in the early U-Boot phase, where watchdog_reset() is already beeing called. This may result in incorrect pointer access, as the check to "!watchdog_dev" in watchdog_reset() may not be true and the function may continue to run. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100) Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2019-02-15arm64: zynqmp: Create fdtfile from compatible stringMichal Simek
distro boot expects that fdtfile name is setup for alternative DTB. Create this file based on the first platform compatible string. This should ensure that one rootfs can store multiple DTBs for different boards. Reflect structure which is used in Linux kernel. It means dtbs are strored in xilinx folder. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2019-02-14xilinx: common: Remove !DM_i2C code for reading mac from eepromMichal Simek
All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-14arm64: versal: Move IOU_SWITCH_DIVISOR0 to KconfigMichal Simek
Move hardcoded IOU_SWITCH_DIVISOR0 to Kconfig to be able to set it up for different platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14arm64: versal: Remove one level of indentation in board_early_init_r()Michal Simek
Simplify code indentation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14arm: zynq: Update boot_targets based on bootmodeSiva Durga Prasad Paladugu
Update boot_targets based on bootmode to run corresponding distroboot command first. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr()Michal Simek
It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14xilinx: Move zynq_board_read_rom_ethaddr to shared locationMichal Simek
Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Fix tcminit help text alignmentMichal Simek
Trivial patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Fix mmc node names to be in sync with kernelSiva Durga Prasad Paladugu
This patches renames sd nodes in dts to be in line with kernel. This patch also modifies the references for the same in code. It checks mmc first to have no time penalty for new DT node names based on left-to-right expression evaluation. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Protect board_late_init functionMichal Simek
Function should be compiled only when CONFIG_BOARD_LATE_INIT is defined. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30arm64: zynqmp: Wire mini-emmc1 configuration with zcu102Michal Simek
For testing purpose use zcu102 which has SD at controller 1 and this can be used for testing this mini configuration. U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100) Model: ZynqMP MINI EMMC1 Board: Xilinx ZynqMP DRAM: 512 MiB EL Level: EL3 MMC: sdhci@ff170000: 0 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30arm64: zynqmp: Wire mini-emmc0 configuration with zcu100Michal Simek
For testing purpose use zcu100 which has SD at controller 0 and this can be used for testing this mini configuration. U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100) Model: ZynqMP MINI EMMC0 Board: Xilinx ZynqMP DRAM: 512 MiB EL Level: EL3 MMC: sdhci@ff160000: 0 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30arm64: zynqmp: Start usb ethernet gadget automaticallyMichal Simek
If only usb ethernet gadget is enabled it can start automatically. If more gagdets are enabled usb ethernet gadget can be bind by "bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30arm64: zynqmp: Add mini mtest configurationMichal Simek
This configuration is useful when you want to run small u-boot and perform DDR memory test to make sure that DDR is properly configured. It is use for board bringup because alternative u-boot memory tests is quite good. Configuration is running out of OCM. As is done for others mini configurations 0x80 bytes for variables is enough and only default variables are stored there. Alternative memtest is enabled and also 2GB of DDR via DTS files. Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init() from zcu102 for testing purpose. In case of size issue this can be moved to SPL configuration as is done for mini_qspi configuration but it is not a problem now. Log: U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100) Model: ZynqMP MINI Board: Xilinx ZynqMP DRAM: WARNING: Initializing TCM overwrites TCM content 2 GiB EL Level: EL3 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29arm64: zynqmp: Enable SPL for mini qspi configurationMichal Simek
Wire up mini_qspi SPL with zcu102 for testing purpose. Normally mini u-boot runs with FSBL/SPL for certain board. Enabling SPL and configuration from zcu102 helps with testing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29ARM: zynq: Wire SPL configuration for cse nor/nand targetsMichal Simek
These symlinks are here only for testing purpose where SPL is used for soc configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26microblaze: Use standard functions for memory decodingMichal Simek
The standard function is less error prone than custom one. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26ARM: zynq: Guard zynq_help_text with CONFIG_SYS_LONGHELPMichal Simek
If SYS_LONGHELP is disabled the following warning is generated: board/xilinx/zynq/cmds.c:496:13: warning: ‘zynq_help_text’ defined but not used [-Wunused-variable] Normal way for fixing this is to guard the whole variable. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26arm64: zynqmp: Fix logic in CG/EG/EV detectionSiva Durga Prasad Paladugu
The VCU disable bit(8) in IP disable register of efuse is valid only if PL powered up and hence PL powerup status has to be considered while determining the CG part also. This patch considers the PL powerup status and ignores the VCU disable bit if PL not powered up. This fixes the issue of "unknown" id for CG parts if PL not powered up and VCU bit(8) is not set. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: zynqmp: Add new command for TCM initializationSiva Durga Prasad Paladugu
This patch adds new zynqmp command "zynqmp tcminit mode" to initialize TCM. TCM needs to be initialized before accessing to avoid ECC errors. This new command helps to perform the same. It also makes tcm_init() as global and uses it for doing the TCM initialization. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: versal: Add support for new Xilinx Versal ACAPsMichal Simek
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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