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2019-05-08Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
- H6 Beelink GS1 board (Clément) - Olimex A64-Teres-I board (Jonas) - sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej) - Change include order (Jagan) - EPHY clock changes (Jagan) - EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
2019-05-09sun50i: a64: Add Olimex A64-Teres-I board initial supportJonas Smedegaard
Olimex A64-Teres-I board is a mainboard (the only one so far) for Olimex Teres-I DIY laptop kit. Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - MicroSD Slot - 16GB eMMC Flash - eDP LCD display - HDMI - USB Host - Battery management - 5V DC power supply - Certified Open Source Hardware (OSHW) Works: - i2C - MMC/SD - PWM backlight Known broken: - Internal keyboard (seems to be because the keyboard firmware loads a bootloader first, and then disconnects bootloader and connect real keyboard). External ones connected to the USB port work fine. This patch enables support for the A64-Teres-I board to u-boot, including enabling screen backlight (lacking from Linux device-tree). Linux commit details about the sun50i-a64-teres-i.dts sync: "arm64: dts: allwinner: a64: Rename uart0_pins_a label to uart0_pb_pins" (sha1: d91ebb95b96c8840932dc3a10c9f243712555467) Cosmetic warnings regarding whitespace and placement of SPDX notice for dts file was ignored. config and .dtsi file are adapted from pinebook files. Tested-by: Jonas Smedegaard <dr@jones.dk> Signed-off-by: Jonas Smedegaard <dr@jones.dk> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: move board entry in MAINTAINERS file at proper position] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-08x86: samus: Add a target to boot through TPLSimon Glass
Add a version of samus which supports booting from TPL to SPL and then to U-Boot. This allows TPL to select from an A or B SPL to support verified boot with field upgrade. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-07ARM: dts: renesas: Add RZ/A1 GR-Peach boardChris Brandt
Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07sh: sh7785lcr: Remove the boardMarek Vasut
Last change to this board was done in 2016, it uses non-DM USB with no prospects of ever being converted to DM USB, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07sh: ecovec: Remove the boardMarek Vasut
Last change to this board was done in 2016, it uses non-DM USB with no prospects of ever being converted to DM USB, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07sh: sh7757lcr: Fix copy-paste error in READMEMarek Vasut
Update the README to use the correct defconfig. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-06Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Various pinctrl / gpio fixes for R-Car
2019-05-05board: toradex: drop support.arm maintainer emailMarcel Ziswiler
Drop Toradex ARM Support <support.arm@toradex.com> from maintainer email list as this just clogs our support ticketing system. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2019-05-05board: ti: am43xx: Enable hardware levelingBrad Griffis
Remove the RDLVL_MASK, RDLVLGATE_MASK, WRLVL_MASK & enable PHY_INVERT_CLKOUT to enable Hardware leveling for am437x as recommended by EMIF Tools app note: http://www.ti.com/lit/an/sprac70/sprac70.pdf Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05board: ti: am654: select SYS_DISABLE_DCACHE_OPS for arm64 buildVignesh Raghavendra
AM654 SoC is IO coherent wrt A53 cores, therefore enable SYS_DISABLE_DCACHE_OPS to avoid cache operations in A53 SPL/U-Boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-05-04Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mipsTom Rini
- mscc: small fixes, enhance network support for Serval, Luton and Ocelot - mt7620: rename arch to more generic name mtmips - mips: pass initrd addresses via DT as physical addresses
2019-05-04ARM: renesas: Configure DRAM size from ATF DT fragmentMarek Vasut
The ATF can pass additional information via the first four registers, x0...x3. The R-Car Gen3 with mainline ATF, register x1 contains pointer to a device tree with platform information. Parse this device tree and extract DRAM size information from it. This is useful on systems where the DRAM size can vary between configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-03Merge git://git.denx.de/u-boot-marvellTom Rini
- Fix in kwbimage (return code checking) (Young Xiao) - Misc updates to Turris Omnia (Marek)
2019-05-03board: mscc: luton: Update MSCC Luton boardHoratiu Vultur
Implement method board_phy_config to configure the external phys on the pcb90. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03board: mscc: ocelot: Update MSCC Ocelot board.Horatiu Vultur
Implement method board_phy_config to configure the phy for pcb120. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03board: mscc: serval: Update MSCC Serval boardsHoratiu Vultur
In Serval SoC family there are 2 different pcb, both of them have the same phy, but with different version. Therefore implement board_phy_config and set all the phys in the same way. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03board: mscc: serval: Fix board detectHoratiu Vultur
When detecting the board, it was reading a register in the GPIO page of the phy and based on that value it was making a decision. The bug was that after the GPIO page for the first phy was set it was not reseted back. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03Merge branch '2019-05-03-master-imports'Tom Rini
- Various btrfs fixes - Various TI platform fixes - Other fixes (cross build, taurus update, Kconfig help text)
2019-05-03at91: cleanup taurus portHeiko Schocher
- at91sam9g20-taurus.dts: use labels - cleanup taurus port to compile clean with current mainline again. SPL has no serial output anymore, so it fits into SRAM. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-05-03board: am335x: Drop duplicate pinmux configurationPaul Barker
In commit ad6054f1fe128f797b6eb2964afca6674b584785 where support for the Sancloud BeagleBone Enhanced (BBE) was added, new conditional configuration of either MII pin muxing or RGMII pin muxing is done depending on the board type. However, the old call to set up MII pin muxing was not removed. This may result in misconfiguration of the pin muxing for the BBE or duplicate configuration for other boards and so we remove this obsolete call. Signed-off-by: Paul Barker <paul.barker@sancloud.co.uk>
2019-05-03arm: mvebu: turris_omnia: add RESET button handlingMarek Behún
There is a Factory RESET button on the back side of the Turris Omnia router. When user presses this button before powering the device up and keeps it pressed, the microcontroller prevents the main CPU from booting and counts how long the RESET button is being pressed (and indicates this by lighting up front LEDs). The idea behind this is that the user can boot the device into several Factory RESET modes. This patch adds support for U-Boot to read into which Factory RESET mode the user booted the device. The value is an integer stored into the omnia_reset environment variable. It is 0 if the button was not pressed at all during power up, otherwise it is the number identifying the Factory RESET mode. This patch also changes bootcmd to a special hardcoded value if Factory RESET button was pressed during device powerup. This special bootcmd value sets the colors of all the LEDs on the front panel to green and then tries to load the rescue image from the SPI flash memory and boot it. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_omnia: fix regdomain env var settingMarek Behún
The regdomain environment variable is set according to value read from EEPROM. This has to be done in board_late_init, after the environment variables are read from SPI. Select CONFIG_BOARD_LATE_INIT in Kconfig for the Turris Omnia target. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_*: remove watchdog includeMarek Behún
Since board watchdog is now unified and not handled in board files, remove the unnecessary includes. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_omnia: print board info as Turris MoxMarek Behún
Unify the way how Omnia and Mox print board information (RAM size and serial number). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_omnia: refactor more codeMarek Behún
Refactor RAM size reading from EEPROM in preparation for next patch. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_omnia: move ATSHA204A from defconfig to KconfigMarek Behún
This driver is required for Turris Omnia to read ethernet addresses. Move the dependency from turris_omnia_defconfig to Kconfig. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_omnia: fix checkpatch warningsMarek Behún
Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_omnia: refactor I2C accessing codeMarek Behún
Refactor code which accesses the microcontroller and EEPROM via I2C. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03arm: mvebu: turris_omnia: remove redundant codeMarek Behún
The i2c slave disabling is done by mvtwsi driver and is not needed here. Signed-off-by: Marek Behún <marek.behun@nic.cz> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-01Merge tag 'rockchip-for-2019.07' of git://git.denx.de/u-boot-rockchipTom Rini
Improvements and new features: - improved SPI driver for better read throughput - refactors initialisation of debug UART init - restructures header file paths - adds pinctrl improvements Adds Kever as a co-custodian.
2019-05-01Merge tag 'u-boot-imx-20190426' of git://git.denx.de/u-boot-imxTom Rini
Porting to DM and i.MX8 ------------------------ - warp7 to DM - kp_imx53 to DM - Warnings in DT - MX8QM support - colibri-imx6ull to DM - imx7d-pico to DM - ocotp for MX8
2019-05-01rockchip: use 'arch-rockchip' as header file pathKever Yang
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3399: Add Orangepi RK3399 supportJagan Teki
Add initial support for Orangepi RK3399 board. Specification - Rockchip RK3399 - 2GB/4GB DDR3 - 16GB eMMC - SD card slot - RTL8211E 1Gbps - AP6356S WiFI/BT - HDMI In/Out, DP, MIPI DSI/CSI - Mini PCIe - Sensors, Keys etc - DC12V-2A and DC5V-2A Commit details about Linux DTS sync: "arm64: dts: rockchip: Add support for the Orange Pi RK3399" (sha1: d3e71487a790979057c0fdbf32f85033639c16e6) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-04-26board/BuR/brxre1: use common resetcontroller implementationHannes Schmelzer
The handling of regarding bootmode and early setup has been moved to central location 'common/br_resetc.c', so use this on brxre1 board. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-04-26board/BuR/brxre1: cosmetic cleanupHannes Schmelzer
- fixup coding style - drop unused 'PUSH_KEY' define Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-04-26board/BuR/common: add br resetcontoller implementationHannes Schmelzer
On many B&R boards we have a reset-controller, responsible for very early board-bringup (voltages, clocks, ...) and bootmode selection. To be ready for adding more B&R boards to source tree while avoiding duplicate code, we add the resetcontroller implementation to the common part of B&R boards. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-04-26board/BuR/common: add 'brdefaulip_setup' functionHannes Schmelzer
Many B&R boards are equipped with an I2C-EEPROM where various information can be stored. Today there is only a single byte for 'board_id' used. We write this 'board_id' into environment for later use during boot. If the value != 0xFF, meaning the byte is programmed, we modify the "brdefaultip" environment variable for setting an IP-Address based on board_id. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-04-26board/BuR/common: cosmetic: move 'overwrite_console' up to more related stuffHannes Schmelzer
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-04-26board/BuR/common: prepare for compiling common into non AM33XX boardsHannes Schmelzer
Today the BuR common stuff is only used on AM33XX boards. In future we plan to have many other platforms than AM33XX so we have to move arch- specific #include(s) to responsible #ifdef sections. By the way we drop unneeded #include(s). Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-04-26Merge git://git.denx.de/u-boot-marvellTom Rini
- Add DM based generic watchdog start and reset implementation and remove all ad-hoc implementations (Stefan) - Move mv_sdhci to DM (Pierre) - Misc turris_omnia updates (Pierre) - Change openrd targets to correctly build again (size changes and fixes to the dts targets) and bring it back into Travis builds (Stefan) - Add Kirkwood db-88f6281-bp board (Chris)
2019-04-26Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2019-04-26arm: kirkwood: openrd: Mark openrd boards as maintained againStefan Roese
With the latest size increase of the openrd boards, they all compile clean again. Let's mark them as maintained again and add the Travis job. Please note that I can only compile-test these targets as I don't have access to one of those boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert-u-boot@aribaud.net> Cc: Vagrant Cascadian <vagrant@debian.org> Cc: Chris Packham <judge.packham@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2019-04-26watchdog: Implement generic watchdog_reset() versionStefan Roese
This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Maxim Sloyko <maxims@google.com> Cc: Erik van Luijk <evanluijk@interact.nl> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Glass <sjg@chromium.org> Cc: "Álvaro Fernández Rojas" <noltari@gmail.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
2019-04-26ARM: kirkwood: add db-88f6281-bp boardChris Packham
This is Marvell's Kirkwood development board. It has the following features - 512M DDR2 - 2 PCI connectors - 1 x1 PCI-e interface - 1 Gigabit Ethernet Port - 2 SATA Ports - USB 2.0 Interface - SDIO - 128M NAND Flash - 16M SPI Flash It can be strapped to boot from SPI or NAND so there are two defconfigs (one per boot media). Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-26arm: kirkwood: lsxl: add note about sata in READMEMichael Walle
The boot commands have changed in the environment. Add a note about the incompatible change and how resolve the issue in the board's README. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-26arm: mvebu: turris_omnia: fix eeprom/mcu device namesPierre Bourdon
Commit c4bd12a7dad4 ("i2c: mux: Generate longer i2c mux name") changed the naming scheme of i2c devices within a mux. This broke references to i2c@0 in the Turris Omnia board initialization code. Signed-off-by: Pierre Bourdon <delroth@gmail.com> Cc: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-25warp7: Switch to DM USBPierre-Jean Texier
This commit switches to DM USB for warp7 and warp7_bl33 defconfigs. Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io> Signed-off-by: Joris Offouga <offougajoris@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25imx: Add variscite DART-6UL Evaluation KitParthiban Nallathambi
Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-25ARM: imx6: DHCOM i.MX6 PDK: use Kconfig for inclusion of DDR calibrationLudwig Zenz
The four x16 DDR3 are wired in T-topology. From NXP AN4467: 'Although not required, T-Topologies may also benefit from performing Write Leveling as there are package delays on both the processor and DDR devices that can be de-skewed by performing Write Leveling. Therefore, Freescale recommends determining Write Leveling calibration parameters for all boards, regardless of topology used.' That is why write level calibration is also done. Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
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